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Электронный компонент: AD12401-326KWS

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12-Bit, 400 MSPS A/D Converter
AD12401
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.


One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
FEATURES
Up to 400 MSPS sample rate
SNR of 63 dBFS @128 MHz
SFDR of 70 dBFS @128 MHz
VSWR of 1:1.5
High or low gain grades
Wideband ac-coupled input signal conditioning
Enhanced spurious-free dynamic range
Single-ended or differential ENCODE signal
LVDS output levels
Twos complement output data
APPLICATIONS
Communications test equipment
Radar and satellite subsystems
Phased array antennas, digital beams
Multichannel, multimode receivers
Secure communications
Wireless and wired broadband communications
Wideband carrier frequency systems
FUNCTIONAL BLOCK DIAGRAM
005649-001
ADC
A
DATA
READY
A
DATA
READY
B
DA0DA11
DR_EN
CLK DISTRIBUTION
AD12401
POST-
PROCESSING
ADC
B
A
IN
CLOCK DISTRIBUTION
DIVIDE BY 2
ENC
ENC
OROUT
DB0DB11
Figure 1.
GENERAL DESCRIPTION
The AD12401 is a 12-bit analog-to-digital converter (ADC)
with a transformer-coupled analog input and digital post-
processing for enhanced SFDR. The product operates at up to
400 MSPS conversion rate with outstanding dynamic performance
in wideband carrier systems.
The AD12401 requires a 3.7 V analog supply and 3.3 V and
1.5 V digital supplies, and provides a flexible ENCODE signal
that can be differential or single ended. No external reference is
required.
The AD12401 package style is an enclosed 2.9" 2.6" 0.6"
module. Performance is rated over a 0C to 60C case
temperature range.
PRODUCT HIGHLIGHTS
1.
Guaranteed sample rate up to 400 MSPS.
2.
Input signal conditioning with optimized dynamic
performance to 175 MHz.
3.
High and low gain grades available.
4.
Additional performance options available (sample rates
>400 MSPS or second Nyquist zone operation); contact
sales.
5.
Proprietary Advanced Filter Bank (AFBTM) digital post-
processing from V Corp Technologies, Inc.
AD12401
Rev. A | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
DC Specifications ......................................................................... 3
AC Specifications--ENCODE = 400 MSPS.............................. 4
AC Specifications--ENCODE = 360 MSPS.............................. 5
AC Specifications--ENCODE = 326 MSPS.............................. 6
Absolute Maximum Ratings............................................................ 8
Explanation of Test Levels ........................................................... 8
ESD Caution.................................................................................. 8
Pin Configuration and Function Descriptions........................... 10
Terminology .................................................................................... 13
Typical Performance Characteristics ........................................... 15
Theory of Operation ...................................................................... 18
Time-Interleaving ADCs........................................................... 18
Analog Input ............................................................................... 18
Clock Input.................................................................................. 18
Digital Outputs ........................................................................... 19
Power Supplies ............................................................................ 19
Start-Up and RESET .................................................................. 19
DR_EN......................................................................................... 19
Overrange.................................................................................... 19
Gain Select................................................................................... 20
Thermal Considerations............................................................ 20
Package Integrity/Mounting Guidelines ................................. 20
AD12401 Evaluation Kit ........................................................... 21
Data Outputs............................................................................... 21
Layout Guidelines........................................................................... 26
PCB Interface .............................................................................. 26
Outline Dimensions ....................................................................... 28
Ordering Guide .......................................................................... 28
REVISION HISTORY
4/06--Rev. 0 to Rev. A
Changes to Features and Product Highlights ............................... 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Changes to Table 4............................................................................ 6
Changes to Table 7............................................................................ 9
Changes to Figure 5........................................................................ 10
Changes to Table 9.......................................................................... 11
Added Gain Select Section ............................................................ 20
Added H/L_GAIN Section............................................................ 21
Changes to Figure 25...................................................................... 23
Changes to the Ordering Guide.................................................... 28
7/05--Revision 0: Initial Version
AD12401
Rev. A | Page 3 of 28
SPECIFICATIONS
DC SPECIFICATIONS
VA = 3.7 V, VC = 3.3 V, VD = 1.5 V, 0C T
CASE
60C, unless otherwise noted.
Table 1.
AD12401-xxxKWS
AD12401-xxxJWS
Parameter
Case Temp
Test Level
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
12
Bits
ACCURACY
No Missing Codes
Full
IV
Guaranteed
Offset
Error
Full
I
-12
+12 -12
+12 LSB
Gain Error @ 10 MHz
Full
I
-10
+10
-10
+10
%FS
Differential Nonlinearity (DNL)
60C
V
0.3
0.3
LSB
Integral Nonlinearity (INL)
60C
V
0.5
0.5
LSB
TEMPERATURE
DRIFT
Gain
Error
60C V
0.02
0.02
%/C
ANALOG
INPUT
(AIN)
Full-Scale Input Voltage Range
60C
V
3.2
1.6
V p-p
Flatness (10 MHz to 175 MHz)
Full
IV
0.5
1
0.5
1
dB
Input VSWR, 50 (300 kHz to 175 MHz)
60C
V
1.5
1.5
Analog Input Bandwidth
60C
V
480
480
MHz
POWER SUPPLY
1
Supply
Voltage
VA
Full
IV
3.6
3.8 3.6 3.8 V
VC
Full
IV
3.2
3.4 3.2 3.4 V
VD
Full
IV
1.45
1.55 1.45
1.55 V
Supply
Current
I
VA
(VA = 3.7 V)
Full
I
0.95
1.2
0.95
1.2
A
I
VC
(VC = 3.3 V)
Full
I
400
500
400
500
mA
I
VD
(VD = 1.5 V)
Full
I
0.8
1.2
0.8
1.2
A
Total Power Dissipation
Full
I
5.7
6.8
5.7
6.8
W
ENCODE
INPUTS
Differential Inputs (ENC, ENC)
Input Voltage
Full
IV
0.4
0.4
V
Input
Resistance
60C V
100
100
Input
Capacitance
60C V
35
35
pF
Common-Mode
Voltage
60C V
3
3
V
Single-Ended Inputs (ENC)
Input Voltage
Full
IV
0.4
2
0.4
2
V p-p
Input
Resistance
60C V
50
50
LOGIC INPUTS (RESET)
2
Logic 1 Voltage
Full
IV
2.0
2.0
V
Logic 0 Voltage
Full
IV
0.8
0.8
V
Source I
IH
60C IV
3.4
6
3.4
6
mA
Sink I
IL
60C IV
0.9
1
0.9
1
mA
LOGIC
INPUTS
(DR_EN)
Logic 1 Voltage
Full
IV
1.7
1.7
V
Logic 0 Voltage
Full
IV
0.7
0.7
V
Source I
IH
60C IV
20
50
20
50
A
Sink I
IL
60C IV
30
160
30
160
A

AD12401
Rev. A | Page 4 of 28
AD12401-xxxKWS
AD12401-xxxJWS
Parameter
Case Temp
Test Level
Min
Typ
Max
Min
Typ
Max
Unit
LOGIC OUTPUTS (DRA, DRB, OUTPUT BITS)
3
Differential
Output
Voltage
Full
IV
247 350
454 247 350
454 mV
Output Common-Mode Voltage
Full
IV
1.125
1.25
1.375
1.125
1.25
1.375
V
Output High Voltage
60C
IV
1.602
1.602
V
Output Low Voltage
60C
IV
0.898
0.898
V
1
Tested using input frequency of 70 MHz (see Figure 17).
2
Refer to Table 8 for logic convention on all logic inputs.
3
Digital output logic levels: VC = 3.3 V, C
LOAD
= 8 pF, 2.5 V LVDS, R
T
= 100 .
AC SPECIFICATIONS
1
--ENCODE = 400 MSPS
VA = 3.7 V, VC = 3.3 V, VD = 1.5 V, ENCODE = 400 MSPS, 0C T
CASE
60C, unless otherwise noted.
Table 2.
AD12401-400KWS
AD12401-400JWS
Parameter
Case
Temp Test
Level Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE
SNR
Analog Input 10 MHz
Full
I
62
64
60
62
dBFS
@ -1.0 dBFS 70 MHz
Full
I
61.5
63.5
59.5
61.5
dBFS
128 MHz
Full
I
60
63
58
61
dBFS
175 MHz
Full
I
60
62.5
57.5
60.5
dBFS
SINAD
2
Analog Input 10 MHz
Full
I
59
63.5
57
61.5
dBFS
@ -1.0 dBFS 70 MHz
Full
I
58.5
63
56.5
61
dBFS
128 MHz
Full
I
57.5
61.5
55.5
59.5
dBFS
175 MHz
Full
I
55
60
53
58
dBFS
Spurious-Free Dynamic Range
3
Analog Input 10 MHz
Full
I
69
85
69
85
dBFS
@ -1.0 dBFS 70 MHz
Full
I
69
80
69
80
dBFS
128 MHz
Full
I
66
72
66
72
dBFS
175 MHz
Full
I
62
68
62
68
dBFS
Image Spur
4
Analog Input 10 MHz
Full
I
60
75
60
75
dBFS
@ -1.0 dBFS 70 MHz
Full
I
60
72
60
72
dBFS
128 MHz
Full
I
60
66
60
66
dBFS
175 MHz
Full
I
57
63
57
63
dBFS
Offset Spur
4
Analog Input @ -1.0 dBFS
60C
V
65
65
dBFS
Two-Tone IMD
5
F1, F2 @ -6 dBFS
60C
V
-75
-75
dBc
ANALOG INPUT
Frequency Range
Full
IV
10
175
10
175
MHz
DIGITAL INPUT (DR_EN)
Minimum Time (Low)
Full
IV
5.0
5.0
ns
SWITCHING SPECIFICATIONS
Conversion Rate
6
Full IV 396
400
404
396
400
404
MSPS
Encode Pulse Width High (t
EH
)
1
60C V
1.25
1.25
ns
Encode Pulse Width Low (t
EL
)
1
60C V
1.25
1.25
ns


AD12401
Rev. A | Page 5 of 28
AD12401-400KWS
AD12401-400JWS
Parameter
Case
Temp Test
Level Min Typ Max Min Typ Max Unit
DIGITAL OUTPUT PARAMETERS
Valid Time (t
V
) Full
IV
3.9
3.9
ns
Propagation Delay (t
PD
) 60C
V
8.7
8.7
ns
Rise Time, t
R
(20% to 80%)
60C
V
0.3
0.3
ns
Fall Time, t
F
(20% to 80%)
60C
V
0.3
0.3
ns
DR Propagation Delay (t
EDR
) 60C
V
11.2
11.2
ns
Data to DR Skew (t
EDR
- t
PD
) 60C
V
2.5
2.5
ns
Pipeline Latency
7
Full IV
74
74
Cycles
Start-Up Time
Full
IV
29
44
87
29
44
87
ms
Postprocessing Configuration Time
Full
IV
2.8
2.8
sec
APERTURE DELAY (t
A
) 60C
V
2.3
2.3
ns
APERTURE UNCERTAINTY (Jitter, t
J
) 60C V
0.4
0.4
ps
rms
1
All ac specifications tested with a single-ended, 2.0 V p-p encode on ENCODE and ENCODE floating.
2
The image spur is included in the SINAD measurement.
3
The image spur is not included in the SFDR specification.
4
The image spur is at f
S
/2 A
IN
; the offset spur is at f
S
/2.
5
F1 = 70 MHz, F2 = 73 MHz.
6
Parts are tested with 400 MSPS encode. Device can be clocked at lower encode rates, but specifications are not guaranteed. Specifications are guaranteed by design
for encode 400 MSPS 1%.
7
Pipeline latency is exactly 74 cycles with an additional t
PD
required for data to emerge.
AC SPECIFICATIONS
1
--ENCODE = 360 MSPS
VA = 3.7 V, VC = 3.3 V, VD = 1.5 V, encode = 360 MSPS, 0C T
CASE
60C, unless otherwise noted.
Table 3.
AD12401-360KWS
Parameter Case
Temp
Test
Level
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
SNR
Analog Input 10 MHz
Full
I
62
64
dBFS
@ -1.0 dBFS 70 MHz
Full
I
61.5
63.5
dBFS
128 MHz
Full
I
60
63
dBFS
SINAD
2
Analog Input 10 MHz
Full
I
59
63.5
dBFS
@ -1.0 dBFS 70 MHz
Full
I
58.5
63
dBFS
128 MHz
Full
I
57.5
61.5
dBFS
Spurious-Free Dynamic Range
3
Analog Input 10 MHz
Full
I
69
85
dBFS
@ -1.0 dBFS 70 MHz
Full
I
69
80
dBFS
128 MHz
Full
I
66
72
dBFS
Image Spur
4
Analog Input 10 MHz
Full
I
60
75
dBFS
@ -1.0 dBFS 70 MHz
Full
I
60
72
dBFS
128 MHz
Full
I
60
66
dBFS
Offset Spur
4
Analog Input @ -1.0 dBFS
60C
V
65
dBFS
Two-Tone IMD
5
F1, F2 @ -6 dBFS
60C
V
-75
dBc
ANALOG INPUT
Frequency Range
Full
IV
10
160
MHz
DIGITAL INPUT (DR_EN)
Minimum Time (Low)
Full
IV
5.6
ns