AD5624R/AD5644R/AD5664R Quad,12-14-16 Bit nanoDAC with 5ppm/C On-Chip Reference in MSOP Preliminary Data Sheet (Rev. PrB)
Quad,12-14-16 Bit nanoDAC
TM
with 5ppm/C
On-Chip Reference in MSOP
Preliminary Technical Data
AD5624R/AD5644R/AD5664R
Rev. PrB
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2005 Analog Devices, Inc. All rights reserved.
FEATURES
Low Power Smallest Pin compatible Quad
nanoDACs
AD5664R:
16
Bits
AD5644R:
14
Bits
AD5624R:
12
Bits
On-chip 1.25/2.5V, 5ppm/C Reference
10-lead MSOP and 3mmx3mm LFCSP package
Power-down to 480 nA @ 5 V, 100 nA @ 3 V
3 V /5 V power supply
Guaranteed 16-bit monotonic by design
3 power-down functions
Serial interface with Schmitt-triggered inputs
Rail-to-rail operation
SYNC interrupt facility
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
FUNCTIONAL BLOCK DIAGRAM
POWER-
ON
RESET
INTERFACE
LOGIC
DIN
SYNC
SCLK
I
NPUT
REGISTER
I
NPUT
REGISTER
I
NPUT
REGISTER
I
NPUT
REGISTER
D
A C
REGISTER
DAC
REGISTER
DA C
REGISTER
DAC
REGISTER
STRING
DA C C
STRING
DAC A
STRING
DAC B
STRING
DAC D
BUFFER
BUFFER
BUFFER
BUFFER
POWER-DOWN
LO GIC
VOUTB
VOUTC
VOUTD
VDD
VOUTA
V
REF
AD5624R/AD5644R/AD5664R
GND
1.25/2.5V
Ref
Figure 1.
RELATED DEVICES
Part No.
Description
AD5664
2.7V to 5.5V 16-bit DAC , external
reference
AD5666
GENERAL DESCRIPTION
The AD5624R/AD5644R/AD5664R, members of the nanoDAC
family, are low power, quad, 16-bit buffered voltage-out DAC
that operates from a single 2.7 V to 5.5 V supply and is
guaranteed monotonic by design.
The AD5624R/AD5644R/AD5664R have an on-chip reference
with an internal gain of two. The AD56x4-3 has a 1.25V
5ppm/C max reference and the AD56x4-5 have a 2.5V
5ppm/C reference. The on-board reference is off at power-up
allowing the use of an external reference. The internal
reference is turned on by writing to the DAC.
The part incorporates a power-on reset circuit that ensures the
DAC output powers up to 0 V and remains there until a valid
write takes place. The part contains a power-down feature that
reduces the current consumption of the device to 480 nA at 5 V
and provides software-selectable output loads while in power-
down mode.The low power consumption of this part in normal
operation makes it ideally suited to portable battery-operated
equipment.
The AD5624R/AD5644R/AD5664R's on-chip precision output
amplifier allows rail-to-rail output swing to be achieved.
The AD5624R/AD5644R/AD5664R uses a versatile 3-wire
serial interface that operates at clock rates up to 50 MHz, and is
compatible with standard SPI, QSPITM, MICROWIRETM, and
DSP interface standards.
PRODUCT HIGHLIGHTS
1. Quad 12-14-16-bit DAC
2. On-chip 1.25/2.5V, 5ppm/C Reference
3. Available in 10-lead MSOP and 10-lead 3mmx3mm
LFCSP package.
4. Low power. Typically consumes 0.42 mW at 3 V and
0.75 mW at 5 V.
5.
10 s max settling time.
AD5624R/AD5644R/AD5664R
Preliminary Technical Data
Rev. PrB | Page 2 of 33
TABLE OF CONTENTS
Specifications..................................................................................... 3
Timing Characteristics..................................................................... 9
Absolute Maximum Ratings.......................................................... 10
ESD Caution................................................................................ 10
Pin Configuration and Function Description ............................ 11
Typical Performance Characteristics ........................................... 12
Terminology .................................................................................... 17
Theory of Operation ...................................................................... 19
D/A Section................................................................................. 19
Resistor String ............................................................................. 19
Output Amplifier........................................................................ 19
Serial Interface ............................................................................ 19
Input Shift Register..................................................................... 20
SYNC
Interrupt .......................................................................... 20
Power-On Reset.......................................................................... 20
Power-Down Modes .................................................................. 23
Microprocessor Interfacing....................................................... 25
Applications..................................................................................... 26
Using a Reference as a Power Supply for the
AD5624R/AD5644R/AD5664R ............................................... 26
Bipolar Operation Using the AD5624R/AD5644R/AD5664R
....................................................................................................... 26
Using AD5624R/AD5644R/AD5664Rwith a
Galvanically Isolated Interface ................................................. 26
Power Supply Bypassing and Grounding................................ 26
Outline Dimensions ....................................................................... 26
Ordering Guide .......................................................................... 26
REVISION HISTORY
Xx/05--Revision 0: Initial Version
Preliminary Technical Data
AD5624R/AD5644R/AD5664R
Rev. PrB | Page 3 of 33
AD56
X
4R5 SPECIFICATIONS
(V
DD
= +4.5 V to +5.5 V; R
L
= 2 k to GND; C
L
= 200 pF to GND; V
REFIN
= V
DD
; all specifications T
MIN
to T
MAX
unless otherwise noted)
Table 1.
Parameter
A Grade
B Grade
Unit
B Version
1
Conditions/Comments
STATIC PERFORMANCE
2
AD5664R
Resolution
16
16
Bits min
Relative Accuracy
32
tbd
LSB max
Differential Nonlinearity
1
1
LSB max
Guaranteed Monotonic by Design.
AD5644R
Resolution
14
14
Bits min
Relative Accuracy
8
4
LSB max
Differential Nonlinearity
1
1
LSB max
Guaranteed Monotonic by Design.
AD5624R
Resolution
12
12
Bits min
Relative Accuracy
4
1
LSB max
Differential Nonlinearity
1
1
LSB max
Guaranteed Monotonic by Design.
Load Regulation
2
2
LSB/mA
VDD=Vref=5V, Midscale Iout=0mA to 15mA
sourcing/sinking
Zero Code Error
+2
+2
mV typ
All Zeroes Loaded to DAC Register
+10
+10
mV
max
Offset Error
10
10
mV max
Full-Scale Error
-0.15
-0.15
% of FSR typ
All Ones Loaded to DAC Register.
-1
-1
% of FSR max
Gain Error
1. 5
1. 5
% of FSR max
Zero Code Error Drift
3
2
2
V/C
typ
Gain Temperature Coefficient
2.5
2.5
ppm typ
of FSR/C
DC Power Supply Rejection Ratio
-100
-100
dB typ
DAC code = midscale; V
DD
= 5V 10%
DC Crosstalk
6
(Ext Ref)
10 10 V
R
L
= 2 k. to GND or V
DD
4.5
4.5
V/mA
Due to Load current change
-10
-10
V
Due to Powering Down (per channel)
DC Crosstalk
6
(Int Ref)
20 20 V
R
L
= 2 k. to GND or V
DD
9
9
V/mA
Due to Load current change
-20
-20
V
Due to Powering Down (per channel)
OUTPUT CHARACTERISTICS
3
Output Voltage Range
0
0
V min
V
DD
V
DD
V
max
Capacitive Load Stability
2
2
nF typ
R
L
=
10
10
nF
typ
R
L
=2 k
DC Output Impedance
0.5
0.5
typ
Short Circuit Current
30
30
mA typ
V
DD
=+5V
Power-Up Time
4
4
s typ
Coming Out of Power-Down Mode. V
DD
=+5V
REFERENCE INPUTS
3
Reference Input voltage
V
DD
V
DD
V
1% for specified performance
Reference Current
40 40 A typ
V
REF
= V
DD
= +5.5V
1
Temperature Range: A grade (-40C to +105C); B grade (-40C to +105C);
2
Linearity calculated using a reduced code range: AD5664R( Code 512 to code 65024); AD5644R ( Code tbd to code tbd); AD5624R ( Code tbd to code tbd) . Output
unloaded.
3
Guaranteed by design and characterization, not production tested.
Reference input range at ambient where 1 LSB max DNL specification is achievable.
AD5624R/AD5644R/AD5664R
Preliminary Technical Data
Rev. PrB | Page 4 of 33
Parameter
A Grade
B Grade
Unit
B Version
1
Conditions/Comments
75 75 A max
Reference Input Range
0.75 0.75 V min
V
DD
V
DD
V max
Reference Input Impedance
150 150 k
Per DAC channel
REFERENCE OUTPUT
Output Voltage
2.495
2.495
V min
At ambient
2.505
2.505
V max
Reference TC
10
10
ppm/C typ
Output Impedance
2
2
k
typ
LOGIC INPUTS
3
Input Current
2
2
A max
All digital inputs
V
INL
, Input Low Voltage
0.8
0.8
V max
V
DD
=+5 V
V
INH
, Input High Voltage
2
2
V min
V
DD
=+5 V
Pin Capacitance
3
3
pF typ
POWER REQUIREMENTS
V
DD
4.5
4.5
V min
All Digital Inputs at 0 or V
DD
5.5
5.5
V max
DAC Active and Excluding Load Current
I
DD
(Normal Mode)
V
DD
=4.5 V to +5.5 V
1
1
mA typ
V
IH
=V
DD
and V
IL
=GND
V
DD
=4.5 V to +5.5 V
2
2
mA max
Internal Reference Off
V
DD
=4.5 V to +5.5 V
1
1
mA typ
V
IH
=V
DD
and V
IL
=GND
V
DD
=4.5 V to +5.5 V
3
3
mA max
Internal Reference On
I
DD
(All Power-Down Modes)
V
DD
=4.5 V to +5.5 V
0.48
0.48
A typ
V
IH
=V
DD
and V
IL
=GND
V
DD
=4.5 V to +5.5 V
1
1
A max
V
IH
=V
DD
and V
IL
=GND
POWER EFFICIENCY
I
OUT
/I
DD
90
90
%
I
LOAD
=2 mA, V
DD
=+5 V
Preliminary Technical Data
AD5624R/AD5644R/AD5664R
Rev. PrB | Page 5 of 33
AC CHARACTERISTICS
1
(V
DD
= +4.5 V to +5.5 V; R
L
= 2 k to GND; C
L
= 200 pF to GND; V
REFIN
= V
DD
; all specifications T
MIN
to T
MAX
unless otherwise noted)
Parameter
2
Min
Typ
Max
Unit
B Version
1
Conditions/Comments
Output Voltage Settling Time
AD5624R
6
8
s
to scale settling to 2LSB
AD5644R
7
9
s
to scale settling to 2LSB
AD5664R
8
10
s
to scale settling to 2LSB
Settling Time for 1LSB Step
Slew Rate
1.5
V/s
Digital-to-Analog Glitch Impulse
10
nV-s
1 LSB Change Around Major Carry.
Channel to-Channel Isolation
100
dB
Digital Feedthrough
0.5
nV-s
Digital Crosstalk
0.5
nV-s
Analog Crosstalk
1
nV-s
DAC-to-DAC Crosstalk
3
nV-s
Multiplying Bandwidth
200
kHz
VREF = 2V 0.1 V p-p.
Total Harmonic Distortion
-80
dB
VREF = 2V 0.1 V p-p. Frequency = 10kHz
Output Noise Spectral Density
120
nV/Hz
DAC code=8400
H
, 1kHz
100
nV/Hz
DAC code=8400
H
, 10kHz
Output Noise
15
Vp-p
0.1Hz to 10Hz;
NOTES
1
Guaranteed by design and characterization; not production
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