REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
AD8350
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2001
Low Distortion
1.0 GHz Differential Amplifier
FEATURES
High Dynamic Range
Output IP3: +28 dBm: Re 50 @ 250 MHz
Low Noise Figure: 5.9 dB @ 250 MHz
Two Gain Versions:
AD8350-15: 15 dB
AD8350-20: 20 dB
3 dB Bandwidth: 1.0 GHz
Single Supply Operation: 5 V to 10 V
Supply Current: 28 mA
Input/Output Impedance: 200
Single-Ended or Differential Input Drive
8-Lead SOIC Package and 8-Lead microSOIC Package
APPLICATIONS
Cellular Base Stations
Communications Receivers
RF/IF Gain Block
Differential A-to-D Driver
SAW Filter Interface
Single-Ended-to-Differential Conversion
High Performance Video
High Speed Data Transmission
PRODUCT DESCRIPTION
The AD8350 series are high performance fully-differential
amplifiers useful in RF and IF circuits up to 1000 MHz. The
amplifier has excellent noise figure of 5.9 dB at 250 MHz. It
offers a high output third order intercept (OIP3) of +28 dBm
at 250 MHz. Gain versions of 15 dB and 20 dB are offered.
The AD8350 is designed to meet the demanding performance
requirements of communications transceiver applications. It
enables a high dynamic range differential signal chain, with
exceptional linearity and increased common-mode rejection.
The device can be used as a general purpose gain block, an
A-to-D driver, and high speed data interface driver, among
other functions. The AD8350 input can also be used as a single-
ended-to-differential converter.
The amplifier can be operated down to 5 V with an OIP3 of
+28 dBm at 250 MHz and slightly reduced distortion perfor-
mance. The wide bandwidth, high dynamic range and temperature
stability make this product ideal for the various RF and IF
frequencies required in cellular, CATV, broadband, instrumen-
tation and other applications.
The AD8350 is offered in an 8-lead single SOIC package and
SOIC package. It operates from 5 V and 10 V power supplies,
drawing 28 mA typical. The AD8350 offers a power enable func-
tion for power-sensitive applications. The AD8350 is fabricated
using Analog Devices' proprietary high speed complementary
bipolar process. The device is available in the industrial (40
C to
+85
C) temperature range.
FUNCTIONAL BLOCK DIAGRAM
8-Lead SOIC and SOIC Packages (with Enable)
1
2
3
4
8
7
6
5
AD8350
IN+
IN
ENBL
OUT+
OUT
V
CC
GND
+
GND
REV. A
2
AD8350SPECIFICATIONS
(@ 25 C, V
S
= 5 V, G = 15 dB, unless otherwise noted. All specifications refer to
differential inputs and differential outputs unless noted.)
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
3 dB Bandwidth
V
S
= 5 V, V
OUT
= 1 V p-p
0.9
GHz
V
S
= 10 V, V
OUT
= 1 V p-p
1.1
GHz
Bandwidth for 0.1 dB Flatness
V
S
= 5 V, V
OUT
= 1 V p-p
90
MHz
V
S
= 10 V, V
OUT
= 1 V p-p
90
MHz
Slew Rate
V
OUT
= 1 V p-p
2000
V/
s
Settling Time
0.1%, V
OUT
= 1 V p-p
10
ns
Gain (S21)
1
V
S
= 5 V, f = 50 MHz
14
15
16
dB
Gain Supply Sensitivity
V
S
= 5 V to 10 V, f = 50 MHz
0.003
dB/V
Gain Temperature Sensitivity
T
MIN
to T
MAX
0.002
dB/
C
Isolation (S12)
1
f = 50 MHz
18
dB
NOISE/HARMONIC PERFORMANCE
50 MHz Signal
Second Harmonic
V
S
= 5 V, V
OUT
= 1 V p-p
66
dBc
V
S
= 10 V, V
OUT
= 1 V p-p
67
dBc
Third Harmonic
V
S
= 5 V, V
OUT
= 1 V p-p
65
dBc
V
S
= 10 V, V
OUT
= 1 V p-p
70
dBc
Output Second Order Intercept
2
V
S
= 5 V
58
dBm
V
S
= 10 V
58
dBm
Output Third Order Intercept
2
V
S
= 5 V
28
dBm
V
S
= 10 V
29
dBm
250 MHz Signal
Second Harmonic
V
S
= 5 V, V
OUT
= 1 V p-p
48
dBc
V
S
= 10 V, V
OUT
= 1 V p-p
49
dBc
Third Harmonic
V
S
= 5 V, V
OUT
= 1 V p-p
52
dBc
V
S
= 10 V, V
OUT
= 1 V p-p
61
dBc
Output Second Order Intercept
2
V
S
= 5 V
39
dBm
V
S
= 10 V
40
dBm
Output Third Order Intercept
2
V
S
= 5 V
24
dBm
V
S
= 10 V
28
dBm
1 dB Compression Point (RTI)
2
V
S
= 5 V
2
dBm
V
S
= 10 V
5
dBm
Voltage Noise (RTI)
f = 150 MHz
1.7
nV/
Hz
Noise Figure
f = 150 MHz
6.8
dB
INPUT/OUTPUT CHARACTERISTICS
Differential Offset Voltage (RTI)
V
OUT+
V
OUT
1
mV
Differential Offset Drift
T
MIN
to T
MAX
0.02
mV/
C
Input Bias Current
15
A
Input Resistance
Real
200
CMRR
f = 50 MHz
67
dB
Output Resistance
Real
200
POWER SUPPLY
Operating Range
4
11.0
V
Quiescent Current
Powered Up, V
S
= 5 V
25
28
32
mA
Powered Down, V
S
= 5 V
3
3.8
5.5
mA
Powered Up, V
S
= 10 V
27
30
34
mA
Powered Down, V
S
= 10 V
3
4
6.5
mA
Power-Up/Down Switching
15
ns
Power Supply Rejection Ratio
f = 50 MHz, V
S
= 1 V p-p
58
dB
OPERATING TEMPERATURE RANGE
40
+85
C
NOTES
1
See Tables IIIII for complete list of S-Parameters.
2
Re: 50
.
Specifications subject to change without notice.
REV. A
3
AD8350
(@ 25 C, V
S
= 5 V, G = 20 dB, unless otherwise noted. All specifications refer to
differential inputs and differential outputs unless noted.)
AD8350-20SPECIFICATIONS
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
3 dB Bandwidth
V
S
= 5 V, V
OUT
= 1 V p-p
0.7
GHz
V
S
= 10 V, V
OUT
= 1 V p-p
0.9
GHz
Bandwidth for 0.1 dB Flatness
V
S
= 5 V, V
OUT
= 1 V p-p
90
MHz
V
S
= 10 V, V
OUT
= 1 V p-p
90
MHz
Slew Rate
V
OUT
= 1 V p-p
2000
V/
s
Settling Time
0.1%, V
OUT
= 1 V p-p
15
ns
Gain (S21)
1
V
S
= 5 V, f = 50 MHz
19
20
21
dB
Gain Supply Sensitivity
V
S
= 5 V to 10 V, f = 50 MHz
0.003
dB/V
Gain Temperature Sensitivity
T
MIN
to T
MAX
0.002
dB/
C
Isolation (S12)
1
f = 50 MHz
22
dB
NOISE/HARMONIC PERFORMANCE
50 MHz Signal
Second Harmonic
V
S
= 5 V, V
OUT
= 1 V p-p
65
dBc
V
S
= 10 V, V
OUT
= 1 V p-p
66
dBc
Third Harmonic
V
S
= 5 V, V
OUT
= 1 V p-p
66
dBc
V
S
= 10 V, V
OUT
= 1 V p-p
70
dBc
Output Second Order Intercept
2
V
S
= 5 V
56
dBm
V
S
= 10 V
56
dBm
Output Third Order Intercept
2
V
S
= 5 V
28
dBm
V
S
= 10 V
29
dBm
250 MHz Signal
Second Harmonic
V
S
= 5 V, V
OUT
= 1 V p-p
45
dBc
V
S
= 10 V, V
OUT
= 1 V p-p
46
dBc
Third Harmonic
V
S
= 5 V, V
OUT
= 1 V p-p
55
dBc
V
S
= 10 V, V
OUT
= 1 V p-p
60
dBc
Output Second Order Intercept
2
V
S
= 5 V
37
dBm
V
S
= 10 V
38
dBm
Output Third Order Intercept
2
V
S
= 5 V
24
dBm
V
S
= 10 V
28
dBm
1 dB Compression Point (RTI)
2
V
S
= 5 V
2.6
dBm
V
S
= 10 V
1.8
dBm
Voltage Noise (RTI)
f = 150 MHz
1.7
nV/
Hz
Noise Figure
f = 150 MHz
5.6
dB
INPUT/OUTPUT CHARACTERISTICS
Differential Offset Voltage (RTI)
V
OUT+
V
OUT
1
mV
Differential Offset Drift
T
MIN
to T
MAX
0.02
mV/
C
Input Bias Current
15
A
Input Resistance
Real
200
CMRR
f = 50 MHz
52
dB
Output Resistance
Real
200
POWER SUPPLY
Operating Range
4
11.0
V
Quiescent Current
Powered Up, V
S
= 5 V
25
28
32
mA
Powered Down, V
S
= 5 V
3
3.8
5.5
mA
Powered Up, V
S
= 10 V
27
30
34
mA
Powered Down, V
S
= 10 V
3
4
6.5
mA
Power-Up/Down Switching
15
ns
Power Supply Rejection Ratio
f = 50 MHz, V
S
= 1 V p-p
45
dB
OPERATING TEMPERATURE RANGE
40
+85
C
NOTES
1
See Tables IIIII for complete list of S-Parameters.
2
Re: 50
.
REV. A
AD8350
4
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8350 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
Brand Code
AD8350AR15
40
C to +85C
8-Lead SOIC
SO-8
Standard
AD8350AR15-REEL
40
C to +85C
8-Lead SOIC 13" Reel
SO-8
Standard
AD8350AR15-REEL7
40
C to +85C
8-Lead SOIC 7" Reel
SO-8
Standard
AD8350ARM15
40
C to +85C
8-Lead microSOIC
RM-8
J2N
AD8350ARM15-REEL
40
C to +85C
8-Lead microSOIC 13" Reel
RM-8
J2N
AD8350ARM15-REEL7
40
C to +85C
8-Lead microSOIC 7" Reel
RM-8
J2N
AD8350AR20
40
C to +85C
8-Lead SOIC
SO-8
Standard
AD8350AR20-REEL
40
C to +85C
8-Lead SOIC 13" Reel
SO-8
Standard
AD8350AR20-REEL7
40
C to +85C
8-Lead SOIC 7" Reel
SO-8
Standard
AD8350ARM20
40
C to +85C
8-Lead microSOIC
RM-8
J2P
AD8350ARM20-REEL
40
C to +85C
8-Lead microSOIC 13" Reel
RM-8
J2P
AD8350ARM20-REEL7
40
C to +85C
8-Lead microSOIC 7" Reel
RM-8
J2P
AD8350-EVAL
SOIC Evaluation Board
PIN FUNCTION DESCRIPTIONS
Pin
Function
Description
1, 8
IN+, IN
Differential Inputs. IN+ and IN
should be ac-coupled (pins have a dc
bias of midsupply). Differential input
impedance is 200
.
2
ENBL
Power-up Pin. A high level (5 V) enables
the device; a low level (0 V) puts device
in sleep mode.
3
V
CC
Positive Supply Voltage. 5 V to 10 V.
4, 5
OUT+, OUT
Differential Outputs. OUT+ and
OUT should be ac-coupled (pins have
a dc bias of midsupply). Differential
input impedance is 200
.
6, 7
GND
Common External Ground Reference.
ABSOLUTE MAXIMUM RATINGS
*
Supply Voltage, V
S
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 V
Input Power Differential . . . . . . . . . . . . . . . . . . . . . . +8 dBm
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . 400 mW
JA
SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
C/W
JA
SOIC (RM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133C/W
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 125
C
Operating Temperature Range . . . . . . . . . . . 40
C to +85C
Storage Temperature Range . . . . . . . . . . . . 65
C to +150C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300
C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
IN+
ENBL
V
CC
OUT+
IN
GND
GND
OUT
AD8350
REV. A
5
Typical Performance CharacteristicsAD8350
TEMPERATURE C
SUPPLY CURRENT
mA
50
40
40
30
20
10
0
20
0
20
40
60
80
V
CC
= 5V
V
CC
= 10V
TPC 1. Supply Current vs.
Temperature
FREQUENCY MHz
IMPEDANCE
350
1
300
250
200
150
100
10
100
1k
V
CC
= 10V
V
CC
= 5V
TPC 4. AD8350-15 Input Imped-
ance vs. Frequency
FREQUENCY MHz
IMPEDANCE
800
0
0
10
1000
100
200
400
600
SOIC
SOIC
TPC 7. AD8350-20 Output Imped-
ance vs. Frequency
FREQUENCY MHz
GAIN
dB
20
1
15
10
5
0
10
100
1k
10k
V
CC
= 10V
V
CC
= 5V
TPC 2. AD8350-15 Gain (S21) vs.
Frequency
FREQUENCY MHz
IMPEDANCE
350
1
300
250
200
150
100
10
100
1k
V
CC
= 10V
V
CC
= 5V
TPC 5. AD8350-20 Input Impedance
vs. Frequency
FREQUENCY MHz
ISOLATION
dB
5
1
10
15
20
25
10
100
1k
10k
V
CC
= 10V
V
CC
= 5V
TPC 8. AD8350-15 Isolation (S12)
vs. Frequency
FREQUENCY MHz
GAIN
dB
25
1
20
15
10
5
10
100
1k
10k
V
CC
= 10V
V
CC
= 5V
TPC 3. AD8350-20 Gain (S21) vs.
Frequency
FREQUENCY MHz
IMPEDANCE
500
100
0
0
10
1000
100
200
300
400
SOIC
SOIC
TPC 6. AD8350-15 Output Impedance
vs. Frequency
FREQUENCY MHz
ISOLATION
dB
10
1
15
20
25
30
10
100
1k
10k
V
CC
= 10V
V
CC
= 5V
TPC 9. AD8350-20 Isolation (S12)
vs. Frequency
REV. A
AD8350
6
FUNDAMENTAL FREQUENCY MHz
DISTORTION
dBc
40
0
45
50
55
60
65
70
75
80
50
100
150
200
250
300
V
OUT
= 1V p-p
HD3 (V
CC
= 10V)
HD3 (V
CC
= 5V)
HD2 (V
CC
= 5V)
HD2 (V
CC
= 10V)
TPC 10. AD8350-15 Harmonic
Distortion vs. Frequency
OUTPUT VOLTAGE V p-p
DISTORTION
dBc
45
0
55
65
75
85
0.5
1
1.5
2
2.5
3
3.5
F
O
= 50MHz
HD3 (V
CC
= 10V)
HD3 (V
CC
= 5V)
HD2 (V
CC
= 5V)
HD2 (V
CC
= 10V)
TPC 13. AD8350-20 Harmonic Distor-
tion vs. Differential Output Voltage
FREQUENCY MHz
OIP3
dBm (Re: 50
)
41
0
50
100
150
200
250
300
36
31
26
21
16
11
V
CC
= 10V
V
CC
= 5V
TPC 16. AD8350-15 Output Referred
IP3 vs. Frequency
FUNDAMENTAL FREQUENCY MHz
DISTORTION
dBc
40
0
45
50
55
60
65
70
75
80
50
100
150
200
250
300
V
OUT
= 1V p-p
HD3 (V
CC
= 10V)
HD3 (V
CC
= 5V)
HD2 (V
CC
= 5V)
HD2 (V
CC
= 10V)
TPC 11. AD8350-20 Harmonic Dis-
tortion vs. Frequency
FREQUENCY MHz
OIP2
dBm (Re: 50
)
66
0
50
100
150
200
250
300
61
56
51
46
41
36
V
CC
= 10V
V
CC
= 5V
TPC 14. AD8350-15 Output Referred
IP2 vs. Frequency
FREQUENCY MHz
OIP3
dBm (Re: 50
)
41
0
50
100
150
200
250
300
36
31
26
21
16
11
V
CC
= 10V
V
CC
= 5V
TPC 17. AD8350-20 Output Referred
IP3 vs. Frequency
OUTPUT VOLTAGE V p-p
DISTORTION
dBc
45
0
55
65
75
85
0.5
1
1.5
2
2.5
3
3.5
F
O
= 50MHz
HD3 (V
CC
= 10V)
HD3 (V
CC
= 5V)
HD2 (V
CC
= 5V)
HD2 (V
CC
= 10V)
TPC 12. AD8350-15 Harmonic Distor-
tion vs. Differential Output Voltage
FREQUENCY MHz
OIP2
dBm (Re: 50
)
66
0
50
100
150
200
250
300
61
56
51
46
41
36
V
CC
= 10V
V
CC
= 5V
TPC 15. AD8350-20 Output Referred
IP2 vs. Frequency
FREQUENCY MHz
1dB COMPRESSION
dBm (Re: 50
)
0
100
200
300
400
500
600
7.5
5.0
2.5
0
2.5
5.0
V
CC
= 10V
V
CC
= 5V
INPUT REFERRED
10.0
TPC 18. AD8350-15 1 dB Compres-
sion vs. Frequency
REV. A
AD8350
7
FREQUENCY MHz
1dB COMPRESSION
dBm (Re: 50
)
0
100
200
300
400
500
600
7.5
5.0
2.5
0
2.5
5.0
V
CC
= 10V
V
CC
= 5V
INPUT REFERRED
7.5
TPC 19. AD8350-20 1 dB Compres-
sion vs. Frequency
V
CC
Volts
1
GAIN
dB
25
20
15
10
5
0
5
10
15
20
2
3
4
5
6
7
8
9
10
AD8350-20
AD8350-15
TPC 22. AD8350 Gain (S21) vs.
Supply Voltage
FREQUENCY MHz
PSRR
dB
20
1
30
40
50
60
70
80
90
10
100
1k
V
CC
= 5V
AD8350-20
AD8350-15
TPC 25. AD8350 CMRR vs. Frequency
FREQUENCY MHz
NOISE FIGURE
dB
10
0
50 100 150 200 250 300 350 400 450 500
9
8
7
6
5
V
CC
= 10V
V
CC
= 5V
TPC 20. AD8350-15 Noise Figure
vs. Frequency
TEMPERATURE C
OUTPUT OFFSET
mV
100
40
50
0
50
100
150
200
250
20
0
20
40
60
80
V
OUT
(V
CC
= 5V)
V
OUT
(V
CC
= 10V)
V
OUT
+ (V
CC
= 10V)
V
OUT
+ (V
CC
= 5V)
TPC 23. AD8350 Output Offset Volt-
age vs. Temperature
5V
V
CC
= 5V
500mV
30ns
V
OUT
ENBL
TPC 26. AD8350 Power-Up/Down
Response Time
FREQUENCY MHz
NOISE FIGURE
dB
10
0
50 100 150 200 250 300 350 400 450 500
9
8
7
6
5
V
CC
= 10V
V
CC
= 5V
TPC 21. AD8350-20 Noise Figure
vs. Frequency
FREQUENCY MHz
PSRR
dB
20
1
30
40
50
60
70
80
90
10
100
1k
V
CC
= 5V
AD8350-20
AD8350-15
TPC 24. AD8350 PSRR vs. Frequency
REV. A
AD8350
8
APPLICATIONS
Using the AD8350
Figure 1 shows the basic connections for operating the AD8350.
A single supply in the range 5 V to 10 V is required. The power
supply pin should be decoupled using a 0.1
F capacitor. The
ENBL pin is tied to the positive supply or to 5 V (when V
CC
=
10 V) for normal operation and should be pulled to ground to
put the device in sleep mode. Both the inputs and the outputs
have dc bias levels at midsupply and should be ac-coupled.
Also shown in Figure 1 are the impedance balancing requirements,
either resistive or reactive, of the input and output. With an
input and output impedance of 200
, the AD8350 should be
driven by a 200
source and loaded by a 200 impedance. A
reactive match can also be implemented.
8
7
6
5
1
2
3
4
AD8350
+
ENBL (5V)
+V
S
(5V TO 10V)
C5
0.1 F
C4
0.001 F
C3
0.001 F
LOAD
Z = 200
C2
0.001 F
C1
0.001 F
SOURCE
Z = 100
Z = 100
Figure 1. Basic Connections for Differential Drive
Figure 2 shows how the AD8350 can be driven by a single-
ended source. The unused input should be ac-coupled to ground.
When driven single-endedly, there will be a slight imbalance in
the differential output voltages. This will cause an increase in
the second order harmonic distortion (at 50 MHz, with V
CC
=
10 V and V
OUT
= 1 V p-p, 59 dBc was measured for the second
harmonic on AD8350-15).
8
7
6
5
1
2
3
4
AD8350
+
ENBL (5V)
+V
S
(5V TO 10V)
C5
0.1 F
C4
0.001 F
C3
0.001 F
LOAD
Z = 200
C2
0.001 F
SOURCE
Z = 200
C1
0.001 F
Figure 2. Basic Connections for Single-Ended Drive
Reactive Matching
In practical applications, the AD8350 will most likely be matched
using reactive matching components as shown in Figure 3.
Matching components can be calculated using a Smith Chart or
by using a resonant approach to determine the matching network
that results in a complex conjugate match. In either situation,
the circuit can be analyzed as a single-ended equivalent circuit
to ease calculations as shown in Figure 4.
V
S
8
7
6
5
1
2
3
4
AD8350
+
ENBL (5V)
+V
S
(5V TO 10V)
0.1 F
R
LOAD
C
AC
C
AC
C
P
L
S
/2
L
S
/2
R
S
/2
R
S
/2
C
AC
C
AC
C
P
L
S
/2
L
S
/2
Figure 3. Reactively Matching the Input and Output
V
S
8
7
6
5
1
2
3
4
AD8350
+
ENBL (5V)
+V
S
(5V TO 10V)
0.1 F
R
LOAD
C
AC
C
P
L
S
R
S
C
AC
C
P
L
S
C
AC
C
AC
Figure 4. Single-Ended Equivalent Circuit
When the source impedance is smaller than the load impedance,
a step-up matching network is required. A typical step-up network
is shown on the input of the AD8350 in Figure 3. For purely
resistive source and load impedances the resonant approach may
be used. The input and output impedance of the AD8350 can be
modeled as a real 200
resistance for operating frequencies less
than 100 MHz. For signal frequencies exceeding 100 MHz, classi-
cal Smith Chart matching techniques should be invoked in order
to deal with the complex impedance relationships. Detailed S
parameter data measured differentially in a 200
system can be
found in Tables II and III.
For the input matching network the source resistance is less
than the input resistance of the AD8350. The AD8350 has a
nominal 200
input resistance from Pins 1 to 8. The reactance
of the ac-coupling capacitors, C
AC
, should be negligible if 100 nF
capacitors are used and the lowest signal frequency is greater
than 1 MHz. If the series reactance of the matching network
inductor is defined to be X
S
= 2
f L
S
, and the shunt reactance
of the matching capacitor to be X
P
= (2
f C
P
)
1
, then:
X
R
R
X
X
R
R
R
R
S
S
LOAD
P
P
LOAD
S
LOAD
S
=
=
where
(1)
For a 70 MHz application with a 50
source resistance, and
assuming the input impedance is 200
, or R
LOAD
= R
IN
= 200
,
then X
P
= 115.5
and X
S
= 86.6
, which results in the follow-
ing component values:
C
P
= (2
70 10
6
115.5)
1
= 19.7 pF and
L
S
= 86.6
(2 70 10
6
)
1
= 197 nH
REV. A
AD8350
9
For the output matching network, if the output source resis-
tance of the AD8350 is greater than the terminating load
resistance, a step-down network should be employed as shown
on the output of Figure 3. For a step-down matching network,
the series and parallel reactances are calculated as:
X
R
R
X
X
R
R
R
R
S
S
LOAD
P
P
S
LOAD
S
LOAD
=
=
where
(2)
For a 10 MHz application with the 200
output source resistance
of the AD8350, R
S
= 200
, and a 50 load termination, R
LOAD
=
50
, then X
P
= 115.5
and X
S
= 86.6
, which results in
the following component values:
C
P
= (2
10 10
6
115.5)
1
= 138 pF and
L
S
= 86.6
(2 10 10
6
)
1
= 1.38
H
The same results can be obtained using the plots in Figure 5
and Figure 6. Figure 5 shows the normalized shunt reactance
versus the normalized source resistance for a step-up matching
network, R
S
< R
LOAD
. By inspection, the appropriate reactance
can be found for a given value of R
S
/R
LOAD
. The series reactance
is then calculated using X
S
= R
S
R
LOAD
/X
P.
The same technique
can be used to design the step-down matching network using
Figure 6.
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0.01
0.05
0.09
0.13
0.17
0.21
0.25
0.29
0.33
0.37
0.41
0.45
0.49
0.53
0.57
0.61
0.65
0.69
0.73
0.77
NORMALIZED REA
C
T
ANCE
X
P
/R
LO
AD
NORMALIZED SOURCE RESISTANCE R
SOURCE
/R
LOAD
R
SOURCE
X
S
R
LOAD
X
P
Figure 5. Normalized Step-Up Matching Components
NORMALIZED REA
C
T
ANCE
X
P
/R
LO
AD
NORMALIZED SOURCE RESISTANCE R
SOURCE
/R
LOAD
3.2
3
2.8
2.6
2.4
2.2
2
2
2.4
2.8
3.2
3.6
4
4.4
4.8
5.2
5.6
6
6.4
6.8
7.2
7.6
8
8.4
8.8
R
SOURCE
X
S
R
LOAD
X
P
Figure 6. Normalized Step-Down Matching Components
The same results could be found using a Smith Chart as shown
in Figure 7. In this example, a shunt capacitor and a series inductor
are used to match the 200
source to a 50 load. For a fre-
quency of 10 MHz, the same capacitor and inductor values
previously found using the resonant approach will transform the
200
source to match the 50 load. At frequencies exceeding
100 MHz, the S parameters from Tables II and III should be
used to account for the complex impedance relationships.
SOURCE
LOAD
SHUNT C
SERIES L
Figure 7. Smith Chart Representation of Step-Down Network
After determining the matching network for the single-ended
equivalent circuit, the matching elements need to be applied in a
differential manner. The series reactance needs to be split such
that the final network is balanced. In the previous examples, this
simply translates to splitting the series inductor into two equal
halves as shown in Figure 3.
Gain Adjustment
The effective gain of the AD8350 can be reduced using a num-
ber of techniques. Obviously a matched attenuator network will
reduce the effective gain, but this requires the addition of a
separate component which can be prohibitive in size and cost.
The attenuator will also increase the effective noise figure resulting
in an SNR degradation. A simple voltage divider can be imple-
mented using the combination of the driving impedance of the
previous stage and a shunt resistor across the inputs of the AD8350
as shown in Figure 8. This provides a compact solution but
suffers from an increased noise spectral density at the input
of the AD8350 due to the thermal noise contribution of the
shunt resistor. The input impedance can be dynamically altered
through the use of feedback resistors as shown in Figure 9. This
will result in a similar attenuation of the input signal by virtue
of the voltage divider established from the driving source imped-
ance and the reduced input impedance of the AD8350. Yet
this technique does not significantly degrade the SNR with
the unnecessary increase in thermal noise that arises from a truly
resistive attenuator network.
REV. A
AD8350
10
V
S
8
7
6
5
1
2
3
4
AD8350
+
ENBL (5V)
+V
S
(5V TO 10V)
0.1 F
C
AC
R
S
C
AC
C
AC
C
AC
R
SHUNT
R
SHUNT
R
S
R
L
R
L
Figure 8. Gain Reduction Using Shunt Resistor
V
S
8
7
6
5
1
2
3
4
AD8350
+
ENBL
(5V)
+V
S
(5V TO 10V)
0.1 F
R
S
C
AC
C
AC
R
S
R
L
R
L
C
AC
C
AC
R
FEXT
R
FEXT
Figure 9. Dynamic Gain Reduction
Figure 8 shows a typical implementation of the shunt divider
concept. The reduced input impedance that results from the
parallel combination of the shunt resistor and the input impedance
of the AD8350 adds attenuation to the input signal effectively
reducing the gain. For frequencies less than 100 MHz, the input
impedance of the AD8350 can be modeled as a real 200
resis-
tance (differential). Assuming the frequency is low enough to
ignore the shunt reactance of the input, and high enough such
that the reactance of moderately sized ac-coupling capacitors
can be considered negligible, the insertion loss, IL, due to the
shunt divider can be expressed as:
IL dB
Log
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
gl
nded
IN
IN
S
IN
SHUNT
IN
SHUNT
S
IN
SHUNT
IN
SHUNT
IN
SHUNT
IN
(
)
(
)
(
)
=
+
+
=
+
=
-
20
100
10
where
and
sin e e
(3)
The insertion loss and the resultant power gain for multiple
shunt resistor values is summarized in Table I. The source
resistance and input impedance need careful attention when
using Equation 1. The reactance of the input impedance of the
AD8350 and the ac-coupling capacitors need to be considered
before assuming they have negligible contribution. Figure 10
shows the effective power gain for multiple values of R
SHUNT
for
the AD8350-15 and AD8350-20.
Table I. Gain Adjustment Using Shunt Resistor,
R
S
= 100
and R
IN
= 100 Single-Ended
Power GaindB
R
SHUNT
ILdB
AD8350-15
AD8350-20
50
6.02
8.98
13.98
100
3.52
11.48
16.48
200
1.94
13.06
18.06
300
1.34
13.66
18.66
400
1.02
13.98
18.98
R
SHUNT
20
0
GAIN
dB
18
16
14
12
10
8
6
4
2
0
100
200
300
400
500
600
700
800
AD8350-20
AD8350-15
Figure 10. Gain for Multiple Values of Shunt Resistance
for Circuit in Figure 8
The gain can be adjusted dynamically by employing external
feedback resistors as shown in Figure 9. The effective attenua-
tion is a result of the lowered input impedance as with the shunt
resistor method, yet there is no additional noise contribution at
the input of the device. It is necessary to use well-matched resistors
to minimize common-mode offset errors. Quality 1% tolerance
resistors should be used along with a symmetric board layout to
help guarantee balanced performance. The effective gain for mul-
tiple values of external feedback resistors is shown in Figure 11.
REV. A
AD8350
11
R
FEXT
20
0
GAIN
dB
18
16
14
12
10
8
6
4
2
0
500
1000
1500
2000
AD8350-20
AD8350-15
Figure 11. Power Gain vs. External Feedback Resistors
for the AD8350-15 and AD8350-20 with R
S
= 100
and
R
L
= 100
The power gain of any two-port network is dependent on the
source and load impedance. The effective gain will change if the
differential source and load impedance is not 200
. The single-
ended input and output resistance of the AD8350 can be modeled
using the following equations:
R
R
R
R
R
R
g
R
IN
F
L
F
L
INT
m
L
=
+
+
+ +
1
(4)
and
R
R
R
R
g
R
R
R
R
g
R
for R
k
OUT
F
S
INT
m
S
INT
F
S
m
S
S
=
+
+
+
+
+
+
1
1
1
1
1
1
1
1
1
(5)
where
R
F
= R
FEXT
//R
FINT
R
FEXT
= R Feedback External
R
FINT
= 662
for the AD8350-15
= 1100
for the AD8350-20
R
INT
= 25000
g
m
= 0.066 mhos for the AD8350-15
= 0.110 mhos for the AD8350-20
R
S
= R Source (Single-Ended)
R
L
= R Load (Single-Ended)
R
IN
= R Input (Single-Ended)
R
OUT
= R Output (Single-Ended)
The resultant single-ended gain can be calculated using the
following equation:
G
R
g
R
R
R
R
R
R
g
V
L
m
F
L
S
F
L
S
m
=
-
(
)
+
+
+
1
(6)
Driving Lighter Loads
It is not necessary to load the output of the AD8350 with a
200
differential load. Often it is desirable to try to achieve a
complex conjugate match between the source and load in order
to minimize reflections and conserve power. But if the AD8350
is driving a voltage responding device, such as an ADC, it is no
longer necessary to maximize power transfer. The harmonic
distortion performance will actually improve when driving
loads greater than 200
. The lighter load requires less cur-
rent driving capability on the output stages of the AD8350
resulting in improved linearity. Figure 12 shows the improve-
ment in second and third harmonic distortion for increasing
differential load resistance.
R
LOAD
66
200
DIST
O
R
T
ION
dBc
68
70
72
74
76
78
80
82
300
400
500
600
700
800
900
1000
HD3
HD2
Figure 12. Second and Third Harmonic Distortion vs.
Differential Load Resistance for the AD8350-15 with
V
S
= 5 V, f = 70 MHz, and V
OUT
= 1 V p-p
REV. A
AD8350
12
EVALUATION BOARD
Figure 13 shows the schematic of the AD8350 evaluation board,
for SOIC, as it is shipped from the factory. The board is config-
ured to allow easy evaluation using single-ended 50
test
equipment. The input and output transformers have a 4-to-1
impedance ratio and transform the AD8350's 200
input and
output impedances to 50
. In this mode, 0 resistors (R1 and
R4) are required.
To allow compensation for the insertion loss of the transform-
ers, a calibration path is provided at Test In and Test Out. This
consists of two transformers connected back to back.
To drive and load the board differentially, transformers T1 and
T2 should be removed and replaced with four 0
resistors
(0805 size); Resistors R1 and R4 (0
) should also be removed.
This yields a circuit with a broadband input and output impedance
of 200
. To match to impedances other than this, matching
components (0805 size) can be placed on pads C1, C2, C3, C4,
L1, and L2.
8
7
6
5
1
2
3
4
AD8350
+
+V
S
C5
0.1 F
L1
(OPEN)
L2
(OPEN)
C3
0.001 F
C2
0.001 F
C4
0.001 F
+V
S
1
2
3
A
B
SW1
6
1
R2
0
C1
0.001 F
R1
0
T1: TC4-1W
(MINI CIRCUITS)
IN
IN+
R3
0
6
T2: TC4-1W
(MINI CIRCUITS)
R4
0
OUT
OUT+
1
6
T4: TC4-1W
(MINI CIRCUITS)
TEST OUT
6
1
T3: TC4-1W
(MINI CIRCUITS)
TEST IN
1
Figure 13. Evaluation Board
REV. A
AD8350
13
Table II. Typical Scattering Parameters for the AD8350-15: V
CC
= 5 V, Differential Input and Output, Z
SOURCE
(diff) = 200 ,
Z
LOAD
(diff) = 200
Frequency MHz
S11
S12
S21
S22
25
0.015
48.8
0.119
176.3
5.60
4.3
0.034
4.8
50
0.028
65.7
0.119
171.1
5.61
8.9
0.032
14.3
75
0.043
75.3
0.119
166.9
5.61
13.5
0.036
30.2
100
0.057
87.5
0.120
163.5
5.61
17.9
0.043
39.6
125
0.073
91.8
0.119
159.8
5.65
22.6
0.053
40.6
150
0.080
95.6
0.120
154.8
5.68
27.0
0.058
37
175
0.100
97.4
0.117
151.2
5.73
31.8
0.072
45.1
200
0.111
99.1
0.121
147.3
5.78
36.3
0.077
47.7
225
0.128
103.2
0.120
143.7
5.83
41.0
0.091
52.5
250
0.141
106.7
0.120
140.3
5.90
45.6
0.104
55.1
275
0.151
109.7
0.120
136.6
6.02
50.2
0.108
54.2
300
0.161
111.9
0.123
132.9
6.14
55.1
0.122
51.5
325
0.179
114.7
0.121
130.7
6.19
60.2
0.135
55.6
350
0.187
117.4
0.122
126.6
6.27
65.0
0.150
56.9
375
0.194
121
0.123
123.6
6.43
70.1
0.162
60.9
400
0.199
121.2
0.124
120.1
6.61
75.8
0.187
60.3
425
0.215
122.6
0.126
117.2
6.77
81.7
0.215
63.3
450
0.225
127.0
0.126
113.9
6.91
87.6
0.242
63.9
475
0.225
127.7
0.126
112
7.06
93.8
0.268
65.2
500
0.244
129.9
0.128
108.1
7.27
99.8
0.304
68.2
Table III. Typical Scattering Parameters for the AD8350-20: V
CC
= 5 V, Differential Input and Output, Z
SOURCE
(diff) = 200 ,
Z
LOAD
(diff) = 200
Frequency MHz
S11
S12
S21
S22
25
0.017
142.9
0.074
174.9
9.96
4.27
0.02316.6
50
0.033
114.9
0.074
171.0
9.98
8.9
0.022
2.7
75
0.055
110.6
0.075
167.0
9.98
13.3
0.023
23.5
100
0.073
109.4
0.075
163.1
10.00
17.7
0.029
22.7
125
0.089
112.1
0.075
159.2
10.12
22.1
0.037
18.0
150
0.098
116.5
0.076
153.8
10.20
26.4
0.045
3.2
175
0.124
118.1
0.075
150.2
10.34
30.9
0.055
15.7
200
0.141
119.4
0.076
147.2
10.50
35.6
0.065
15.6
225
0.159
122.6
0.077
142.2
10.65
40.1
0.080
17.7
250
0.170
128.5
0.078
139.5
10.80
44.7
0.085
22.4
275
0.186
131.6
0.078
135.8
11.14
49.3
0.096
23.5
300
0.203
132.9
0.080
132.5
11.45
54.7
0.116
25.9
325
0.215
135.0
0.080
129.3
11.70
60.3
0.139
29.6
350
0.222
136.9
0.082
125.9
11.93
65.0
0.161
32.2
375
0.242
142.4
0.082
123.6
12.39
70.3
0.173
38.6
400
0.240
145.2
0.084
120.3
12.99
76.8
0.207
37.6
425
0.267
146.7
0.084
117.3
13.34
84.0
0.241
48.1
450
0.266
150.7
0.086
115.1
13.76
90.1
0.265
49.7
475
0.267
153.7
0.087
112.8
14.34
97.5
0.317
53.5
500
0.285
161.1
0.088
110.9
14.89
105.0
0.359
59.2
REV. A
AD8350
14
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic SOIC
(SO-8)
8
5
4
1
0.1968 (5.00)
0.1890 (4.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0500 (1.27)
BSC
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
0
0.0196 (0.50)
0.0099 (0.25)
45
8-Lead microSOIC Package
(RM-8)
0.011 (0.28)
0.003 (0.08)
0.028 (0.71)
0.016 (0.41)
33
27
0.120 (3.05)
0.112 (2.84)
8
5
4
1
0.122 (3.10)
0.114 (2.90)
0.199 (5.05)
0.187 (4.75)
PIN 1
0.0256 (0.65) BSC
0.122 (3.10)
0.114 (2.90)
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.018 (0.46)
0.008 (0.20)
0.043 (1.09)
0.037 (0.94)
0.120 (3.05)
0.112 (2.84)
15
16
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