Document Outline
- FEATURES
- APPLICATIONS
- GENERAL DESCRIPTION
- PIN CONFIGURATIONS
- TABLE OF CONTENTS
-
-
-
-
-
Precision, Very Low Noise, Low Input Bias Current,
Wide Bandwidth JFET Operational Amplifiers
AD8510/AD8512/AD8513
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
2004 Analog Devices, Inc. All rights reserved.
FEATURES
Fast settling time: 500 ns to 0.1%
Low offset voltage: 400 V max
Low T
C
V
OS
: 1 V/C typ
Low input bias current: 25 pA typ
Dual-supply operation: 5 V to 15 V
Low noise: 8 nV/Hz
Low distortion: 0.0005%
No phase reversal
Unity gain stable
APPLICATIONS
Instrumentation
Multipole filters
Precision current measurement
Photodiode amplifiers
Sensors
Audio
PIN CONFIGURATIONS
AD8512
OUT A
IN A
+IN A
V
V+
OUT B
IN B
+IN B
1
TOP VIEW
(Not to Scale)
4
8
5
02729-D-001
AD8512
TOP VIEW
(Not to Scale)
OUT A
IN A
+IN A
V
V+
OUT B
IN B
+IN B
02729-D-002
Figure 1. 8-Lead MSOP (RM Suffix)
Figure 2. 8-Lead SOIC (R Suffix)
AD8510
TOP VIEW
(Not to Scale)
NC
IN
+IN
V
NC
V+
OUT
NC
02729-D-003
AD8510
TOP VIEW
(Not to Scale)
NC
IN
+IN
V
NC
V+
OUT
NC
02729-D-004
Figure 3. 8-Lead MSOP (RM Suffix)
Figure 4. 8-Lead SOIC (R Suffix)
AD8513
TOP VIEW
(Not to Scale)
OUT A
1
IN A
2
+IN A
3
V+
4
+IN B
5
OUT D
IN D
+IN D
V
+IN C
14
13
12
11
10
IN B
6
OUT B
7
IN C
OUT C
9
8
02729-D-005
AD8513
TOP VIEW
(Not to Scale)
OUT A
1
IN A
+IN A
V+
+IN B
OUT D
IN D
+IN D
V
+IN C
14
IN B
OUT B
7
IN C
OUT C
8
02729-D-006
Figure 5. 14-Lead SOIC (R Suffix)
Figure 6. 14-Lead TSSOP (RU Suffix)
GENERAL DESCRIPTION
The AD8510, AD8512, AD8513 are single-, dual-, and quad-
precision JFET amplifiers that feature low offset voltage, input
bias current, input voltage noise, and input current noise.
The combination of low offsets, low noise, and very low input
bias currents makes these amplifiers especially suitable for high
impedance sensor amplification and precise current measure-
ments using shunts. The combination of dc precision, low noise,
and fast settling time results in superior accuracy in medical
instruments, electronic measurement, and automated test
equipment. Unlike many competitive amplifiers, the AD8510/
AD8512/AD8513 maintain their fast settling performance even
with substantial capacitive loads. Unlike many older JFET
amplifiers, the AD8510/AD8512/ AD8513 do not suffer from
output phase reversal when input voltages exceed the maximum
common-mode voltage range.
Fast slew rate and great stability with capacitive loads make the
AD8510/AD8512/AD8513 a perfect fit for high performance
filters. Low input bias currents, low offset, and low noise result
in a wide dynamic range of photodiode amplifier circuits. Low
noise and distortion, high output current, and excellent speed
make the AD8510/AD8512/AD8513 a great choice for audio
applications.
The AD8510/AD8512 are both available in 8-lead narrow SOIC
and 8-lead MSOP packages. MSOP packaged parts are only
available in tape and reel. The AD8513 is available in 14-lead
SOIC and TSSOP packages.
The AD8510/AD8512/AD8513 are specified over the 40C to
+125C extended industrial temperature range.
AD8510/AD8512/AD8513
Rev. E | Page 2 of 20
TABLE OF CONTENTS
Specifications............................................................................................3
Electrical Characteristics ............................................................. 4
Absolute Maximum Ratings ..................................................................6
ESD Caution.................................................................................. 6
Typical Performance Characteristics ....................................................7
General Application Information........................................................13
Input Overvoltage Protection ................................................... 13
Output Phase Reversal............................................................... 13
THD + Noise............................................................................... 13
Total Noise Including Source Resistors................................... 13
Settling Time............................................................................... 14
Overload Recovery Time .......................................................... 14
Capacitive Load Drive ............................................................... 14
Open-Loop Gain and Phase Response.................................... 15
Precision Rectifiers..................................................................... 16
I-V Conversion Applications .................................................... 17
Outline Dimensions ..............................................................................19
Ordering Guide .......................................................................... 20
REVISION HISTORY
6/04--Data Sheet Changed from Rev. D to Rev. E
Changes to Format .............................................................Universal
Changes to Specifications ................................................................ 3
Updated Outline Dimensions ....................................................... 19
10/03--Data Sheet Changed from Rev. C to Rev. D
Added AD8513 Model ......................................................Universal
Changes to Specifications ................................................................ 3
Added Figures 36 through 40........................................................ 10
Added new Figures 55 and 57....................................................... 17
Changes to Ordering Guide .......................................................... 20
9/03--Data Sheet Changed from Rev. B to Rev. C
Changes to Ordering Guide ........................................................... 4
Updated Figure 2 ............................................................................ 10
Changes to Input Overvoltage Protection section .................... 10
Changes to Figures 10 and 11 ....................................................... 12
Changes to Photodiode Circuits section ..................................... 13
Changes to Figures 13 and 14 ....................................................... 13
Deleted Precision Current Monitoring section .......................... 14
Updated Outline Dimensions ...................................................... 15
3/03--Data Sheet Changed from Rev. A to Rev. B
Updated Figure 5 ............................................................................ 11
Updated Outline Dimensions....................................................... 15
8/02--Data Sheet Changed from Rev. 0 to Rev. A
Added AD8510 Model .......................................................Universal
Added Pin Configurations ...............................................................1
Changes to Specifications.................................................................2
Changes to Ordering Guide .............................................................4
Changes to TPCs 2 and 3..................................................................5
Added new TPCs 10 and 12.............................................................6
Replaced TPC 20 ...............................................................................8
Replaced TPC 27 ...............................................................................9
Changes to General Application Information Section .............. 10
Changes to Figure 5........................................................................ 11
Changes to I-V Conversion Applications Section...................... 13
Changes to Figures 13 and 14 ....................................................... 13
Changes to Figure 17...................................................................... 14
AD8510/AD8512/AD8513
Rev. E | Page 3 of 20
SPECIFICATIONS
@ V
S
= 5 V, V
CM
= 0 V, T
A
= 25C, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage (B Grade)
1
V
OS
0.08
0.4
mV
-40C
<
T
A
< +125C
0.8
mV
Offset Voltage (A Grade)
V
OS
0.1
0.9
mV
-40C
<
T
A
< +125C
1.8
mV
Input Bias Current
I
B
21
75
pA
-40C
<
T
A
< +85C
0.7
nA
-40C
<
T
A
< +125C
7.5
nA
Input Offset Current
I
OS
5
50
pA
-40C
<
T
A
< +85C
0.3
nA
-40C
<
T
A
< +125C
0.5
nA
Input Capacitance
Differential
12.5
pF
Common-Mode
11.5
pF
Input Voltage Range
-2.0
+2.5
V
Common-Mode Rejection Ratio
CMRR
V
CM
= -2.0 V to +2.5 V
86
100
dB
Large Signal Voltage Gain
A
VO
R
L
= 2 k, V
O
= -3 V to +3 V
65
107
V/mV
Offset Voltage Drift (B Grade)
1
V
OS
/T
0.9
5 V/C
Offset Voltage Drift (A Grade)
V
OS
/T
1.7
12 V/C
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
R
L
= 10 k
+4.1
+4.3
V
Output Voltage Low
V
OL
-40C < T
A
< +125C
-4.9
-4.7
V
Output Voltage High
V
OH
R
L
= 2 k,
+3.9
+ 4.2
V
Output Voltage Low
V
OL
-40C < T
A
< +125C
-4.9
-4.5
V
Output Voltage High
V
OH
R
L
= 600
+3.7
+4.1
V
Output Voltage Low
V
OL
-40C < T
A
< +125C
-4.8
-4.2
V
Output Current
I
OUT
40
54
mA
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
= 4.5 V to 18 V
86
130
dB
Supply Current/Amplifier
I
SY
AD8510/AD8512/AD8513 V
O
= 0 V
2.0
2.3
mA
AD8510/AD8512
-40C
<
T
A
< +125C
2.5
mA
AD8513
-40C
<
T
A
< +125C
2.75
mA
DYNAMIC PERFORMANCE
Slew Rate
SR
R
L
= 2 k
20
V/s
Gain Bandwidth Product
GBP
8
MHz
Settling Time
t
S
To 0.1%, 0 V to 4 V Step, G = +1
0.4
s
THD + Noise
THD + N
1 kHz, G = +1, R
L
= 2 k
0.0005
%
Phase Margin
O
44.5
Degrees
NOISE PERFORMANCE
Voltage Noise Density
e
n
f = 10 Hz
34
nV/Hz
f = 100 Hz
12
nV/Hz
f = 1 kHz
8.0
10
nV/Hz
f = 10 kHz
7.6
nV/Hz
Peak-to-Peak Voltage Noise
e
n
p-p
0.1 Hz to 10 Hz Bandwidth
2.4
5.2
V p-p
1
AD8510/AD8512 only.
AD8510/AD8512/AD8513
Rev. E | Page 4 of 20
ELECTRICAL CHARACTERISTICS
@ V
S
= 15 V, V
CM
= 0 V, T
A
= 25C, unless otherwise noted.
Table 2.
Parameter Symbol
Conditions Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage (B Grade)
1
V
OS
0.08
0.4
mV
-40C
<
T
A
< +125C
0.8
mV
Offset Voltage (A Grade)
V
OS
0.1
1.0
mV
-40C
<
T
A
< +125C
1.8
mV
Input Bias Current
I
B
25
80
pA
-40C
<
T
A
< +85C
0.7
nA
-40C
<
T
A
< +125C
10
nA
Input Offset Current
I
OS
6
75
pA
-40C
<
T
A
< +85C
0.3
nA
-40C
<
T
A
< +125C
0.5
nA
Input Capacitance
Differential
12.5
pF
Common-Mode
11.5
pF
Input Voltage Range
-13.5
+13.0
V
Common-Mode Rejection Ratio
CMRR
V
CM
= -12.5 V to +12.5 V
86
108
dB
Large Signal Voltage Gain
A
VO
V
O
= -13.5 V to +13.5 V
115
196
V/mV
R
L
= 2 k, V
CM
= 0 V
Offset Voltage Drift (B Grade)
1
V
OS
/T
1.0
5
V/C
Offset Voltage Drift (A Grade)
V
OS
/T
1.7
12
V/C
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
R
L
= 10 k
+14.0
+14.2
V
Output Voltage Low
V
OL
-40C < T
A
< +125C
-14.9
-14.6
V
Output Voltage High
V
OH
R
L
= 2 k
+13.8
+14.1
V
Output Voltage Low
V
OL
-40C < T
A
< +125C
14.8
-14.5
V
Output Voltage High
V
OH
R
L
= 600 , T
A
= 25C
+13.5
+13.9
V
-40C
<
T
A
< +125C
11.4
V
Output Voltage Low
V
OL
R
L
= 600 , T
A
= 25C
-14.3
-13.8
V
-40C
<
T
A
< +125C
-12.1
V
Output Current
I
OUT
70
mA
POWER
SUPPLY
Power Supply Rejection Ratio
PSRR
V
S
= 4.5 V to 18 V
86
dB
Supply Current/Amplifier
I
SY
AD8510/AD8512/AD8513
V
O
= 0 V
2.2
2.5
mA
AD8510/AD8512
-40C
<
T
A
< +125C
2.6
mA
AD8513
-40C
<
T
A
< +125C
3.0
mA
DYNAMIC PERFORMANCE
Slew Rate
SR
R
L
= 2 k
20
V/s
Gain Bandwidth Product
GBP
8
MHz
Settling Time
t
S
To 0.1%, 0 V to 10 V Step, G = +1
0.5
s
To 0.01%, 0 V to 10 V Step, G = +1
0.9
s
THD + Noise
THD + N
1 kHz, G = +1, R
L
= 2 k
0.0005
%
Phase Margin
O
52
Degrees
AD8510/AD8512/AD8513
Rev. E | Page 5 of 20
Parameter Symbol
Conditions Min
Typ
Max
Unit
NOISE PERFORMANCE
Voltage Noise Density
e
n
f = 10 Hz
34
nV/Hz
f = 100 Hz
12
nV/Hz
f = 1 kHz
8.0
10
nV/Hz
f = 10 kHz
7.6
nV/Hz
Peak-to-Peak Voltage Noise
e
n
p-p
0.1 Hz to 10 Hz Bandwidth
2.4
5.2
V p-p
1
AD8510/AD8512 only.
AD8510/AD8512/AD8513
Rev. E | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
Table 3. AD8510/AD8512/AD8513 Stress Ratings
1
Parameter Rating
Supply Voltage
18 V
Input Voltage
V
S
Output Short-Circuit Duration to GND
Observe Derating
Curves
Storage Temperature Range
R, RM Packages
-65C to +150C
Operating Temperature Range
-40C to +125C
Junction Temperature Range
R, RM Packages
-65C to +150C
Lead Temperature Range
(Soldering, 10 sec)
300C
Electrostatic Discharge (HBM)
2000 V
Table 4. Thermal Resistance
Package Type
JA
2
JC
Unit
8-Lead MSOP (RM)
210
45
C/W
8-Lead SOIC (R)
158
43
C/W
14-Lead SOIC (R)
120
36
C/W
14-Lead TSSOP (RU)
180
35
C/W
1
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed in
the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability.
2
JA
is specified for worst-case conditions, i.e.,
JA
is specified for device
soldered in circuit board for surface-mount packages.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
this product features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
AD8510/AD8512/AD8513
Rev. E | Page 7 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
INPUT OFFSET VOLTAGE (mV)
NUMBE
R OF AMP
L
IFIE
RS
0.5
0
20
40
60
0.4 0.3
80
100
120
0.2 0.1
0
0.1
0.2
0.3
0.4
0.5
V
SY
= 15V
T
A
= 25C
02729-D-007
Figure 7. Input Offset Voltage Distribution
T
C
V
OS
(
V/C)
NUMBE
R OF AMP
L
IFIE
RS
0
0
5
10
15
1
20
25
30
2
3
4
5
6
02729-D-008
V
SY
= 15V
B GRADE
Figure 8. AD8510/AD8512 T
C
V
OS
Distribution
T
C
V
OS
(
V/C)
NUMBE
R OF AMP
L
IFIE
RS
0
0
5
10
15
1
20
25
30
2
3
4
5
6
02729-D-009
V
SY
= 15V
A GRADE
Figure 9. AD8510/AD8512 T
C
V
OS
Distribution
TEMPERATURE (C)
INP
U
T BIAS
CURRE
NT (pA)
40
1
10
100
1k
25
10k
100k
10
5
20
35
50
65
80
95
110 125
02729-D-010
V
SY
= 5V, 15V
Figure 10. Input Bias Current vs. Temperature
TEMPERATURE (C)
INP
U
T OFFS
E
T
CURRE
NT (pA)
40
0.1
1
10
100
25
1000
10
5
20
35
50
65
80
95
110 125
15V
5V
02729-D-011
Figure 11. Input Offset Current vs. Temperature
SUPPLY VOLTAGE (V+ V )
INP
U
T BIAS
CURRE
NT (pA)
8
0
5
10
15
13
20
25
30
18
23
28
30
35
40
T
A
= 25C
02729-D-012
Figure 12. Input Bias Current vs. Supply Voltage
AD8510/AD8512/AD8513
Rev. E | Page 8 of 20
SUPPLY VOLTAGE (V+ V)
S
U
P
P
L
Y
CURRE
NT P
E
R
AMP
L
IFIE
R (mA)
8
1.0
1.1
1.2
13
1.3
1.4
1.6
18
23
28
30
1.7
1.8
1.5
1.9
2.0
T
A
= 25C
02729-D-013
Figure 13. AD8512 Supply Current per Amplifier vs. Supply Voltage
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
0
0
2
4
10
6
8
12
20
30
40
50
14
16
10
60
70
80
V
OL
V
OH
V
SY
= 15V
V
SY
= 5V
V
OH
V
OL
02729-D-014
Figure 14. AD8510/AD8512 Output Voltage vs. Load Current
TEMPERATURE (C)
S
U
P
P
L
Y
CURRE
NT AMP
L
IFIE
R (mA)
40
1.00
1.25
1.50
1.75
10
2.00
2.25
2.50
5
20
65
80
110
25
35
50
95
125
15V
5V
02729-D-015
Figure 15. AD8512 Supply Current per Amplifier vs. Temperature
SUPPLY VOLTAGE (V+ V)
S
U
P
P
L
Y
CURRE
NT (mA)
8
1.0
1.2
1.4
13
1.6
1.8
2.2
18
23
28
33
2.4
2.6
2.0
2.8
T
A
= 25C
02729-D-016
Figure 16. AD8510 Supply Current vs. Supply Voltage
FREQUENCY (Hz)
GAIN (
d
B)
10k
30
20
10
100k
0
10
30
1M
10M
50M
40
50
20
60
70
135
90
45
0
45
90
135
180
225
270
315
PH
A
SE (
D
egrees)
V
SY
= 15V
R
L
= 2.5k
C
SCOPE
= 20pF
M
= 52 DEGREES
02729-D-017
Figure 17. Open-Loop Gain and Phase vs. Frequency
TEMPERATURE (C)
S
U
P
P
L
Y
CURRE
NT AMP
L
IFIE
R (mA)
40
1.00
1.25
1.50
1.75
10
2.00
2.25
2.50
5
20
65
80
110
25
35
50
95
125
15V
5V
02729-D-018
Figure 18. AD8510 Supply Current vs. Temperature
AD8510/AD8512/AD8513
Rev. E | Page 9 of 20
FREQUENCY (Hz)
CLOSED-
L
OOP GAIN (
d
B)
1k
30
20
10
10k
0
10
30
1M
10M
50M
40
50
20
60
70
100k
02729-D-019
V
SY
= 15V, 5V
A
V
= 100
A
V
= 1
A
V
= 10
Figure 19. Closed-Loop Gain vs. Frequency
FREQUENCY (Hz)
CMRR (dB)
100
1k
0
40
10k
10M
100M
60
80
20
100
120
100k
1M
V
SY
= 15V
02729-D-020
Figure 20. CMRR vs. Frequency
FREQUENCY (Hz)
P
S
RR (dB)
100
1k
0
40
10k
10M
100M
60
80
20
100
120
100k
1M
20
PSRR
+PSRR
V
SY
= 5V, 15V
02729-D-021
Figure 21. PSRR vs. Frequency
FREQUENCY (Hz)
OUTP
UT IMP
E
DANCE
(
)
100
1k
0
90
10k
10M
100M
150
180
60
270
300
100k
1M
30
120
210
240
A
V
= 1
A
V
= 100
A
V
= 10
V
SY
= 15V
V
IN
= 50mV
02729-D-022
Figure 22. Output Impedance vs. Frequency
FREQUENCY (kHz)
VOLTA
G
E N
O
ISE D
E
N
S
ITY (
n
V H
z
)
0
2.5
0
12
5.0
17.5
22.5
20
8
28
32
7.5
12.5
4
16
24
10.0
15.0
20.0
25.0
V
SY
= 5V TO 15V
02729-D-023
Figure 23. Voltage Noise Density
TIME (1s/DIV)
VOLTA
G
E (
1
V/D
I
V)
V
SY
= 15V
02729-D-024
Figure 24. 0.1 Hz to 10 Hz Input Voltage Noise
AD8510/AD8512/AD8513
Rev. E | Page 10 of 20
FREQUENCY (Hz)
VOLTA
GE N
O
ISE D
E
N
S
ITY (
n
V H
z
)
0
10
0
105
20
70
90
175
70
245
280
30
50
35
140
210
40
60
80
100
V
SY
= 5V TO 15V
02729-D-025
Figure 25. Voltage Noise Density vs. Frequency
TIME (1
s/DIV)
VOLTA
G
E (
5
V/D
I
V)
V
SY
= 15V
R
L
= 2k
C
L
= 100pF
A
V
= 1
02729-D-026
Figure 26. Large Signal Transient Response
TIME (100ns/DIV)
VOLTA
GE (
50mV/D
I
V)
02729-D-027
V
SY
= 15V
R
L
= 2k
C
L
= 100pF
A
V
= 1
Figure 27. Small Signal Transient Response
CAPACITANCE (pF)
OVER
SH
OOT (
%
)
1
0
10
20
10
30
40
60
100
1k
10k
70
50
80
90
V
SY
= 15V
R
L
= 2k
02729-D-028
+OS
OS
Figure 28. Small Signal Overshoot vs. Load Capacitance
FREQUENCY (Hz)
GAIN (
d
B)
10k
10
0
100k
10
20
40
1M
10M
50M
50
30
60
70
20
30
PH
A
SE (
D
egrees)
45
45
90
180
225
135
270
315
90
135
0
V
SY
= 5V
R
L
= 2.5k
C
SCOPE
= 20pF
M
= 44.5 DEGREES
02729-D-029
Figure 29. Open-Loop Gain and Phase vs. Frequency
FREQUENCY (Hz)
CMRR (dB)
100
40
1k
60
10k
10M
100M
100
80
120
20
0
100k
1M
V
SY
= 5V
02729-D-030
Figure 30. CMRR vs. Frequency
AD8510/AD8512/AD8513
Rev. E | Page 11 of 20
FREQUENCY (Hz)
OUTP
UT IMP
E
DANCE
(
)
100
60
1k
90
10k
10M
100M
240
120
270
30
0
100k
1M
150
180
210
300
02729-D-031
V
SY
= 5V
V
IN
= 50mV
A
V
= 100
A
V
= 10
A
V
= 1
Figure 31. Output Impedance vs. Frequency
TIME (1s/DIV)
VOLTA
G
E (
1
V/D
I
V)
02729-D-032
V
SY
= 5V
Figure 32. 0.1 Hz to 10 Hz Input Voltage Noise
TIME (1
s/DIV)
VOLTA
GE (
2
V/D
I
V)
V
SY
= 5V
R
L
= 2k
C
L
= 100pF
A
V
= 1
02729-D-033
Figure 33. Large Signal Transient Response
TIME (100ns/DIV)
VOLTA
GE (
50mV/D
I
V)
V
SY
= 5V
R
L
= 2k
C
L
= 100pF
A
V
= 1
02729-D-034
Figure 34. Small Signal Transient Response
CAPACITANCE (pF)
OVER
SH
OOT (
%
)
1
0
10
20
10
30
40
60
100
1k
10k
70
80
50
90
100
V
SY
= 5V
R
L
= 2k
02729-D-035
OS
+OS
Figure 35. Small Signal Overshoot vs. Load Capacitance
T
C
V
OS
(
V/C)
Number of
Amplif
iers
0
1
0
40
2
5
6
60
80
10
100
90
3
4
70
50
30
20
V
S
= 15V
02729-D-036
Figure 36. AD8513 T
C
V
OS
Distribution
AD8510/AD8512/AD8513
Rev. E | Page 12 of 20
T
C
V
OS
(
V/C)
Number of
Amplif
iers
0
1
0
40
2
5
6
60
80
100
3
4
20
V
S
= 5V
120
02729-D-037
Figure 37. AD8513 T
C
V
OS
Distribution
SUPPLY VOLTAGE (V+ V)
S
U
P
P
L
Y
CURRE
NT (mA)
8
13
1.5
1.7
18
33
1.8
1.9
2.0
23
28
1.6
2.1
2.5
2.4
2.3
2.2
T
A
= 25C
02729-D-038
Figure 38. AD8513 Supply Current vs. Supply Voltage
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
0
10
0
4
20
50
6
8
10
30
40
2
12
16
14
60
70
80
V
OL
V
OH
V
OH
V
OL
V
SY
= 15V
V
SY
= 5V
02729-D-039
Figure 39. AD8513 Output Voltage vs. Load Current
0
0.5
1.0
1.5
2.0
2.5
3.0
S
U
P
P
L
Y
CURRE
NT P
E
R
AMP
L
IFIE
R (mA)
TEMPERATURE (C)
40 25 10
5
20
35
50
65
80
95
110 125
02729-D-040
15V
5V
Figure 40. AD8513 Supply Current vs. Temperature
AD8510/AD8512/AD8513
Rev. E | Page 13 of 20
GENERAL APPLICATION INFORMATION
INPUT OVERVOLTAGE PROTECTION
The AD8510/AD8512/AD8513 have internal protective
circuitry that allows voltages as high as 0.7 V beyond the
supplies to be applied at the input of either terminal without
causing damage. For higher input voltages, a series resistor is
necessary to limit the input current. The resistor value can be
determined from the formula
mA
R
V
V
S
S
IN
5
-
With a very low offset current of <0.5 nA up to 125C, higher
resistor values can be used in series with the inputs. A 5 k
resistor will protect the inputs to voltages as high as 25 V
beyond the supplies and will add less than 10 V to the offset.
OUTPUT PHASE REVERSAL
Phase reversal is a change of polarity in the transfer function of
the amplifier. This can occur when the voltage applied at the
input of an amplifier exceeds the maximum common-mode
voltage.
Phase reversal can cause permanent damage to the device and
may result in system lockups. The AD8510/AD8512/AD8513 do
not exhibit phase reversal when input voltages are beyond the
supplies.
TIME (20
s/DIV)
02729-D-057
VOLTA
GE (
2
V/D
I
V)
V
IN
V
OUT
V
SY
= 5V
A
V
= 1
R
L
= 10k
Figure 41. No Phase Reversal
THD + NOISE
The AD8510/AD8512/AD8513 have low total harmonic distor-
tion and excellent gain linearity, making these amplifiers a great
choice for precision circuits with high closed-loop gain, and for
audio application circuits. Figure 42 shows that the AD8510/
AD8512/AD8513 have approximately 0.0005% of total distor-
tion when configured in positive unity gain (the worst case) and
driving a 100 k load.
FREQUENCY (Hz)
DISTORTION (
%
)
02729-D-056
0.01
0.001
0.0001
20
100
1k
20k
V
SY
= 5V
R
L
= 100k
BW = 22kHz
Figure 42. THD + N vs. Frequency
TOTAL NOISE INCLUDING SOURCE RESISTORS
The low input current noise and input bias current of the
AD8510/AD8512/AD8513 make them the ideal amplifiers for
circuits with substantial input source resistance. Input offset
voltage increases by less than 15 nV per 500 of source
resistance at room temperature. The total noise density of the
circuit is
(
)
S
S
n
n
nTOTAL
kTR
R
i
e
e
4
2
2
+
+
=
where:
e
n
is the input voltage noise density of the parts.
i
n
is the input current noise density of the parts.
R
S
is the source resistance at the noninverting terminal.
k is Boltzman's constant (1.38 10
23
J/K).
T is the ambient temperature in Kelvin (T = 273 + C).
For R
S
< 3.9 k, e
n
dominates and e
nTOTAL
e
n
.
The current noise of the AD8510/AD8512/AD8513 is so low
that its total density does not become a significant term unless
R
S
is greater than 165 M, an impractical value for most
applications.
The total equivalent rms noise over a specific bandwidth is
expressed as
BW
e
e
nTOTAL
nTOTAL
=
where
BW is the bandwidth in Hertz.
Note that the above analysis is valid for frequencies larger than
150 Hz and assumes flat noise above 10 kHz. For lower frequen-
cies, flicker noise (1/f) must be considered.
AD8510/AD8512/AD8513
Rev. E | Page 14 of 20
SETTLING TIME
Settling time is the time it takes the output of the amplifier to
reach and remain within a percentage of its final value after a
pulse has been applied at the input. The AD8510/AD8512/
AD8513 settle to within 0.01% in less than 900 ns with a step of
0 V to 10 V in unity gain. This makes the each of the parts an
excellent choice as a buffer at the output of DACs whose settling
time is typically less than 1 s.
In addition to their fast settling time and fast slew rate, the
AD8510/AD8512/AD8513's low offset voltage drift and input
offset current maintain full accuracy of 12-bit converters over
the entire operating temperature range.
OVERLOAD RECOVERY TIME
Overload recovery, also known as overdrive recovery, is the time
it takes the output of an amplifier to recover from a saturated
condition to its linear region. This recovery time is particularly
important in applications where the amplifier must amplify
small signals in the presence of large transient voltages.
Figure 43 shows the positive overload recovery of the
AD8510/AD8512/AD8513. The output recovers in
approximately 200 ns from a saturated condition.
TIME (2
s/DIV)
VOLTAGE
200mV
0V
0V
15V
02729-D-053
IN
PU
T
O
U
T
PU
T
V
SY
= 15V
V
IN
= 200mV
A
V
= 100
RL = 10k
Figure 43. Positive Overload Recovery
The negative overdrive recovery time shown in Figure 44 is less
than 200 ns.
In addition to the fast recovery time, the AD8510/AD8512/
AD8513 show excellent symmetry of the positive and negative
recovery times. This is an important feature for transient signal
rectification, because the output signal is kept equally undis-
torted throughout any given period.
TIME (2
s/DIV)
VOLTAGE
200mV
0V
0V
+15V
02729-D-054
IN
PU
T
O
U
T
PU
T
V
SY
= 15V
A
V
= 100
R
L
= 10k
Figure 44. Negative Overload Recovery
CAPACITIVE LOAD DRIVE
The AD8510/AD8512/AD8513 are unconditionally stable at all
gains in inverting and noninverting configurations. They are
capable of driving up to 1000 pF of capacitive loads without
oscillation in unity gain, the worst-case configuration.
However, as with most amplifiers, driving larger capacitive loads
in a unity gain configuration may cause excessive overshoot and
ringing or even oscillation. A simple snubber network reduces
the amount of overshoot and ringing significantly. The advan-
tage of this configuration is that the output swing of the ampli-
fier is not reduced, because R
S
is outside the feedback loop.
7
4
6
AD8510
200mV
R
S
C
S
C
L
V
OUT
V+
V
02729-D-055
Figure 45. Snubber Network Configuration
Figure 46 shows a scope photograph of the output of the
AD8510/AD8512/AD8513 in response to a 400 mV pulse. The
circuit is configured in positive unity gain (worst-case) with a
load experience of 500 pF.
AD8510/AD8512/AD8513
Rev. E | Page 15 of 20
TIME (1
s/DIV)
VOLTA
G
E (
200mV/D
I
V)
V
SY
= 15V
C
L
= 500pF
R
L
=10k
02729-D-041
Figure 46. Capacitive Load Drive without Snubber
When the snubber circuit is used, the overshoot is reduced from
55% to less than 3% with the same load capacitance. Ringing is
virtually eliminated, as shown in Figure 47.
TIME (1
s/DIV)
VOLTA
G
E (
200mV/D
I
V)
V
SY
= 15V
R
L
=10k
C
L
= 500pF
R
S
=100
C
S
=1nF
02729-D-042
Figure 47. Capacitive Load with Snubber Network
Optimum values for R
S
and C
S
depend on the load capacitance
and input stray capacitance and are determined empirically.
Table 5 shows a few values that can be used as starting points.
Table 5. Optimum Values for Capacitive Loads
C
LOAD
R
S
()
C
S
500 pF
100
1 nF
2 nF
70
100 pF
5 nF
60
300 pF
OPEN-LOOP GAIN AND PHASE RESPONSE
In addition to their impressive low noise, low offset voltage, and
offset current, the AD8510/AD8512/AD8513 have excellent
loop gain and phase response even when driving large resistive
and capacitive loads. They were compared to the OPA2132
under the same conditions. With a 2.5 k load at the output, the
AD8510/AD8512/AD8513 have more than 8 MHz of band-
width and a phase margin of more than 52.
The OPA2132, on the other hand, has only 4.5 MHz of band-
width and 28 of phase margin under the same test conditions.
Even with a 1 nF capacitive load in parallel with the 2 k load
at the output, the AD8510/AD8512/AD8513 show much better
response than the OPA2132, whose phase margin is degraded to
less than 0, indicating oscillation.
FREQUENCY (Hz)
GAIN (
d
B)
10k
30
20
10
100k
0
10
30
1M
10M
50M
40
50
20
60
70
135
90
45
0
45
90
135
190
225
270
315
PH
A
SE (
D
egrees)
V
SY
= 15V
R
L
= 2.5k
C
L
= 0
02729-D-043
Figure 48. Frequency Response of the AD8510/AD8512/AD8513
FREQUENCY (Hz)
GAIN (
d
B)
10k
30
20
10
100k
0
10
30
1M
10M
50M
40
50
20
60
70
135
90
45
0
45
90
135
190
225
270
315
PH
A
SE (
D
egrees)
V
SY
= 15V
R
L
= 2.5k
C
L
= 0
02729-D-044
Figure 49. Frequency Response of the OPA2132
AD8510/AD8512/AD8513
Rev. E | Page 16 of 20
PRECISION RECTIFIERS
TIME (1ms/DIV)
VOLTA
GE (
1
V/D
I
V)
02729-D-046
Rectifying circuits are used in a multitude of applications. One
of the most popular uses is in the design of regulated power
supplies, where a rectifier circuit is used to convert an input
sinusoid to a unipolar output voltage. There are some potential
problems for amplifiers used in this manner.
When the input voltage (V
IN
) is negative, the output is zero. The
magnitude of V
IN
is doubled at the inputs of the op amp. This
voltage can exceed the power supply voltage, which would dam-
age some amplifiers permanently. The op amp must come out of
saturation when V
IN
is negative. This delays the output signal
because the amplifier requires time to enter its linear region.
The AD8510/AD8512/AD8513 have a very fast overdrive
recovery time, which makes them great choices for the
rectification of transient signals. The symmetry of the positive
and negative recovery times is also important in keeping the
output signal undistorted.
Figure 51. Half-Wave Rectifier Signal (Out A)
TIME (1ms/DIV)
VOLTA
GE (
1
V/D
I
V)
02729-D-047
Figure 50 shows the test circuit of the rectifier. The first stage of
the circuit is a half-wave rectifier. When the sine wave applied at
the input is positive, the output follows the input response.
During the negative cycle of the input, the output tries to swing
negative to follow the input, but the power supply restrains it to
zero. In a similar fashion, the second stage is a follower during
the positive cycle of the sine wave and an inverter during the
negative cycle.
8
4
2
1
3
1/2
AD8512
4
8
5
7
6
2/2
AD8512
R2
10k
R3
10k
R1
1k
OUT A
(HALF WAVE)
OUT B
(HALF WAVE)
5V
5V
V
IN
3V p-p
02729-D-045
Figure 52. Full-Wave Rectifier Signal (Out B)
Figure 50. Half-Wave and Full-Wave Rectifier
AD8510/AD8512/AD8513
Rev. E | Page 17 of 20
I-V CONVERSION APPLICATIONS
Photodiode Circuits
Common applications for I-V conversion include photodiode
circuits, where the amplifier is used to convert a current emitted
by a diode placed at the positive input terminal into an output
voltage.
The AD8510/AD8512/AD8513's low input bias current, wide
bandwidth, and low noise make them each an excellent choice
for various photodiode applications, including fax machines,
fiber optic controls, motion sensors, and bar code readers.
The circuit shown in Figure 53 uses a silicon diode with zero
bias voltage. This is known as a Photovoltaic Mode; this
configuration limits the overall noise and is suitable for
instrumentation applications.
4
7
3
6
2
AD8510
Cf
R2
Rd
Ct
V
EE
V
CC
02729-D-048
Figure 53. Equivalent Preamplifier Photodiode Circuit
A larger signal bandwidth can be attained at the expense of
additional output noise. The total input capacitance (Ct)
consists of the sum of the diode capacitance (typically 3 pF to
4 pF) and the amplifier's input capacitance (12 pF), which
includes external parasitic capacitance. Ct creates a pole in the
frequency response, which may lead to an unstable system. To
ensure stability and optimize the bandwidth of the signal, a
capacitor is placed in the feedback loop of the circuit shown in
Figure 53. It creates a zero and yields a bandwidth whose corner
frequency is 1/(2(R2Cf)).
The value of
R2 can be determined by the ratio V/I
D
, where V is
the desired output voltage of the op amp and I
D
is the diode
current. For example, if I
D
is 100 A and a 10 V output voltage is
desired, R2 should be 100 k. Rd is a junction resistance that
drops typically by a factor of 2 for every 10C increase in
temperature. A typical value for Rd is 1000 M. Since Rd >> R2,
the circuit behavior is not impacted by the effect of the junction
resistance. The maximum signal bandwidth is
Ct
R
ft
f
MAX
2
2
=
where f
t
is the unity gain frequency of the amplifier.
Using the parameters above,
Cf 1 pF, which yields a signal
bandwidth of about 2.6 MHz.
ft
R
Ct
Cf
2
2
=
where ft is the unity gain frequency of the op amp, achieves a
phase margin,
m
, of approximately 45.
A higher phase margin can be obtained by increasing the value
of Cf. Setting Cf to twice the previous value yields approximately
m
= 65 and a maximally flat frequency response, but reduces
the maximum signal bandwidth by 50%.
AD8510/AD8512/AD8513
Rev. E | Page 18 of 20
TIME (2ms/DIV)
VOLTA
GE (
5
V/D
I
V)
02729-D-050
Signal Transmission Applications
One popular signal transmission method uses pulse-width
modulation. High data rates may require a fast comparator
rather than an op amp. However, the need for sharp and
undistorted signals may favor using a linear amplifier.
The AD8510/AD8512/AD8513 make excellent voltage
comparators. In addition to a high slew rate, the AD8510/
AD8512/AD8513 have a very fast saturation recovery time. In
the absence of feedback, the amplifiers are in open-loop mode
(very high gain). In this mode of operation, they spend much of
their time in saturation.
The circuit in Figure 54 compares two signals of different
frequencies, namely a 100 Hz sine wave and a 1 kHz triangular
wave. Figure 56 shows a scope photograph of the output wave-
form. A pull-up resistor (typically 5 k) may be connected from
the output to V
CC
if the output voltage needs to reach the posi-
tive rail. The trade-off is that power consumption will be higher.
Figure 56. Pulse-Width Modulation
Crosstalk
Crosstalk, also known as channel separation, is a measure of
signal feedthrough from one channel to the other on the same
IC. The AD8512/AD8513 have a channel separation better than
-90 dB for frequencies up to 10 kHz, and better than -50 dB for
frequencies up to 10 MHz. Figure 57 shows the typical channel
separation behavior between amplifier A (driving amplifier),
with respect to amplifiers B, C, and D.
V
OUT
V1
V2
4
2
6
7
3
15V
+15V
02729-D-049
02729-D-051
FREQUENCY (Hz)
CHANNEL SEPARATION (dB)
100
160
10k
140
120
80
1k
60
20
40
100k
1M
10M
100
0
CH-D
CH-C
CH-B
Figure 54. Pulse-Width Modulator
V
OUT
1
2
7
6
5
4
3
8
+V
S
20k
2.2k
5k
5k
V
S
V
IN
18V p-p
CROSSTALK = 20 LOG
V
OUT
10V
IN
02729-D-052
Figure 57. Channel Separation
Figure 55. Crosstalk Test Circuit
AD8510/AD8512/AD8513
Rev. E | Page 19 of 20
OUTLINE DIMENSIONS
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)
45
8
0
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8
5
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012AA
Figure 58. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
0.80
0.60
0.40
8
0
4
8
5
4.90
BSC
PIN 1
0.65 BSC
3.00
BSC
SEATING
PLANE
0.15
0.00
0.38
0.22
1.10 MAX
3.00
BSC
COPLANARITY
0.10
0.23
0.08
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 59. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
4.50
4.40
4.30
14
8
7
1
6.40
BSC
PIN 1
5.10
5.00
4.90
0.65
BSC
SEATING
PLANE
0.15
0.05
0.30
0.19
1.20
MAX
1.05
1.00
0.80
0.20
0.09
8
0
0.75
0.60
0.45
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
Figure 60. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions show in millimeters
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COPLANARITY
0.10
14
8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
8
0
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AB
45
Figure 61. 14-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-14)
Dimensions shown in millimeters and (inches)
AD8510/AD8512/AD8513
Rev. E | Page 20 of 20
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
Branding Information
AD8510ARM-REEL
-40C to +125C
8-Lead MSOP
RM-8
B7A
AD8510ARM-R2
-40C to +125C
8-Lead MSOP
RM-8
B7A
AD8510AR
-40C to +125C
8-Lead SOIC
R-8
AD8510AR-REEL
-40C to +125C
8-Lead SOIC
R-8
AD8510AR-REEL7
-40C to +125C
8-Lead SOIC
R-8
AD8510ARZ
1
-40C to +125C
8-Lead SOIC
R-8
AD8510ARZ-REEL
1
-40C to +125C
8-Lead SOIC
R-8
AD8510ARZ-REEL7
1
-40C to +125C
8-Lead SOIC
R-8
AD8510BR
-40C to +125C
8-Lead SOIC
R-8
AD8510BR-REEL
-40C to +125C
8-Lead SOIC
R-8
AD8510BR-REEL7
-40C to +125C
8-Lead SOIC
R-8
AD8512ARM-REEL
-40C to +125C
8-Lead MSOP
RM-8
B8A
AD8512ARM-R2
-40C to +125C
8-Lead MSOP
RM-8
B8A
AD8512ARMZ-REEL
1
-40C to +125C
8-Lead MSOP
RM-8
B8A
AD8512ARMZ-R2
1
-40C to +125C
8-Lead MSOP
RM-8
B8A
AD8512AR
-40C to +125C
8-Lead SOIC
R-8
AD8512AR-REEL
-40C to +125C
8-Lead SOIC
R-8
AD8512AR-REEL7
-40C to +125C
8-Lead SOIC
R-8
AD8512ARZ
1
-40C to +125C
8-Lead SOIC
R-8
AD8512ARZ-REEL
1
-40C to +125C
8-Lead SOIC
R-8
AD8512ARZ-REEL7
1
-40C to +125C
8-Lead SOIC
R-8
AD8512BR
-40C to +125C
8-Lead SOIC
R-8
AD8512BR-REEL
-40C to +125C
8-Lead SOIC
R-8
AD8512BR-REEL7
-40C to +125C
8-Lead SOIC
R-8
AD8513AR
-40C to +125C
14-Lead SOIC
R-14
AD8513AR-REEL
-40C to +125C
14-Lead SOIC
R-14
AD8513AR-REEL7
-40C to +125C
14-Lead SOIC
R-14
AD8513ARU
-40C to +125C
14-Lead TSSOP
RU-14
AD8513ARU-REEL
-40C to +125C
14-Lead TSSOP
RU-14
1
Z = Pb-free part.
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C0272906/04(E)
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