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EVAL-ADM1069LQEB
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PDO7
PDO8
PDOGND
VDDCAP
VDD
ARBITRATOR
DAC1
V
OUT
DAC
DAC2
V
OUT
DAC
DAC3
V
OUT
DAC
DAC4
V
OUT
DAC
GND
VX1
VX2
VP1
VP2
VP3
VH
AGND
PROGRAMMABLE
RESET
GENERATORS
(SFDs)
CONFIGURABLE
OUTPUT
DRIVERS
(HV CAPABLE
OF DRIVING
GATES OF
N-CHANNEL FET)
CONFIGURABLE
OUTPUT
DRIVERS
(LV CAPABLE
OF DRIVING
LOGIC SIGNALS)
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
VX3
VX4
SDA SCL A1
A0
SMBus
INTERFACE
REFIN REFOUT REFGND
VREF
12-BIT
SAR ADC
EEPROM
CLOSED-LOOP
MARGINING SYSTEM
ADM1069
DUAL-
FUNCTION
INPUTS
(LOGIC INPUTS
OR
SFDs)
SEQUENCING
ENGINE
GPI SIGNAL
CONDITIONING
SFD
GPI SIGNAL
CONDITIONING
SFD
SFD
SFD
SELECTABLE
ATTENUATOR
SELECTABLE
ATTENUATOR
DEVICE
CONTROLLER
OSC
EEPROM
SDA SCL A1
A0
SMBus
INTERFACE
REFOUT
10 F
REFIN
REFGND
VREF
12-BIT
SAR ADC
ADM1069
CONFIGURABLE
O/P DRIVER
(HV)
PDO1
PDO2
PDOGND
PDO3
VCCP
GND
PDO4
PDO5
CONFIGURABLE
O/P DRIVER
(HV)
PDO6
CONFIGURABLE
O/P DRIVER
(LV)
PDO7
CONFIGURABLE
O/P DRIVER
(LV)
PDO8
SEQUENCING
ENGINE
VX2
VX3
VP2
VP3
VH
VP1
VX1
AGND
VX4
VDD
ARBITRATOR
REG 5.25V
CHARGE PUMP
DAC1
V
OUT
DAC
DAC4
V
OUT
DAC
DAC2 DAC3
10 F
VDDCAP
10 F
1
25
32
8
9
17
16
24
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
PIN 1
INDICATOR
ADM1069
TOP VIEW
(Not to Scale)
6
0
1
2
3
4
5
0
6
5
4
3
2
1
V
VP1
(V)
6
0
1
2
3
4
5
0
16
14
12
10
8
6
4
2
V
VH
(V)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
1
2
3
4
5
6
V
VP1
(V)
180
160
140
120
100
80
60
40
20
0
0
1
2
3
4
5
6
V
VP1
(V)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
16
14
12
10
8
6
4
2
V
VH
(V)
350
300
250
200
150
100
50
0
0
6
5
4
3
2
1
V
VH
(V)
14
12
10
8
6
4
2
0
0
15.0
12.5
10.0
7.5
5.0
2.5
I
LOAD
CURRENT ( A)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
6
5
4
3
2
1
I
LOAD
(mA)
VP1 = 5V
VP1 = 3V
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
60
50
40
30
20
10
I
LOAD
( A)
VP1 = 5V
VP1 = 3V
1.0
1.0
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
4000
1000
2000
3000
0
CODE
1.0
1.0
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
0
4000
3000
2000
1000
CODE
12000
10000
8000
6000
4000
2000
0
2049
2048
2047
CODE
81
9894
25
CH1
200mV
M1.00 s
CH1 756mV
1
DAC
BUFFER
OUTPUT
PROBE
POINT
47pF
20k
CH1
200mV
M1.00 s
CH1 944mV
1
DAC
BUFFER
OUTPUT
1V
PROBE
POINT
100k
1.005
1.004
1.003
1.002
1.001
1.000
0.999
0.998
0.997
0.996
0.995
40
20
0
20
40
60
100
80
TEMPERATURE ( C)
VP1 = 3.0V
VP1 = 4.75V
2.058
2.038
2.043
2.048
2.053
40
20
0
20
40
60
100
80
TEMPERATURE ( C)
VP1 = 3.0V
VP1 = 4.75V
SUPPLY
COMPARATOR
IN
EN
OUT
4.75V
LDO
IN
EN
OUT
4.75V
LDO
IN
EN
OUT
4.75V
LDO
IN
EN
OUT
4.75V
LDO
VH
VP3
VP2
VP1
VDDCAP
INTERNAL
DEVICE
SUPPLY
+
+
UV
COMPARATOR
VREF
FAULT TYPE
SELECT
OV
COMPARATOR
FAULT
OUTPUT
GLITCH
FILTER
VPn
MID
LOW
RANGE
SELECT
ULTRA
LOW
T
0
T
GF
T
0
T
GF
T
0
T
GF
T
0
T
GF
INPUT
INPUT PULSE SHORTER
THAN GLITCH FILTER TIMEOUT
INPUT PULSE LONGER
THAN GLITCH FILTER TIMEOUT
OUTPUT
PROGRAMMED
TIMEOUT
PROGRAMMED
TIMEOUT
INPUT
OUTPUT
DETECTOR
VXn
(DIGITAL INPUT)
GLITCH
FILTER
VREF = 1.4V
TO
SEQUENCING
ENGINE
+
PDO
SE DATA
CFG4 CFG5 CFG6
SMBus DATA
CLK DATA
VP1
SEL
VP4
V
DD
VFET (PDO1-6 ONLY)
SEQUENCE
TIMEOUT
MONITOR
FAULT
STATE
IDLE1
IDLE2
EN3V3
DIS3V3
DIS2V5
PWRGD
FSEL1
FSEL2
SEQUENCE
STATES
MONITOR FAULT
STATES
TIMEOUT
STATES
VX1 = 0
VP1 = 1
VP1 = 0
(VP1 + VP2) = 0
(VP1 + VP2 + VP3) = 0
(VP1 +
VP2) = 0
VP2 = 1
VP3 = 1
VP2 = 0
VX1 = 1
VP3 = 0
VP2 = 0
VP1 = 0
VX1 = 1
VX1 = 1
10ms
20ms
EN2V5
0
4
7
3
5
-
0
3
2
SUPPLY FAULT
DETECTION
LOGIC INPUT CHANGE
OR FAULT DETECTION
WARNINGS
FORCE FLOW
(UNCONDITIONAL JUMP)
VP1
VX4
INVERT
SEQUENCE
DETECTOR
SELECT
TIMER
SUPPLY FAULT
DETECTION
LOGIC INPUT CHANGE
OR FAULT DETECTION
VP1
VX4
MONITORING FAULT
DETECTOR
MASK
SENSE
1-BIT FAULT
DETECTOR
FAULT
WARNINGS
MASK
1-BIT FAULT
DETECTOR
FAULT
MASK
SENSE
1-BIT FAULT
DETECTOR
FAULT
VXn
2.048V VREF
NO ATTENUATION
12-BIT
ADC
DIGITIZED
VOLTAGE
READING
2.048V VREF
ATTENUATION NETWORK
(DEPENDS ON RANGE SELECTED)
12-BIT
ADC
DIGITIZED
VOLTAGE
READING
VPn/VH
OUTPUT
DC/DC
CONVERTER
FEEDBACK
GND
ATTENUATION
RESISTOR
PCB
TRACE NOISE
DECOUPLING
CAPACITOR
ADM1069
DACOUTn
V
OUT
DAC
CONTROLLER
VIN
DEVICE
CONTROLLER
(SMBus)
OUTPUT
DC/DC
CONVERTER
FEEDBACK
GND
ATTENUATION
RESISTOR
PCB
TRACE NOISE
DECOUPLING
CAPACITOR
VH/VPn/VXn
ADM1069
DACOUTn
MUX
ADC
DAC
DEVICE
CONTROLLER
(SMBus)
CONTROLLER
VIN
3.3V OUT
VH
PDO8
PDO7
SYSTEM RESET
PDO6
POWER_GOOD
PDO2
DAC1
PDO1
PDO5
PDO4
PDO3
EN
OUT
DC-DC1
IN
3.3V OUT
3V OUT
5V OUT
12V OUT
EN
OUT
DC-DC2
IN
1.25V OUT
EN
OUT
DC-DC3
IN
1.2V OUT
0.9V OUT
5V OUT
12V IN
5V IN
3V IN
VP1
3V OUT
VP2
3.3V OUT
VP3
1.25V OUT
VX1
1.2V OUT
VX2
0.9V OUT
VX3
POWER_ON
VX4
10 F
REFIN
10 F
VCCP
10 F
VDDCAP GND
EN
TRIM
OUT
DC-DC4
IN
ADM1069
POWER-UP
(V
CC
> 2.5V)
EEPROM
E
E
P
R
O
M
L
D
D
A
T
A
R
A
M
L
D
U
P
D
SMBus
DEVICE
CONTROLLER
LATCH A
LATCH B
FUNCTION
(OV THRESHOLD
ON VP1)
1
9
9
1
1
9
1
9
START BY
MASTER
ACK. BY
SLAVE
ACK. BY
SLAVE
ACK. BY
SLAVE
ACK. BY
SLAVE
FRAME 2
COMMAND CODE
FRAME 1
SLAVE ADDRESS
FRAME N
DATA BYTE
FRAME 3
DATA BYTE
SCL
SDA
R/W
STOP
BY
MASTER
SCL
(CONTINUED)
SDA
(CONTINUED)
D7
A0
A1
1
0
0
1
1
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
9
1
9
9
1
1
9
1
START BY
MASTER
ACK. BY
SLAVE
ACK. BY
MASTER
ACK. BY
MASTER
NO ACK.
FRAME 2
DATA BYTE
FRAME 1
SLAVE ADDRESS
FRAME N
DATA BYTE
FRAME 3
DATA BYTE
SCL
SDA
R/W
STOP
BY
MASTER
SCL
(CONTINUED)
SDA
(CONTINUED)
D7
A0
A1
1
0
0
1
1
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
SCL
SDA
P
S
S
P
t
SU ;ST O
t
HD ;STA
t
SU; S TA
t
SU; DAT
t
HD ;DA T
t
HD; STA
t
HI G H
t
BU F
t
LO W
t
R
t
F
2
4
1
3
SLAVE
ADDRESS
REGISTER
ADDRESS
(0x00 TO 0xDF)
S
W A
A
5
6
P
5
6
P
2
4
1
3
SLAVE
ADDRESS
COMMAND
BYTE
(0xFE)
S
W A
A
SLAVE
ADDRESS
RAM
ADDRESS
(0x00 TO 0xDF)
S
W A
DATA
A
P
A
2
4
1
3
5
7
6
8
SLAVE
ADDRESS
EEPROM
ADDRESS
HIGH BYTE
(0xF8 TO 0xFB)
S
W A
EEPROM
ADDRESS
LOW BYTE
(0x00 TO 0xFF)
A
P
A
2
4
1
3
5
7
6
8
SLAVE
ADDRESS
EEPROM
ADDRESS
HIGH BYTE
(0xF8 TO 0xFB)
S
W A
EEPROM
ADDRESS
LOW BYTE
(0x00 TO 0xFF)
A
P
A
2
4
1
3
5
7
A
9
DATA
8
6
10
SLAVE
ADDRESS
S
W A
2
COMMAND 0xFC
(BLOCK WRITE)
4
1
3
A
5
BYTE
COUNT
6
A
7
A
9
10
A P
A
DATA
1
8
DATA
N
DATA
2
2
3
1
4
5
SLAVE
ADDRESS
S
R
DATA
P
A
6
A
SLAVE
ADDRESS
S
W A
2
COMMAND 0xFD
(BLOCK READ)
4
1
3
A
5
S
6
SLAVE
ADDRESS
7
BYTE
COUNT
9
10
12
11
A
R A
8
DATA
1
DATA
32
13
A
14
P
A
SLAVE
ADDRESS
S
W A
2
COMMAND 0xFD
(BLOCK READ)
4
1
3
A
5
S
6
SLAVE
ADDRESS
7
BYTE
COUNT
9
10
12
11
A
R A
8
DATA
1
DATA
32
A
13
PEC
14
A
15
P
A
COMPLIANT TO JEDEC STANDARDS MS-026-BBA
VIEW A
TOP VIEW
(PINS DOWN)
8
1
32
25
24
17
16
9
0.80
BSC
LEAD PITCH
9.00 BSC SQ
7.00
BSC SQ
1.60
MAX
0.75
0.60
0.45
0.45
0.37
0.30
PIN 1
0.20
0.09
1.45
1.40
1.35
0.10 MAX
COPLANARITY
VIEW A
ROTATED 90
CCW
SEATING
PLANE
7
3.5
0
0.15
0.05
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