eroflex Circuit Technology - Advanced Multichip Modules SCD3659 REV 3 12/17/98
128Kx8
128Kx8
128Kx8
128Kx8
CE
4
OE
A
0
A
16
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
8
8
8
8
CE
3
WE
CE
1
CE
2
Block Diagram PGA Type Package(P1) & CQFP(F2)
128Kx8
128Kx8
128Kx8
128Kx8
CE
4
OE
A
0
A
16
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
8
8
8
8
CE
3
WE
4
WE
3
WE
2
WE
1
CE
1
CE
2
Block Diagram CQFP(F1)
Pin Description
I/O
0-31
Data I/O
A
016
Address Inputs
WE
14
Write Enables
CE
14
Chip Enables
OE
Output Enable
V
cc
Power Supply
GND
Ground
NC
Not Connected
Pin Description
I/O
0-31
Data I/O
A
016
Address Inputs
WE
Write Enable
CE
14
Chip Enables
OE
Output Enable
V
cc
Power Supply
GND
Ground
NC
Not Connected
General Description
The ACTRS128K32 is a High
Speed 4 megabit CMOS SRAM
Multichip Module (MCM)
designed for full temperature
range, military, space, or high
reliability mass memory and
fast cache applications.
The MCM can be organized
as a 128K x 32 bits, 256K x 16
bits or 512k x 8 bits device and
is input and output TTL
compatible. Writing is executed
when the write enable (WE)
and chip enable (CE) inputs are
low. Reading is accomplished
when WE is high and CE and
output enable (OE) are both
low. Access time grades of
35ns and 45ns maximum are
standard.
The +5 Volt power supply
version is standard.
The products are designed for
operation over the temperature
range of -55C to +125C and
screened under the full military
environment. DESC Standard
Military Drawing (SMD) part
numbers are pending.
The ACT-RS128K32 is
manufactured in Aeroflex's
80,000ft
2
MIL-PRF-38534
certified facility in Plainview,
N.Y.
Features
s
4 Low Power CMOS 128K x 8 SRAMs in one MCM
s
Overall configuration as 128K x 32
s
Tolerant to 30KRad (Si)
s
Latch-up Immunity to 112MeV/(mg/cm
2
)
s
Input and Output TTL Compatible
s
35 & 45ns Access Times
s
Full Military (-55C to +125C) Temperature Range
s
For Class K devices per MIL-PRF-38534 - Consult Factory
s
+5V Power Supply
s
Choice of 4 Hermetically sealed Co-fired Packages:
q
68Lead, Low Profile CQFP (F1), 1.56"SQ x .140"max
q
68Lead, Dual-Cavity CQFP (F2), .88"SQ x .20"max (.18"max thickness
available, contact factory for details) (Drops into the 68 Lead JEDEC .99"SQ
CQFJ footprint)
q
66Lead, PGA-Type (P1), 1.385"SQ x .245"max
s
Internal Decoupling Capacitors
CIRCUIT TECHNOLOGY
www.aeroflex.com/act1.htm
4 Megabit SRAM Multichip Module
ACTRS128K32 High Speed
RAD Tolerant
Preliminary
Aeroflex Circuit Technology ACT-RS128K32
SCD3659 REV 3 12/17/98 Plainview NY (516) 694-6700
2
Absolute Maximum Ratings
Symbol
Rating
Range
Units
T
C
Case Operating Temperature
-55 to +125
C
T
STG
Storage Temperature
-65 to +150
C
P
D
Maximum Package Power Dissipation
F1 & P1 Packages
4.4
W
F2 Package
3.3
W
J-C
Hottest Die, Max Thermal Resistance - Junction to Case
F1 & P1 Packages
2.0
C/W
F2 Package
8.0
C/W
V
G
Maximum Signal Voltage to Ground
-0.5 to +7
V
T
L
Maximum Lead Temperature (10 seconds)
300
C
Normal Operating Conditions
Symbol
Parameter
Minimum
Maximum
Units
V
CC
Power Supply Voltage
+4.5
+5.5
V
V
IH
Input High Voltage
+2.2
V
CC
+ 0.3
V
V
IL
Input Low Voltage
-0.5
+0.8
V
Truth Table
Mode
CE
OE
WE
Data I/O
Power
Standby
H
X
X
High Z
Standby (deselect/power down)
Read
L
L
H
Data Out
Active
Read
L
H
H
High Z
Active (deselected)
Write
L
X
L
Data In
Active
Capacitance
(
f = 1MHz, T
C
= 25C
)
Symbol Parameter
Maximum
Units
C
AD
A
0
A
16
Capacitance
50
pF
C
OE
OE Capacitance
50
pF
C
WE
CQFP(F1) Package
50
pF
PGA(P1) and CQFP(F2) Packages
20
pF
C
CE
Chip Enable Capacitance
20
pF
C
I
/
O
I/O
0
I/O
31
Capacitance
20
pF
Capacitance is guaranteed by design but not tested.
DC Characteristics
(4.5Vdc< V
CC
< 5.5Vdc, V
SS
= 0V, T
C
= -55C to +125C, Unless otherwise specified)
Parameter
Sym
Conditions
035
Min Max
045
Min Max
Units
Input Leakage Current
I
LI
V
CC
= Max,
V
IN
= 0 or V
CC
10
10
A
Output Leakage Current
I
LO
CE = V
IH
, OE = V
IH
,
V
OUT
= 0 or V
CC
10
10
A
Operating Supply Current 32 Bit Mode
I
CC
x32
CE = V
IL
, OE = V
IH
,
f = 5 MHz, V
CC
= Max,
CMOS Compatible
500
600
mA
Aeroflex Circuit Technology ACT-RS128K32
SCD3659 REV 3 12/17/98 Plainview NY (516) 694-6700
3
Standby Current
I
SB
CE = V
IH
, OE = V
IH
,
f = 5 MHz, V
CC
= Max,
CMOS Compatible
30
30
mA
Output Low Voltage
V
OL
I
OL
= 8 mA, V
CC
= Min
0.4
0.4
V
Output High Voltage
V
OH
I
OH
= -4.0 mA, V
CC
= Min
2.4
2.4
V
AC Characteristics
(V
CC
= 5.0V, V
SS
= 0V, T
C
= -55C to +125C)
Read Cycle
Parameter
Sym
035
Min Max
045
Min Max
Units
Read Cycle Time
t
RC
35
45
ns
Address Access Time
t
AA
35
45
ns
Chip Enable Access Time
t
ACE
35
45
ns
Chip Enable to Output in Low Z*
t
CLZ
3
3
ns
Output Enable to Output in Low Z*
t
OLZ
0
0
ns
Chip Deselect to Output in High Z*
t
CHZ
20
20
ns
Output Disable to Output in High Z*
t
OHZ
10
15
ns
* Parameters guaranteed by design but not tested
Write Cycle
Parameter
Sym
035
Min Max
045
Min Max
Units
Write Cycle Time
t
WC
35
45
ns
Chip Enable to End of Write
t
CW
25
35
ns
Address Valid to End of Write
t
AW
25
35
ns
Data Valid to End of Write
t
DW
18
20
ns
Write Pulse Width
t
WP
25
35
ns
Address Setup Time
t
AS
0
0
ns
Write to Output in High Z *
t
WHZ
10
15
ns
Data Hold from Write Time
t
DH
0
0
ns
Address Hold Time
t
AH
0
0
ns
* Parameters guaranteed by design but not tested
Data Retention Electrical Characteristics (Special Order Only)
(T
C
= -55C to +125C)
Parameter
Sym
Test Conditions
All Speeds
Min Max
Units
V
CC
for Data Retention
V
DR
CE
V
CC
0.2V
2
5.5
V
Data Retention Current
I
CCDR1
V
CC
= 3V, 35 & 45ns
4
mA
DC Characteristics (Continued)
(4.5Vdc< V
CC
< 5.5Vdc, V
SS
= 0V, T
C
= -55C to +125C, Unless otherwise specified)
Parameter
Sym
Conditions
035
Min Max
045
Min Max
Units
Aeroflex Circuit Technology ACT-RS128K32
SCD3659 REV 3 12/17/98 Plainview NY (516) 694-6700
4
D
I/O
t
RC
t
OH
t
AA
Data Valid
Previous Data Valid
t
OE
High Z
t
OHZ
Read Cycle Timing Diagrams
Data Valid
t
CLZ
CE
OE
t
ACE
t
CHZ
UNDEFINED
DON'T CARE
Read Cycle 2 (WE = V
IH
)
Write Cycle 2 (CE Controlled, OE = V
IH
)
t
CW
t
AS
t
WP
t
DW
t
OW
CE
WE
Data Valid
Write Cycle 1 (WE Controlled, OE = V
IL
)
D
I/O
AC Test Circuit
I
OL
Parameter
Typical
Units
Input Pulse Level
0 3.0
V
Input Rise and Fall
5
ns
Input and Output Timing Reference Level
1.5
V
Output Lead Capacitance
50
pF
Notes:
1) V
Z
is programmable from -2V to +7V. 2) I
OL
and I
OH
programmable from 0 to 16 mA. 3) Tester Impedance
Z
O
= 75
. 4)
V
Z
is typically the midpoint of V
OH
and V
OL
. 5) I
OL
and I
OH
are adjusted to simulate a typical resistance
load circuit. 6) ATE Tester includes jig capacitance.
I
OH
To Device Under Test
V
Z
~ 1.5 V (Bipolar Supply)
Current Source
Current Source
C
L
=
50 pF
t
WC
t
AW
t
AH
t
RC
t
AA
t
OLZ
S
EE
N
OTE
S
EE
N
OTE
S
EE
N
OTE
S
EE
N
OTE
Note: Guaranteed by design, but not tested.
D
I/O
t
DH
t
WHZ
S
EE
N
OTE
Read Cycle 1 (CE = OE = V
IL
, WE = V
IH
)
Write Cycle Timing Diagrams
t
WP
t
DW
Data Valid
t
WC
t
AW
t
AH
D
I/O
t
DH
CE
WE
t
CW
t
AS
A
0-16
A
0-16
A
0-16
A
0-16
S
EE
N
OTE
Note: Guaranteed by design, but not tested.
Timing Diagrams
Aeroflex Circuit Technology ACT-RS128K32
SCD3659 REV 3 12/17/98 Plainview NY (516) 694-6700
5
Pin Numbers & Functions
66 Pins -- PGA-Type
Pin #
Function
Pin #
Function
Pin #
Function
Pin #
Function
1
I/O
8
18
A
12
35
I/O
25
52
WE
3
2
I/O
9
19
Vcc
36
I/O
26
53
CE
3
3
I/O
10
20
CE
1
37
A
6
54
GND
4
A
13
21
NC
38
A
7
55
I/O
19
5
A
14
22
I/O
3
39
NC
56
I/O
31
6
A
15
23
I/O
15
40
A
8
57
I/O
30
7
A
16
24
I/O
14
41
A
9
58
I/O
29
8
NC
25
I/O
13
42
I/O
16
59
I/O
28
9
I/O
0
26
I/O
12
43
I/O
17
60
A
0
10
I/O
1
27
OE
44
I/O
18
61
A
1
11
I/O
2
28
NC
45
V
CC
62
A
2
12
WE
2
29
WE
1
46
CE
4
63
I/O
23
13
CE
2
30
I/O
7
47
WE
4
64
I/O
22
14
GND
31
I/O
6
48
I/O
27
65
I/O
21
15
I/O
11
32
I/O
5
49
A
3
66
I/O
20
16
A
10
33
I/O
4
50
A
4
17
A
11
34
I/O
24
51
A
5
Bottom View
Side View
"P1" -- 1.385" SQ PGA Type Package Standard
1.400 SQ
1.000
.600
1.000
.100 TYP
Pin 56
Pin 66
Pin 11
Pin 1
MAX
.020
.016
.100
.025
.035
.245
MAX
.145
MIN
All dimensions in inches
TYP
TYP
TYP
TYP
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