Data Sheet

May 2001

L8576B Dual Ringing SLIC

Features

Two SLIC channels for multiple tip/ring interfaces

On-chip balanced ringing generator, no ring relay
required

Single battery operation or optional automatic bat-
tery switch

Quiet battery reversal for on-hook signaling

Disconnect state

Distortion-free, on-hook transmission

24 mA loop current limiter

Ring trip detector

Switchhook detector

Immune to channel crosstalk and impulse noise

Allows rail overvoltages for ease of protection

Thermal protection

44-pin, surface-mount, plastic package (PLCC)

Applications

POTS for ISDN

Terminal adapters (TA)

Digital loop carrier (DLC) systems

PABX

Description

The Agere Systems Inc. L8576B electronic dual sub-
scriber line interface circuit (SLIC) provides all the
functions that are necessary to interface a codec to
the tip and ring of a subscriber loop, integrating two
battery feeds and ringing generators in one low-cost
package. The L8576B device is optimized to meet
the needs of short loop, customer premises applica-
tions and features balanced ringing from the single
battery supply. The device is built using a 90 V com-
plementary bipolar (CBIC) process. It is available in a
44-pin PLCC package.

Table of Contents

Contents

Page

Figures

Page

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Features ......................................................................1
Applications .................................................................1
Description...................................................................1
Pin Information ............................................................5
Functional Description .................................................7

General .....................................................................7
Protection ..................................................................7
Tip/Ring Drivers ........................................................7
Battery Operation ......................................................7
Transmit and Receive Interface ................................7
Data Interface ...........................................................8
Loop Current Detector ..............................................8

Operating States..........................................................8
Absolute Maximum Ratings ........................................9
Electrical Characteristics ...........................................10
Test Configurations .................................................. 14
Applications ..............................................................15

Characteristic Curves..............................................15
dc Design ................................................................17
Power Ringing.........................................................18
ac Design ................................................................19
Use of an Auxiliary Battery Supply..........................24

Outline Diagram ........................................................25

44-Pin PLCC ...........................................................25

Ordering Information .................................................26

Tables

Page

Table 1. Pin Descriptions ............................................5
Table 2. Input State Coding ........................................9
Table 3. Operating Conditions and Powering ...........10
Table 4. Ring Trip Detector ......................................10
Table 5. Battery Feed ...............................................11
Table 6. Analog Signal Pins .....................................12
Table 7. ac Feed Characteristics ..............................12
Table 8. Isolation Between Channels .......................13
Table 9. Data Interface and Logic ............................13

Figure 1. Architectural Diagram ................................. 3
Figure 2. Typical 600

Application Circuit (Only

One Channel Shown) ................................. 4

Figure 3. 44-Pin PLCC Pin Diagram .......................... 5
Figure 4. Pretrip Circuit ............................................ 11
Figure 5. Basic Test Circuit ..................................... 14
Figure 6. Metallic PSRR .......................................... 14
Figure 7. Longitudinal PSRR ................................... 14
Figure 8. Longitudinal Balance ................................ 15
Figure 9. Longitudinal Impedance ........................... 15
Figure 10. ac Gains ................................................. 15
Figure 11. Receive Gain and Hybrid Balance vs.

Frequency .............................................. 15

Figure 12. Transmit Gain and Return Loss vs.

Frequency .............................................. 15

Figure 13. Loop Current vs. Loop Voltage ............... 16
Figure 14. Loop Current vs. Loop Resistance ......... 16
Figure 15. SLIC Power Dissipation vs. Loop

Resistance (V

BAT

= 48 V) ...................... 16

Figure 16. SLIC Power Dissipation vs. Loop

Resistance (V

BAT

= 65 V) ...................... 16

Figure 17. Loop Current vs. Loop Voltage ............... 17
Figure 18. Ringing Waveform Crest Factor = 1.6 .... 18
Figure 19. Ringing Waveform Crest Factor = 1.2 .... 18
Figure 20. ac Equivalent Circuit Using a T8503

Codec ..................................................... 20

Figure 21. ac Interface Circuit Using First-

Generation Codec (Blocking Capacitors
Not Shown) ............................................. 22

Figure 22. ac Interface Circuit Using First-

Generation Codec (Including Blocking
Capacitors) ............................................. 23

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Description

(continued)

5-8414a (F)

* R

DCT

and R

DCR

(optional) are only required to keep the NSTAT output at a steady state during the disconnect state.

Notes:
T

= 2 dB.

= 4 dB.

Termination = 600

Hybrid balance = 600

Ring trip optimized for 20 Hz.

Figure 2. Typical 600

Application Circuit (Only One Channel Shown)

PT1a

L7591

TIP

RING

FGND

BAT

1
2
3
4

6
5

CH 0

PTa

PRa

T1a

VFXIN1

VFRO1

RXa

GSX1

+2.4 V

FSX1

FSR1

MCLK

FS0

1/2 T8503

T2a

HBa

GNDA1

DGND

TO DTMF

AGNDa

BGNDa

VBATa

GNa

PROGa

RTa

BAT

RECTIFIER

TTHa

TFLTa

TTHa

TFLTa

CCa

NSTATa

PROGa

OUTa

LCTHa

A = 6

CONDITIONER

1/2 L8576

GAIN = 125 V/A

F1a

, 0.22

F, 100 V

VCC

RNGNGa

TG1

TG2

GX1a

GX2a

GX3a

TG1a

CBa

RNG

CVPa

ITRa

PWRa

BAT

BGND

AGND

DGND

FGND

+5 V

65 V

GND

0.1

10 V

16.9 k

2.2 k

10 k

0.1

100 V

470 pF
10 V

0.33

10 V

40.2 k

154 k

CODEC

309 k

41.2 k

CVNa

27.4 k

28.7 k

NSTATa

SLIC

PR1a

51.1 k

0.056

50 V

383 k

52.3 k

0.1

50 V

7.5 k

NDISC

10% POLYESTER

F2a

, 0.22

F, 100 V

10% POLYESTER

(130

RINGING)

5%,

BAT

DCT*

300 k

BAT

DCR*

300 k

RNG

RECEIVER

2 W

RCVa

143 k

C1A

0.1

10 V

C2a

33 nF

10 V

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Pin Information

12-3361(F).a

Figure 3. 44-Pin PLCC Pin Diagram

Table 1. Pin Descriptions

* On the printed-wiring board (PWB), make the leads to BGND and V

BAT

as wide as possible for thermal and electrical reasons. Also, maxi-

mize the amount of PWB copper on all leads connected to this device for the lowest operating temperature.

Note: I

and O

indicate a pull-up device is included on this lead.

Pin,

Circuit

Pin,

Circuit

Symbol

Type

Name/Function

BAT

Office Battery Supply. Negative high-voltage power supply, nominally 65 V.

CF2

Filter Capacitor 2. Connect 0.22

F capacitor to AGND.

CF1

Filter Capacitor 1. Connect 0.22

F capacitor to AGND.

BGND

Battery Ground. Ground return for the battery supply and fault ground.

State Input. Refer to Operating States section. A pull-up device is included.

NDISCa

PTa

RPWRa

VITRa

TG2a

TG1a

RTFLTa

RTTHa

PTb

RPWRb

NDISCb

VITRb

TG2b

TG1b

RTFLTb

RTTHb

RCV

NSTATb

PRb

PRa

RNGNGb

CF1b

CF2b

BGNDb

B2b

CF2a

NDa

B2a

NSTATa

OUT

RCV

PRO

RCVP

RCV

PRO

AGNDb

AGNDa

OUT

RRNG

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Pin Information

(continued)

Table 1. Pin Descriptions (continued)

* On the printed-wiring board (PWB), make the leads to BGND and V

BAT

as wide as possible for thermal and electrical reasons. Also, maxi-

mize the amount of PWB copper on all leads connected to this device for the lowest operating temperature.

Note: I

and O

indicate a pull-up device is included on this lead.

Pin,

Circuit

Pin,

Circuit

Symbol

Type

Name/Function

RNGNG

Ringing Input. Refer to Operating States section. A pull-up device is
included.

NSTAT

Loop Detector Output/Ring Trip Detector Output. When low, this lead indi-
cates an off-hook condition. When in ringing mode, a low output on this lead
indicates a ring trip. A pull-up device is included.

NDISC

Disconnect Input. Refer to Operating States section. A pull-up device is
included.

RPWR

Power Resistor. Connect a resistor between this pin and V

BAT

. A 2.2 k

, 2 W

resistor should be used for a V

BAT

of 68.5 V. See the Applications section to

calculate resistor values for other V

BAT

potentials.

I/O

Protected Tip. The input to the tip fault protection and output of tip current
drive amplifier. Connect this pin to the tip of the loop through a 30

overvolt-

age protection resistor.

I/O

Protected Ring. The input to the ring fault protection and output of ring cur-
rent drive amplifier. Connect this pin to the ring of the loop through a 30

overvoltage protection resistor.

VITR

Transmit ac Output Voltage. This output is a voltage that is directly propor-
tional to the differential tip/ring current.

TG2

Transmit Gain 2. Transmit gain and current limiting for ringing is set by the
value of R

GX2

. R

GX2

is connected between TG2 and VITR.

TG1

Transmit Gain 1. Transmit gain is set by the series resistor combination of
R

GX1

and R

GX2

from this lead to TG2.

RTFLT

Ring Trip Filter. Connect this lead to RTTH via a resistor and to AGND with a
capacitor to filter the ring trip circuit to prevent spurious responses.

RTTH

Ring Trip Threshold. Connect this lead to DC

OUT

via a resistor to set the ring

trip threshold.

OUT

dc Voltage Out. This output is a voltage that is directly proportional to the
absolute value of the differential tip/ring current.

PROG

Current-Limit Program Input. A resistor to DC

OUT

sets the dc current limit of

the circuit.

RCVP

Receive Signal Input (+). This high-impedance input controls the ac differen-
tial voltage on tip/ring.

RCVN

Receive Signal Input (). This high-impedance input controls the ac differen-
tial voltage on tip/ring.

AGND

Analog Signal Ground.

Analog 5 V Power Supply.

RRNG

Ringing Slope Resistor. Connect this lead to AGND with a resistor to set the
slope of the ringing waveform. Note that this pin is shared with both sections.

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Functional Description

Refer to the architectural and application diagrams
(Figures 1 and 2, respectively).

General

The L8576B is a dual subscriber line interface circuit
with each half of the device providing battery feed,
supervision, and balanced ringing. It is designed to
support short loops, typically on customer premises.
The use of a single battery for both battery feed and
ringing makes this device particularly advantageous
where it is desirable to minimize power supply costs in
small systems, such as terminal adapters. The tip and
ring drive amplifiers are used with a very relaxed cur-
rent limit to develop a trapezoidal, balanced ringing sig-
nal. Use of a nominal 65 V power supply allows for
ringing of normal phones, whether equipped with a
mechanical ringer, or a peak-detection type of ringing
detector. While balanced ringing is not the norm world-
wide, its use in short, customer premises loops is gain-
ing popularity.

In addition to the ringing and battery functions, the
L8576B device provides the ac receive and transmit
paths. Also, integral within the device is an off-hook
detection circuit and a ring trip detection circuit that
have their outputs multiplexed on a single lead.

Thermal protection within the device is also provided,
and an external resistor is used to drop the high battery
voltage before applying loop current, thus allowing a
significant portion of the power to be dissipated outside
of the device. Removing much of this power makes it
possible to incorporate two complete circuits in a
44-pin, surface-mount package.

Protection

The L8576B contains some overvoltage protection in
addition to the thermal protection within the device.
This protection, along with the associated tip and ring
protection resistors, may be sufficient in some benign
environments. However, if power line cross or lightning
protection is desired, the use of an external protection
circuit (such as the L7591 device from Agere) is highly
recommended.

The integrated thermal protection consists of a thermal
shutdown circuit which places the tip/ring drivers in a
high-impedance state when the temperature of the die
exceeds 160 °C. In thermal shutdown, all supervision
states are undefined.

Tip/Ring Drivers

The L8576B has two tip/ring drivers whose outputs are
PT and PR. Each driver operates as a current source
capable of sinking or sourcing adequate ac signal bias
current. In the normal talk operating mode, these driv-
ers are current-limited at a nominal 24 mA to minimize
the power dissipation of short loops. These amplifiers
are also used to drive balanced ringing. During ringing,
the current limit is raised to approximately 85 mA.

The external resistor connected to the R

PWR

pin is used

to dissipate power externally and also to drop the bat-
tery voltage which is higher than normal in order to
support balanced ringing. Note that this external power
dissipation is present during both ringing or normal bat-
tery feed operation. Power limitations restrict the dual
device to actively ringing only one channel at a time;
thus, ringing cadence must be used to ensure that only
one channel is actively ringing at any given instant of
time. In other words, to ring both channels at the same
time, ring each channel during the quiet interval of the
other channel.

Battery Operation

There are two V

BAT

inputs to the device. Pin 1 (V

BAT

)

provides voltage to the entire SLIC and pins 9 and 37
(R

PWR

) provide voltage to the individual tip and ring

amplifiers of each channel through R

PWR

resistors. A

shared current sourcing scheme is employed within the
device. For loop currents below 20 mA, the V

BAT

applied to pin 1 sources all of the loop current in addi-
tion to driving internal circuitry. For loop currents
greater than 20 mA, loop current is primarily provided
through the R

PWR

resistors and the pin 1 V

BAT

mainly

powers internal circuitry. The R

PWR

resistors can be

replaced by a lower-voltage auxiliary battery. Operation
with an auxiliary battery is described in the Applications
section of this document.

Transmit and Receive Interface

The interface is suitable for direct coupling to a ±5 V
only codec. When interfacing a 5 V only codec, cou-
pling capacitors are required.

The transmit interface circuitry couples the differential
voltage on tip and ring to transmit output VITR. The
inverting input of the driving amplifier is available on
lead TG1, so connecting a resistance between VITR
and TG1 allows adjustment of the transmit gain
(transconductance).

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Functional Description

(continued)

Transmit and Receive Interface

(continued)

A second gain setting is provided to accommodate ring
trip. A switch is built into TG2. In ringing mode, TG1
and TG2 are internally connected, thus shorting out the
external gain resistor R

GX1

. This provides a lower trans-

mit gain for ringing since ring trip is accomplished by
monitoring the voltage at DC

OUT

. This lower gain sets

OUT

at the appropriate level to accommodate the

higher currents of the ring trip.

The receive interface circuitry couples the differential
signal on receive inputs RCVP and RCVN to the
tip/ring drivers.

Data Interface

A 4-wire parallel interface (B2, RNGNG, NDISC, and
NSTAT) is provided for each channel to control signals
to and from the system controller. B2 controls the for-
ward/reverse battery in normal talk mode while
RNGNG enables the balanced ringing mode of opera-
tion, and NDISC performs a disconnect state. NSTAT
reflects either the loop detector output or the ring trip
detector output, depending on the mode of the section.
It is the responsibility of the system controller to recog-
nize ring trip detection and set RNGNG to a logic 0
state to terminate ringing. The system controller should
also use RNGNG to set ringing cadence.

Loop Current Detector

Each section of the device has an integral loop current
detector set at a nominal 12 mA of dc current. This is
used to detect off-hook transitions in the normal talk
state. When current less than the current threshold
(including no current) is flowing, NSTAT is at logic 1.
When loop current exceeds 12 mA, the output NSTAT
switches to a logic 0. No hysteresis is included.

Operating States

The L8576B device has four operating states:

Talk state--normal battery:
-- Normal talk state.
-- Battery feed is connected to the battery supply

BAT

-- Both receive and transmit transmission paths are

powered up.

-- dc loop and instantaneous current limiters are

powered up and active.

-- NSTAT reflects the status of the switchhook

detector.

-- PR is negative with respect to PT.

Talk state--reverse battery:
-- Normal talk state.
-- Battery feed is connected to the battery supply

BAT

-- Both receive and transmit transmission paths are

powered up.

-- dc loop current limiter is powered up and active.
-- NSTAT reflects the status of the switchhook

detector.

-- PR is positive with respect to PT.

Ringing state:
-- Normal ringing state.
-- Both receive and transmit transmission paths are

inactive.

-- Balanced ringing is applied to PR and PT, in

accordance with B2.

-- Current limiter is set for ringing limit.
-- NSTAT reflects the status of the ring trip detector.
-- Only one channel should be in this state at a time

to control power dissipation.

Disconnect state:
-- Tip and ring drive amplifiers are powered down.
-- Pins PT and PR are high impedance (>100 k

-- NSTAT is undefined.
-- PT and PR voltage is undefined.

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Operating States

(continued)

These states are selected using three logic inputs, B2, RNGNG, and NDISC. B2 sets normal operation, either with
forward or reverse battery. RNGNG overrides B2 and applies ringing with the polarity of tip and ring reversed on
edges of the B2 signal. The slope of the waveform is determined by a resistor from RRNG to AGND. Logic input
NDISC puts the device into a loop current denial state (disconnect). Tip and ring amplifiers are saturated against
ground with about a 100

A current source. This creates a level in the loop current sensing circuitry that

approaches a loop closed state. Some conditions on the tip and ring could cause the circuit to indicate loop closed
even though the loop is open. This situation can be prevented by connecting a 300 k

resistor from V

BAT

to each of

the outputs of the tip and ring amplifiers (see Figure 2). This will pull the amplifier output to about 30 V above V

BAT

keeping the NSTAT output at a steady high (on-hook indication) level. If the disconnect state is not used or the
NSTAT output during the disconnect state is not recognized or used, then the resistors are not needed.

Table 2 below summarizes the operating input state coding.

Absolute Maximum Ratings

(at T

= 25

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.

Note: The IC can be damaged unless all ground connections are applied before, and removed after, all other connections. Furthermore, when

powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds its rat-
ings. For example, inductance in a supply lead could resonate with the supply filter capacitor to cause a destructive overvoltage.

Table 2. Input State Coding

NDISC

RNGNG B2

State

Forward Battery, Normal Talk, and Feed State. Pin PT is positive with respect to PR.

Reverse Battery, Normal Talk, and Feed State. Pin PT is negative with respect to PR.

Ringing Is Applied to PT and PR. On the transition, PT starts towards a positive volt-
age (with respect to PR). The endpoint of this state is PT at BGND and PR at V

BAT

Ringing Is Applied to PT and PR. On the transition, PT starts towards a negative volt-
age (with respect to PR). The endpoint of this state is PT at V

BAT

and PR at BGND.

0/1

0/1 Disconnect State. The tip and ring amplifiers are turned off, and the SLIC goes into a

high-impedance state (>100 k

Parameter Symbol

Min

Typ

Max

Unit

5 V dc Supplies

0.5

7.0

Office Battery Supply

BAT

0.5 V

Logic Input Voltage

0.5

+ 0.5

Logic Input Clamp Diode Current, per Pin

Logic Output Voltage

0.5

+ 0.5

Logic Output Current, per Pin

Analog Input Voltage

7.0

Maximum Junction Temperature

165

Storage Temperature Range

stg

125

Relative Humidity Range (noncondensing)

Ground Potential Difference (BGND to AGND)

PT or PR Fault Voltage (dc)

BAT

PT or PR Fault Voltage (10 µs x 1000 µs)

BAT

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Electrical Characteristics

Generally, minimum and maximum values are testing requirements. However, some parameters may not be tested
in production because they are guaranteed by design and device characterization. Typical values reflect the design
center or nominal value of the parameter; they are for information only and are not a requirement. Minimum and
maximum values apply across the entire temperature range (0 °C to 70 °C) and entire battery range (to 72 V).
Unless otherwise specified, typical values are defined as 20 °C, V

= 5.0 V, V

BAT

= 68.5 V. Positive currents flow

into the device.

Table 3. Operating Conditions and Powering

1. Noncondensing.
2. The L8576B will operate below 24 V; 24 V is used for production test.
3. The termination impedance can be programmed up to 1200

; 1000

are used for production test.

4. This parameter is not tested in production. It is guaranteed by design and device characterization.

Table 4. Ring Trip Detector

1. This table is provided for information purposes only.
2. These parameters are not tested in production.

Parameter

Min

Typ

Max

Unit

Temperature Range

Humidity Range

%RH

Supply Voltages:

BAT

4.75

5.0

5.25

V
V

Loop Closure Threshold--Detection Range

9.5

14.5

ac Termination Impedance Programming Range

300

600

1000

On- and Off-hook 2-wire Signal Level

3.14

dBm

Power Supply--Powerup, No Loop Current (per section):

BAT

= 65 V)

Total power (one channel, V

BAT

= 65 V)

--
--
--

4.5
3.0

230

5.5
4.0

290

mA
mA

Power-supply Rejection (See Figures 6 and 7.):

(1 kHz)

BAT

(500 Hz--3 kHz)

35
45

--
--

dB
dB

Thermal

Thermal Resistance (still air) T

Operating T

Thermal Shutdown Temperature

--
--
--

160

150

C/W

Parameter

Min

Typ

Max

Unit

Ringing Source:

Frequency (

) R

RNG

= 28.7 k

TTH

= 52.3 k

Frequency (

) Contact Agere for Specific Component Values

17
20

23
50

Hz
Hz

C-message Weighted Noise (900

)

dBrnC

REN Load (1386

+ 40

F) with Loop Resistance = 30

= 30

Vrms

Detection Interval:

20 Hz

25 Hz

--
--

200
150

ms
ms

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Electrical Characteristics

(continued)

Pretrip will not occur for the circuits shown below, per GR-909, 4.5.9.

12-2572(F).d

Figure 4. Pretrip Circuit

Table 5. Battery Feed

1. Assumes 2 x 30

external protection resistors. Note the useful range of the device may be determined by the ringing or supervision range

rather than the ac characteristics.

2. The longitudinal current is independent of dc loop current.
3. Current limit I

LIM

is programmed by a resistor, R

PROG

, from pin I

PROG

to pin DC

OUT

PROG

)

= 3.5 x (I

LIM

9.2) mA. The current limit has a

slope vs. loop voltage of 6 k

. To control power dissipation, it is recommended that the default current limits be utilized, i.e., R

PROG

= 51.1 k

for 24 mA nominal loop current limit.

4. Instantaneous current limit minimizes inrush current at the onset of an off-hook condition. Inrush current is only limited when in the forward

battery state. The device will settle into a dc loop current-limit value within 400 ms after off-hook.

IEEE

is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc.

6. Assumes the external protection resistors are matched to 1%.
7. This parameter is not tested during production. It is guaranteed by design and device characterization.

Parameter

Min

Typ

Max

Unit

Loop Resistance Range

(3.17 dBm overload into 600

LOOP

= 20 mA at V

BAT

= 65 V

1000

Longitudinal Current Capability per Wire

8.5

mArms

Current Limit

LOOP

= 100

dc Loop
Instantaneous

20
50

24
60

28
70

mA
mA

Tip or Ring Drive Current = dc + Longitudinal + Signal Currents

Signal Current

mArms

Powerup Open Loop Voltage Level

Differential Voltage (RNGNG = 0, NDISC = 1, B2 = 1,

BAT

= 65 V)

BAT

+ 10|

Disconnect State:

PT or PR Current (V

BAT

< V

< 0 V)

PT or PR Resistance (V

BAT

< V

< 0 V)

100

--
--

dc Feed Resistance

Longitudinal to Metallic Balance--

IEEE

Standard 455

200 Hz to 1 kHz
1 kHz to 3 kHz

54
48

67
62

--
--

dB
dB

Metallic to Longitudinal (Harm) Balance

200 Hz to 4 kHz

RING

10 k

TIP

200

SWITCH CLOSES FOR LESS THAN 12 ms

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Electrical Characteristics

(continued)

Table 6. Analog Signal Pins

Table 7. ac Feed Characteristics

1. Requires external components connected as shown in the Applications section. Transmission characteristics are specified assuming a 600

resistive termination and

1% external resistors.

2. Transmission characteristics are specified assuming a 600

resistive termination; however, feedback using external components allows the

user to adjust the termination impedance from 600

. Any complex impedance R1 + R2 || C between 300

and 1000

can be synthesized

using external components.

3. This parameter is not tested in production. It is guaranteed by design and device characterization.

Parameter

Min

Typ

Max

Unit

Differential PT/PR Current Sense (DC

OUT

)

Gain (PT/PR to DC

OUT

Forward Battery (R

GX1

= 16.9 k

, R

GX2

= 7.5 k

)

Reverse Battery (R

GX1

= 16.9 k

, R

GX2

= 7.5 k

)

235

250

265

V/A
V/A

PT/PR to VITR Gain with

GX1

= 16.9 k

, R

GX2

= 7.5 k

Forward Battery
Reverse Battery

121

125

129

V/A
V/A

Loop Closure Detector Threshold:

Programming Accuracy

RCVN, RCVP:

Input Bias Current
Gain RCVP to PT/PR
Gain RCVN to PT/PR

11.62

1.0

12.38

--
--

RCVN, RCVP Input Compliance

2.5

Parameter

Min

Typ

Max

Unit

ac Termination Impedance

300

600

1000

Total Harmonic Distortion (200 Hz--4 kHz)

Off-hook
On-hook

--
--

0.3
1.0

%
%

Transmit Gain (

= 1 kHz) (See Figure 5.):

Transmit Accuracy in Percent
Transmit Accuracy in dB (relative to 2/3)

3.0

0.24

0
0

3.0

0.24

Receive Gain (

= 1 kHz) (See Figure 5.):

Receive Accuracy in Percent
Receive Accuracy in dB

3.0

0.24

0
0

3.0

0.24

Tip/Ring Signal Level (600

reference)

3.14

dBm

Gain vs. Frequency (transmit and receive; 1 kHz reference)

200 Hz--3.4 kHz
300 Hz--3.4 kHz
3.4 kHz--20 kHz
3.4 kHz--266 kHz

1.00
0.30

3.0

0
0

0.1

0.05
0.05

2.0
2.0

dB
dB
dB
dB

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Electrical Characteristics

(continued)

Table 7. ac Feed Characteristics (continued)

1. Requires external components connected as shown in Figure 2. Transmission characteristics are specified assuming a 600

resistive ter-

mination and

1% external resistors.

2. This parameter is not tested in production. It is guaranteed by design and device characterization.
3. Return loss and transhybrid loss are functions of device gain accuracies and the external hybrid circuit. Guaranteed performance assumes

1% tolerance components.

Table 8. Isolation Between Channels

1. These parameters are not tested in production. They are guaranteed by design and device characterization.

Table 9. Data Interface and Logic

1. All logic voltages are referenced to AGND.

Parameter

Min

Typ

Max

Unit

Gain vs. Level (transmit and receive; 0 dBV reference)

50 dB to +3 dB

0.05

Return Loss

200 Hz--500 Hz
500 Hz--3400 Hz

20
26

24
29

--
--

dB
dB

Transhybrid Loss

200 Hz--500 Hz
500 Hz--2500 Hz
2500 Hz--3400 Hz

20
26
26

24
29
29

--
--
--

dB
dB
dB

Idle-channel Noise (Tip/Ring):

Psophometric

C-message
3 kHz Flat

--
--
--

12
20

dBmp

dBrnC

dBrn

Idle-channel Noise (XMT):

Psophometric

C-message
3 kHz Flat

--
--
--

12
20

dBmp0

dBrnC0

dBrn0

Parameter

Min

Typ

Max

Unit

Interchannel Small-signal Crosstalk. (Both channels in forward or reverse

battery state.) (2-wire to 2-wire, 2-wire to 4-wire, 4-wire to 4-wire.)

Impulse Noise. (One channel ringing, other channel in forward or reverse

battery state.)

dBrnC0

Parameter

Symbol

Min

Typ

Max

Unit

High-level Input Voltage (B2, RNGNG, and NDISC)

Low-level Input Voltage (B2, RNGNG, and NDISC)

0.7

Input Bias Current (high) (B2, RNGNG, and NDISC)

100

Input Bias Current (low) (B2, RNGNG, and NDISC)

200

High-level Output Voltage (NSTAT, open collector with inter-

nal pull-up resistor):

OUT

= 20

OUT

= 1

2.4

4.3
5.0

V
V

Low-level Output Voltage (NSTAT, open collector with internal

pull-up resistor) (I

OUT

= 200

0.2

0.4

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Test Configurations

12-3360(F)a

Figure 5. Basic Test Circuit

BAT

BGND V

AGND

0.1

PROG

TG1

VITR

RNGNG

CF1

0.22

RCVP

RCVN

0.22

CF2

LOOP

L8576

SLIC

TIP

600

RING

PROG

OUT

51.1 k

RTTH
RTFLT

RPWR

RRNG

2.2 k

BAT

383 k

52.3 k

0.056

0.1

GX1

7.5 k

GX2

16.9 k

TG2

XMT

88.7 k

442 k

RCV

NSTAT

28.7 k

PWR

RNG

TTH

TFLT

RCV

127 k

GX3

10 k

100 pF

0.22

12-2582a(F)

Figure 6. Metallic PSRR

12-2583a(F)

Figure 7. Longitudinal PSRR

4.7

100

BAT

DISCONNECT

T/R

BAT

BASIC

TEST CIRCUIT

PSRR = 20log

T/R

900

BYPASS CAPACITOR

4.7

100

BAT

DISCONNECT
BYPASS CAPACITOR

56.3

BAT

OR V

BASIC

TEST CIRCUIT

PSRR = 20log

67.5

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Test Configurations

(continued)

LONGITUDINAL BALANCE = 20log

12-2584(F)b

Figure 8. Longitudinal Balance

12-2585(F).r1

Figure 9. Longitudinal Impedance

12-2587(F)

Figure 10. ac Gains

Applications

Characteristic Curves

Figures 11--16 display typical room temperature read-
ings.

12-3507(F)

Note: Gain is normalized to 0 dB.

Figure 11. Receive Gain and Hybrid Balance vs.

Frequency

12-3508

Note: Gain is normalized to 0 dB.

Figure 12. Transmit Gain and Return Loss vs.

Frequency

TIP

RING

BASIC

TEST CIRCUIT

365

100

365

-------

BASIC

TEST CIRCUIT

LONG

BASIC

TEST CIRCUIT

600

T/R

XMT

T/R

RCV

T/R

RCV

XMT

RCV

FREQUENCY (Hz)

0.1k

100k

10k

BELS

(

HYBRID BALANCE

RECEIVE GAIN

FREQUENCY (Hz)

0.1k

100k

10k

(dB

)

RETURN LOSS

TRANSMIT GAIN

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Applications

(continued)

Characteristic Curves

(continued)

12-3503 (F)

Note: R

PROG

= 51.1 k

Figure 13. Loop Current vs. Loop Voltage

12-3506 (F)

Note: R

PROG

= 51.1 k

Figure 14. Loop Current vs. Loop Resistance

12-3504 (F)

Figure 15. SLIC Power Dissipation vs. Loop

Resistance (V

BAT

= 48 V)

12-3505 (F)

Figure 16. SLIC Power Dissipation vs. Loop

Resistance (V

BAT

= 65 V)

LOOP VOLTAGE (V)

OP CURRENT

(

BAT

= 65 V

BAT

= 48 V

200

400

600

800

1000

LOOP RESISTANCE (

)

2000

OOP CURRENT

(
m

1200 1400 1600 1800

BAT

= 48 V

BAT

= 65 V

200

400

600

800

1000

LOOP RESISTANCE (

)

500

1500

2000

1000

I
C

SSI

(

1200 1400 1600 1800

2 CH

1 CH

200

400

600

800

1000

LOOP RESISTANCE (

)

500

1500

2000

1000

IC P

R DI

ION (

)

1200 1400 1600 1800

2 CH

1 CH

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Applications

(continued)

dc Design

Battery Feed

The dc feed characteristic can be described by:

Where:
I

= dc loop current.

T/R

= dc loop voltage.

BAT

| = battery voltage magnitude.

= overhead voltage. This is the difference between

the battery voltage and the open loop tip/ring
voltage.

= loop resistance, not including protection resistors.

= protection resistor value.

= SLIC internal dc feed resistance.

The design begins by drawing the desired dc template.
An example is shown in Figure 17.

12-3503.a (F)

Figure 17. Loop Current vs. Loop Voltage

Starting from the on-hook condition and going through
to a short circuit, the curve passes through two regions:

Region 1: On-hook and low loop currents. In this
region, the slope corresponds to the dc resistance of
the SLIC, R

(typically 60

). The open circuit voltage

is the battery voltage less the overhead voltage of the
device, V

(default is 7.1 V typical). These values are

suitable for most applications.

Region 2: Current limit. The dc current is limited to a val-
ue determined by external resistor R

PROG

. This region of

the dc template has a high resistance (6 k

Calculate the external resistor as follows:

PROG

) = 3.5 x (I

LIM

9.2) mA

To control power dissipation, it is recommended that a
51.1 k

PROG

resistor be used to set a default current-

limit value of 24 mA.

PWR

The R

PWR

resistors dissipate the excess power associ-

ated with a single power supply, short-loop application.
The resistor provides V

BAT

to tip and ring amplifiers.

There is one resistor associated with each channel.
The value of R

PWR

is dependent upon the battery

potential and the current-limit value. The value of R

PWR

can be determined by using the following equation:

PWR

Power dissipation of the resistor is:

RPWR

= (I

LIM

0.003)

PWR

For the recommended 68.5 V V

BAT

and 24 mA I

LIM

design, a 2.2 k

, 2 W resistor is suitable. 2 W resistors

are available as surface-mount components.

Overhead Voltage

In order to drive an on-hook ac signal, the SLIC must
set up the tip and ring voltage to a value less than the
battery voltage. The amount that the open loop voltage
is decreased relative to the battery is referred to as the
overhead voltage and is expressed as:

BAT

)

Without this buffer voltage, amplifier saturation will
occur and the signal will be clipped. The L8576 is auto-
matically set at the factory to allow undistorted on-hook
transmission of a 3.17 dBm signal into a 900

loop

impedance.

The drive amplifiers are capable of 4 Vrms minimum
(V

AMP

). So, the maximum signal the device can guaran-

tee is:

For normal forward or reverse battery operation, over-
head voltage is internally set to about 8 V. In ringing
mode, the overhead voltage is automatically decreased
to about 4 V to permit passage of a larger ring signal.

* During the balanced ringing mode, the current limit is increased

from the value predicted by this equation by a factor of 3.5.

B A T

O H

d c

----------------------------------

T/R

B AT

O H

(

)

d c

--------------------------------------------

LOOP VOLTAGE (V)

OOP CUR

(

BAT

= 65 V

BAT

= 48 V

6 k

Rdc

B AT

22.3

L I M

0.003

-----------------------------

T/R

4 V

T/R

--------------------------

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Applications

(continued)

dc Design

(continued)

Off-Hook Detection

The loop closure comparator has built-in longitudinal
rejection, eliminating the need for an external 60 Hz fil-
ter. The loop closure detection threshold is internally
set at 12 mA.

Power Ringing

The L8576B is designed to generate a balanced trape-
zoidal power ring signal to tip and ring. Because the
L8576B generates the power ringing signal, no ring
relay is needed in this mode of operation. Alternatively,
the L8576B SLIC can be used in a battery-backed,
unbalanced ringing application. In this case, the ring
signal is generated by a central ring generator and is
bused to individual tip/ring pairs. A ringing relay is used
during ringing to disconnect the L8576B from, and
apply the ring generator to, the tip and ring pair.

This section discusses in detail the use of the L8576B
in the balanced mode of operation.

Crest Factor

The balanced ring signal is generated by simply tog-
gling between the powerup forward and reverse battery
states. The state change is done by applying a square
wave (whose frequency is the desired ring frequency)
to logic input B2. Capacitors CF1 and CF2 and resistor
R

RNG

are used to control or ramp the speed of the tran-

sition of the battery reverse, thus shaping the balanced
ring signal. Setting capacitor CF1 = CF2 = 0.22

F and

setting R

RNG

to 28.7 k

provides a crest factor of 1.3

for a 20 Hz ring frequency. This satisfies the

Telcordia

GR-909 requirement of ringing waveform crest factor
between 1.2 and 1.6. Crest factor is defined as the
peak to rms voltage ratio of the ring signal. Ringing
waveforms of crest factors 1.6 and 1.2 are shown in
Figures 18 and 19. The crest factor can be adjusted by
the value of R

RNG

and will be influenced slightly by the

value of V

BAT

. The CF1 and CF2 capacitors should not

be changed because these affect the dc feedback loop
stability in current limit. An R

RNG

value of 22.6 k

will

lower the crest factor to about 1.2 with a 65 V or
72 V battery for a 20 Hz ring frequency. Likewise, an
R

RNG

value of 34.8 k

will raise the crest factor to

about 1.4. For ring frequencies greater than 20 Hz, the
R

RNG

value should be lowered until the desirable crest

factor is achieved. Note the RRNG is common to both
sections of the device.

CF1 and CF2 must exhibit a stable capacitance value
over its voltage range to ensure a properly shaped
waveform. Do not use a ceramic capacitor for CF1 and
CF2; use a capacitor with a polyester, polypropylene,
polycarbonate, or polystyrene dielectric.

12-3346a (F)

Notes:
Slew rate = 5.65 V/ms.

trise = tfall = 23 ms.

pwidth = 2 ms.

period = 50 ms.

Figure 18. Ringing Waveform Crest Factor = 1.6

12-3347a (F)

Notes:
Slew rate = 10.83 V/ms.

trise = tfall = 12 ms.

pwidth = 13 ms.

period = 50 ms.

Figure 19. Ringing Waveform Crest Factor = 1.2

Telcordia

is a registered trademark of Telcordia Technologies, Inc.

TIME (s)

0.00

0.02 0.06

0.04 0.08

0.10

0.12

0.14

0.16

0.18

0.20

S (

)

TIME (s)

0.00

0.02 0.06

0.04 0.08

0.10

0.12

0.14

0.16

0.18

0.20

VOL

)

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Applications

(continued)

Power Ringing

(continued)

Power Ringing Load

Telcordia

GR-909 specifies that a minimum 40 Vrms

must be delivered to a 5 REN ringing load of 1386

F. For 5 REN load, it is recommended that V

BAT

set to 68.5 Vdc. During the power ring state, the dc
current limit is automatically boosted by a factor of 3.5
over the current limit set by resistor R

PROG

. Both of

these factors are necessary to ensure delivery of
40 Vrms to the North American 5 REN ringing load of
1386

+ 40

Ring Trip

Ring trip is accomplished by filtering the voltage seen
at node DC

OUT

and applying it to the integrated ring trip

comparator. DC

OUT

is a voltage proportional to the tip/

ring current, and under short dc loop conditions, on-
hook ringing current and off-hook current provide suffi-
cient voltage differential at DC

OUT

to distinguish that a

ring trip condition has occurred. The ring trip compara-
tor threshold is set via a resistor between the ring trip
comparator and DC

OUT

The output of NSTAT is automatically set to detect ring
trip during the balanced ring mode. During quiet inter-
vals of ringing, the output of NSTAT is automatically
determined by the loop closure detector.

Refer to Figure 2 for the following discussion.

Capacitor C

in conjunction with resistor R

TFLT

form a

single-pole, low-pass filter that smooths the voltage
seen at DC

OUT

. The pole of the filter will influence both

the ripple seen at DC

OUT

and the speed of the transi-

tion of the voltage at DC

OUT

from the pretrip to the

tripped level.

To determine the low-pass pole:

f(Hz) =

Using the recommended 383 k

TFLT

resistor and

the 0.1 µF C

capacitor, the low-pass pole is set at

4.15 Hz.

The loop current at ring trip is given by:

LOOP(TRIP)

= 7.76 mA

Using the recommended 52.3 k

TTH

resistor and the

7.5 k

GX2

resistor in a 20 Hz ringing application, the

ring trip threshold current is set for 54 mA.

Reference Design for ISDN TA Applications

For a complete reference design, please refer to the

POTS for ISDN, WLL, and FITL/FITH Applications,
Featuring Ringing SLIC Solutions

Application Note,

which provides a detailed discussion of the reference
design functionality. The design presented utilizes a dc
to dc converter and requires only a +5 V and a +12 V
supply to operate. The schematic in Figure 2 of this
document portrays the SLIC and codec portions of that
design.

ac Design

There are four key ac design parameters. Termination
impedance is the impedance looking into the 2-wire
port of the line card. It is set to match the impedance of
the telephone loop in order to minimize signal reflec-
tions back to the telephone set. Transmit gain is mea-
sured from the 2-wire port to the PCM highway, while
receive gain is measured from the PCM highway to
the 2-wire port or telephone loop. Finally, the hybrid
balance circuit cancels the unwanted amount of the
received signal that appears at the transmit port.

TFLT

(

)

(

)

-----------------------------------------------

TTH

GX2

---------------

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Applications

(continued)

ac Design

(continued)

Example 1, Real Termination

The following design equations refer to the circuit in
Figure 20. Use these to synthesize real termination
impedance.

Termination impedance:

Receive gain:

Transmit gain:

Hybrid balance:

To optimize the hybrid balance, the sum of the currents
at the VF

IN input of the codec op amp should be set

to 0. The following expressions assume the hybrid bal-
ance network is the same as the termination imped-
ance:

T/R

----------

1500

T 1

G P

---------

T 1

R C V

------------

-----------------------------------

R C V

T/R

F R O

-----------

RC V

R CV

T 1

-----------

R C V

G P

------------

T/R

---------

------------------------------------------------------------------

GSX

T/R

---------------

----------

125

T/R

-----------

b a l

G SX

T/R

-----------

log

H B

RC V

T X

--------------------------

b a l

H B

---------

R C V

T X

log

12-2554.o (F)

Figure 20. ac Equivalent Circuit Using a T8503 Codec

T/R

= 1

VITR

CURRENT

SENSE

RCV

RCVN

RCVP

GSX

1/2 T8503 CODEC

+2.4 V

125 V/A

1/2 L8576

SLIC

= 6

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Applications

(continued)

ac Design

(continued)

Example 2, Complex Termination

The gain shaping required of a complex termination
impedance can be synthesized using the internal AX
amplifier. The following discussion and equations
present a method for selecting proper component val-
ues for the SLIC/codec interface when using a complex
termination.

Complex termination is usually of the form:

5-6396(F)

To work with this application, convert termination to the
form:

5-6397(F)

where:

´ = R

+ R

´ =

+ R

)

C´ =

For the following discussion, refer to Figure 21.

TGP

TGS

): These components give gain

shaping to get good gain flatness. These components
are a scaled version of the specified complex termina-
tion impedance. Note for pure (600

) resistive termi-

nations, components R

TGS

and C

TGS

are not used.

Resistor R

TGP

is used and is the series resistance com-

bination of R

GX1

and R

GX2

or 24.4 k

: With other components set, the transmit gain

(for complex and resistive terminations) R

and R

are

varied to give specified transmit gain.

RCV

: For both complex and resistive termina-

tions, the ratio of these resistors set the receive gain.
For resistive terminations, the ratio of these resistors
set the return loss characteristic. For complex termina-
tions, the ratio of these resistors set the low-frequency
return loss characteristic.

: For complex terminations, these compo-

nents provide high-frequency compensation to the
return loss characteristic. For resistive terminations,
these components are not used. R

CVN

is connected to

ground via a resistor.

: Sets hybrid balance for all terminations.

Set Z

-- gain shaping:

= R

TGP

|| R

TGS

+ C

TGS

which is a scaled version of

T/R

(the specified termination resistance) in the

´ || R

´ + C´ form.

TGP

must be 24.4 k

to set SLIC transconductance to

125 V/A.

TGP

= 24.4 k

At dc, C

TGS

and C´ are open.

TGP

= M x R1´

where M is the scale factor.

M =

It can be shown:

TGS

= M x R2´

and

TGS

C´

-------

---------------------

24.4 k

------------------------

------

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Applications

(continued)

ac Design

(continued)

5-6400a(F)

Figure 21. ac Interface Circuit Using First-Generation Codec (Blocking Capacitors Not Shown)

TGS

TGP

= 24.4 k

ITR

CODEC
OUTPUT
DRIVE
AMP

CODEC

OP AMP

RCV

RCVN

RCVP

T/R

195

TGS

Transmit Gain

Transmit gain will be specified as a gain from T/R to
PCM, T

(dB). Since PCM is referenced to 600

and

assumed to be 0 dB, and in the case of T/R being refer-
enced to some complex impedance other than 600

resistive, the effects of the impedance transformation
must be taken into account.

Again specified complex termination impedance at T/R
is of the form:

5-6396(F)

First calculate the equivalent resistance of this network
at the midband frequency of 1000 Hz.

Using R

, calculate the desired transmit gain, taking

into account the impedance transformation:

(dB) = T

X (specified[dB])

+ 20log

X (specified[dB])

is the specified transmit gain. 600

is the

impedance at the PCM and R

is the impedance at

the T/R. 20log

represents the power loss/gain

due to the impedance transformation.

Note in the case of a 600

pure resistive termination

at T/R 20log

= 20log

= 0.

Thus, there is no power loss/gain due to impedance
transformation and T

(dB) = T

X (specified[dB])

Finally, convert T

(dB) to a ratio, G

(dB) = 20log G

The ratio of R

is used to set the transmit gain:

= G

with a dual Agere codec such as T8503

< 200 k

(

)

(

)

-----------------------------------------------------------------------------

(

)

---------------------------------------------------

600

-----------

600

-----------

600

-----------

600
600

----------

195

----------

Agere Systems Inc.

Data Sheet
May 2001

L8576B Dual Ringing SLIC

Applications

(continued)

ac Design

(continued)

Receive Gain

Ratios of R

RCV

, R

will set both the low-frequency

termination and receive gain for the complex case. In
the complex case, additional high-frequency compen-
sation, via C

, R

, and R

, is needed for the return

loss characteristic. For resistive termination, C

, R

and R

are not used and R

CVN

is tied to ground and a

resistor.

Determine the receive gain, G

RCV

, taking into account

the impedance transformation in a manner similar to
transmit gain.

(dB) = R

X (specified[dB])

+ 20log

(dB) = 20log G

RCV

Then:

RCV

and low-frequency termination

TER(low)

+ 2R

600

-----------

RCV

---------------

RCV

---------------

------------------------------------------------

1500

------------

RCV

---------------

--------------------------------------------

TER(low)

is the specified termination impedance assum-

ing low frequency (C or C´ is open).

is the series protection resistor.

These two equations are best solved using a computer
spreadsheet.

Next, solve for the high-frequency return loss compen-
sation circuit, C

, R

, and R

TGS

TGP

= R

There is an input offset voltage associated with nodes
R

CVN

, R

CVP

. To minimize the effect of the mismatch of

this voltage at T/R, the equivalent resistance to ac
ground at R

CVN

should be approximately equal to that

at R

CVP

. Refer to Figure 22 (schematic with dc blocking

capacitors). To meet this requirement, R

= R

|| R

Hybrid Balance

Set the hybrid cancellation via R

If a +5 V only codec such as an Agere T8503 is used,
dc blocking capacitors must be added as shown in
Figure 22. This is because the codec is referenced to
+2.5 V and the SLIC to ground. With the ac coupling, a
dc bias at T/R is eliminated and power associated with
this bias is not consumed.

1500

-------------

1500

-------------

T GS

T GP

--------------

RCV

----------------------------------

5-8413 (F)

Figure 22. ac Interface Circuit Using First-Generation Codec (Including Blocking Capacitors)

TGS

TSP

= 24.4 k

ITR

CODEC OUTPUT

DRIVE AMP

CODEC

OP AMP

RCV

RCVN

RCVP

T/R

195

TGS

Agere Systems Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Applications

(continued)

ac Design

(continued)

Typically, values of 0.1

F to 0.47

F capacitors are

used for dc blocking. The addition of blocking capaci-
tors will cause a shift in the return loss and hybrid bal-
ance frequency response toward higher frequencies,
degrading the lower-frequency response. The lower
the value of the blocking capacitor, the more pro-
nounced the effect is, but the cost of the capacitor is
lower. It may be necessary to scale resistor values
higher to compensate for the low-frequency response.
This effect is best evaluated via simulation. A

PSPICE

model for the L8576B is available.

Design equation calculations seldom yield standard
component values. Conversion from the calculated
value to standard value may have an effect on the ac
parameters. This effect should be evaluated and opti-
mized via simulation.

Use of an Auxiliary Battery Supply

A second lower-voltage battery supply can be used
with the L8576B in order to lower the overall power
consumption on a short-loop design. For long loops,
any power savings will be negated, since long loops
are supplied by the main battery voltage. The auxiliary
battery would be connected to pins 9 and 37 in lieu of
the R

PWR

resistors. When the external R

PWR

resistors

are removed, more power will be dissipated in the SLIC
so internal SLIC power dissipation must be examined.

First, determine the auxiliary battery voltage:

The auxiliary battery should be set 8 V greater than the
maximum tip/ring loop voltage on the longest allowed
loop, when both channels are off-hook and in current
limit.

Aux Bat

(MAX)

= [(I

LIM

x R

LOOP

) + V

] TOL

VBAT

Where:

LIM

= dc current limit set by R

PROG

(usually 0.024).

LOOP

= maximum loop resistance supported (tele-

phone plus line resistance plus protection
resistors).

= overhead voltage.

TOL

VBAT

= battery tolerance, for a battery tolerance of

±5%, use 1.1.

For example, using the recommended 24 mA current
limit, an overhead voltage of 8 V, and a maximum loop
length of 550

, the maximum auxiliary battery voltage

is 23.3 V.

Next, calculate the power dissipated in the SLIC:

Components of the SLIC power dissipation are quies-
cent power of V

and V

BAT

and loop current associ-

ated with V

BAT

and Aux Bat. These can be calculated

as follows:

VCC(quiescent)

= V

x I

CC(Max)(quiescent)

x 2 channels.

VBAT(quiescent)

= |V

BAT(Max)

| x I

BAT(Max)(quiescent)

x 2 chan-

nels.

VBAT(loop current)

= (|V

BAT(Max)

| 4 V) x 3 mA x 2 chan-

nels.

Aux Bat(loop current)

= (|Aux Bat

(Max)

| 4 V) x (I

LIM

3 mA)

x 2 channels.

Where:

4 V is the minimum overhead voltage, and 3 mA is
V

BAT

's contribution to loop current.

For example, substituting values from the data sheet:

= 5 V

CC(Max)(quiescent)

= 5.5 mA

BAT(Max)

= 70 V

BAT(Max)(quiescent)

= 4 mA

Aux Bat

(Max)

= 23.3 V

LIM

= 24 mA

The following powers are calculated:

VCC(quiescent)

= 5 x 0.0055 x 2 = 0.055

VBAT(quiescent)

= |70| x 0.004 x 2 = 0.56

VBAT(loop current)

= (|70| 4) x 0.003 x 2 = 0.396

Aux Bat(loop current)

= (|23.3| 4) x (0.024 0.003) x 2 =

0.8106

The sum of the four powers is 1.822 W.

Finally, calculate the maximum ambient tempera-
ture allowed for the calculated power dissipation:

A(max)

= T

x P

DISS SLIC(max)

)

The L8576's 44-pin PLCC exhibits a 43 °C/W thermal
resistance if in an enclosure with natural airflow. The
maximum operating temperature of the SLIC is 150 °C.
Thermal shutdown occurs typically at 160 °C.

For example:

A(max)

= 150 (43 x 1.822)

= 150 78.4

= 71.7 °C

The above scenario would allow operation up to 70 °C.

PSPICE

is a registered trademark of Cadence Design Systems, Inc.

Data Sheet

May 2001

L8576B Dual Ringing SLIC

Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liab ility is assumed as a result of their use or application.

May 2001
DS01-199ALC (Replaces DS01-112ALC)

For additional information, contact your Agere Systems Account Manager or the following:
INTERNET: http://www.agere.com
E-MAIL: docmaster@micro.lucent.com
N. AMERICA:

Agere Systems Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18109-3286
1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106)

ASIA PACIFIC: Agere Systems Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256

Tel. (65) 778 8833, FAX (65) 777 7495

CHINA: Agere Systems (Shanghai) Co., Ltd., 33/F Jin Mao Tower, 88 Century Boulevard Pudong, Shanghai 200121 PRC

Tel. (86) 21 50471212, FAX (86) 21 50472266

JAPAN: Agere Systems Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan

Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700

EUROPE: Data Requests: DATALINE: Tel. (44) 7000 582 368, FAX (44) 1189 328 148

Technical Inquiries: GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Ascot),

FRANCE: (33) 1 40 83 68 00 (Paris), SWEDEN: (46) 8 594 607 00 (Stockholm), FINLAND: (358) 9 3507670 (Helsinki),
ITALY: (39) 02 6608131 (Milan), SPAIN: (34) 1 807 1441 (Madrid)

Ordering Information

Device Part No. Description Package Comcode

LUCL8576BP-D Dual SLIC 44-Pin PLCC (Dry-bagged) 108131285

LUCL8576BP-DT Dual SLIC 44-Pin PLCC (Tape and Reel, Dry-bagged) 108131293

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Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: L8576

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: L8576