Agilent HMMC-3108
DC-16 GHz Packaged Divide-by-8
Prescaler
HMMC-3108-TR1 - 7" diameter reel/500 each
HMMC-3108-BLK - Bubble strip/10 each
Data Sheet
Description
The HMMC-3108 is a packaged
GaAs HBT MMIC prescaler
which offers dc to 16 GHz
frequency translation for use in
communications and EW
systems incorporating high
frequency PLL oscillator circuits
and signalpath down
conversion applications. The
prescaler provides a large input
power sensitivity window and
low phase noise.
Absolute Maximum Ratings
1
(@ T
A
= +25 C, unless otherwise stated)
Features
Wide Frequency Range:
0.216 GHz
High Input Power Sensitivity:
Onchip pre and postamps
-20 to +10 dBm (110 GHz)
-15 to +10 dBm (1012 GHz)
-10 to +5 dBm (1215 GHz)
P
out
: +6 dBm (0.99 V
p-p
) will drive
ECL
Low Phase Noise:
-153 dBc/Hz @ 100 kHz Offset
(+) or (-) Single Supply Bias with
wide range:
4.5 to 6.5 V
Differential I/0 with onchip
50
W
W
W
W
W matching
Package Type: SOIC-8 Plastic
Package Dimensions: 4.9 x 3.9 mm typ
Package Thickness: 1.55 mm typ
Lead Pitch: 1.25 mm nom
Lead Width: 0.42 mm nom
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Notes:
1. Operation in excess of any parameter limit (except T
BS
) may cause permanent damage to the device.
2. MTTF >1 x 10
6
hours @ T
BS
<85C. Operation in excess of maximum operating temperature (T
BS
) will degrade MTTF.
2
DC Specifications/Physical Properties
(T
A
= +25 C, V
CC
- V
EE
= 5.0 volts, unless otherwise listed)
Notes:
1. Prescaler will operate over full specified supply voltage range. V
CC
or V
EE
not to exceed limits specified in Absolute Maximum Ratings section.
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RF Specifications
(T
A
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W, V
CC
- V
EE
= 5.0 volts)
Notes:
1. For sinewave input signal. Prescaler will operate down to dc for squarewave input signal. Min. divide frequency limited by input slew rate.
2. Prescaler can exhibit this output signal under bias in the absence of an RF input signal. This condition can be eliminated by use of the Input dc offset
technique described on page 4.
3. Fundamental of output square wave's Fourier Series.
4. Square wave amplitude calculated from P
out
.
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Applications
The HMMC-3108 is designed for
use in high frequency
communications, microwave
instrumentation, and EW radar
systems where low phasenoise
PLL control circuitry or broad
band frequency translation is
required.
Operation
The device is designed to
operate when driven with either
a singleended or differential
sinusoidal input signal over a
200 MHz to 16 GHz bandwidth.
Below 200 MHz the prescaler
input is "slewrate" limited,
requiring fast rising and falling
edge speeds to properly divide.
The device will operate at
frequencies down to dc when
driven with a squarewave.
Due to the presence of an off
chip RFbypass capacitor inside
the package (connected to the
V
CC
contact on the device), and
the unique design of the device
itself, the component may be
biased from either a single
positive or single negative
supply bias. The backside of the
package is not dc connected to
any dc bias point on the device.
For positive supply operation,
V
CC
pins are nominally biased at
any voltage in the +4.5 to +6.5
volt range with pin 8 (V
EE
)
grounded. For negative bias
operation V
CC
pins are typically
grounded and a negative voltage
between - 4.5 to - 6.5 volts is
applied to pin 8 (V
EE
).
acCoupling and dcBlocking
All RF ports are dc connected
onchip to the V
CC
contact
through onchip 50
W resistors.
Under any bias conditions where
V
C C
is not dc grounded the RF
ports should be ac coupled via
series capacitors mounted on
the PC board at each RF port.
Only under bias conditions
where V
CC
is dc grounded (as is
typical for negative bias supply
operation) may the RF ports be
direct coupled to adjacent
circuitry or in some cases, such
as level shifting to subsequent
stages. In the latter case the
package heat sink may be
"floated" and bias applied as the
difference between V
CC
and V
EE
.
Input dc Offset
If an RF signal with sufficient
signal to noise ratio is present at
the RF input lead, the prescaler
will operate and provide a
divided output equal the input
frequency divided by the divide
modulus. Under certain "ideal"
conditions where the input is
well matched at the right input
frequency, the component may
"selfoscillate", especially under
small signal input powers or
with only noise present at the
input. This "selfoscillation" will
produce an undesired output
signal also known as a false
trigger. To prevent false triggers
or self oscillation conditions,
apply a 20 to 100 mV dc offset
voltage between the RFi n and
RFi n ports. This prevents noise
o r spurious low level signals
from triggering the divider.
Adding a 10K
W resistor between
the unused RF input to a contact
point at the VE E potential will
result in an offset of 25mV
between the RF inputs. Note,
however, that the input
sensitivity will be reduced
slightly due to the presence of
this offset.
Figure 1. Simplified Schematic
V
CC
V
CC
V
CC
V
EE
OUT
IN
IN
OUT
SOIC8 w/Backside GND
6
4
2
150p
5
7
By
poss
IN
IN
50
50
Vcc
Vcc
Vcc
50
50
OUT
OUT
3
Pin 1
8
Vee
Vpwr
sel
5
V
CC
V
CC
V
CC
V
EE
OUT
IN
IN
OUT
SOIC8 w/Backside GND
6
4
2
150p
5
7
By
poss
IN
IN
50
50
Vcc
Vcc
Vcc
50
50
OUT
OUT
3
Pin 1
8
Vee
Vpwr
sel
Agilent application note #54,
"GaAs MMIC ESD, Die Attach
and Bonding Guidelines"
provides basic information on
these subjects.
Moisture Sensitivity
Classification: Class 1, per
JESD22-A112-A.
Additional References:
PN #18, "HBT Prescaler
Evaluation Board."
Notes:
-
All dimensions in millimeters.
-
Refer to JEDEC Outline MS-012 for
additional tolerances.
-
Exposed heat slug area on pkg bottom =
2.67 x 1.65
-
Exposed heat sink on package bottom must
be soldered to PCB RF ground plane.
Assembly Notes
Independent of the bias applied
to the package, the backside of
the package should always be
connected to both a good RF
ground plane and a good
thermal heat sinking region on
the PCboard to optimize
performance. For singleended
output operation the unused RF
output lead should be
terminated into 50
W to a contact
point at the V
CC
potential or to
RF ground through a dc blocking
capacitor.
A minimum RF and thermal PC
board contact area equal to or
greater than 2.67 x 1.65 mm
(0.105" x 0.065") with eight
0.020" diameter platedwall
thermal vias is recommended.
MMIC ESD precautions,
handling considerations, die
attach and bonding methods are
critical factors in successful
GaAs MMIC performance and
reliability.
Figure 2. Package & Dimensions
Figure 3. Assembly Diagram (Single-supply, Positive-bias Configuration shown)
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