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Электронный компонент: AK2306LV

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ASAHI KASEI [AK2306/LV]
MS0093-E-04 1 2001/11
AK2306/2306LV



Dual PCM CODEC for ISDN/VoIP TERMINAL ADAPTER


GENERAL DESCRIPTION

AK2306 is a dual PCM CODEC-Filter most suitable for
ISDN Terminal Adapter.

It includes Selectable A-law/u-law function, Internal
Gain Adjustment from +6dB to 18dB by 1dB step
control, Selectable 16Hz/20Hz Ring Tone Generator for
SLIC. All of these functions are controlled by the
internal register accessed through the serial interface.

PCM interface of AK2306 accepts Long Frame, Short
Frame clock formats and GCI format. 64 x N
kHz(128k-4096kHz) clock input is available for PCM
interface.

AK2306 and AK2306LV are pin-compatible, but
different products which power supply voltage are 5.0V
and 3.3V,respectively.
FEATURE
-
Dual PCM CODEC and Filtering systems for
ISDN Terminal Adapter
-
Selectable Ring Tone Generator for SLIC
16Hz or 20Hz tone is available.
-
Independent functions on each channel
controlled by the internal register
- Power Down Mode
- Mute
- Gain Adjustment: +6 to -18dB (1dB step)
-
Selectable PCM Data Interface Timing:
Long Frame / Short Frame/GCI
-
Variable PCM Data Rate:
64k x N [Hz] (128k - 4.096MHz)
-
OP Amp for External Gain Adjustment
-
A-law/u-law Register Selectable
-
Serial Interface to access the internal register
-
Power on Reset
-
Single Power Supply Voltage
- +5.0V 5% (AK2306)
- +3.3V 0.3V (AK2306LV)
-
Low Power Consumption

PACKAGE

- 24pinVSOP
7.9 x 7.6 mm (0.5mm pin pitch)
ASAHI KASEI
[AK2306/LV]
MS0093-E-04 2 2001/11
CONTENTS
ITEMS
PAGE
- BLOCK DIAGRAM............................................. 3
- PIN ASSIGNMENT
............................................. 4
- PIN CONDITION
................................................ 5
- PIN FUNCTION
................................................. 6
- CIRCUIT DESCRIPTION
...................................... 8
- FUNCTIONAL DESCRIPTION
.............................. 9
- PCM INTERFACE...................................... 9
LONGFRAME/SHORTFRAME/GCI
- MUTE.................................................... 12
- GAIN ADJUSTMENT
................................. 13
- RING TONE GENERATOR
.......................... 14
- RESET
....................................................... 15
- POWER DOWN........................................ 16
- SERIAL INTERFACE
................................ 18
- REGISTER....................................................... 22
- ABSOLUTE MAXIMUM RATINGS
......................... 25
- RECOMMENDED OPERATING CONDITIONS
........ 25
- ELECTRICAL CHARACTERISTICS
....................... 25
- APPLICATION CIRCUIT EXAMPLE
....................... 34
- PACKAGE INFORMATION
.................................. 36


ASAHI KASEI
[AK2306/LV]
MS0093-E-04 3 2001/11



BLOCK DIAGRAM

SMF0
SMF1
AAF0
GA0T
GA0R
CODEC
CH0
PCM I/F
AAF1
GA1T
GA1R
CODEC
CH1
VFTP0
VR0
VR1
RING TONE
GENERATOR
PLL
BCLK
DX
DR
VDD
VSS
SCLK
Serial
I/F
DATA
LPC
FS
GST0
VFTP1
GST1
TNOUT
BGREF
AMPT0
AMPR0
AMPT1
AMPR1
Internal Register
R
i t
VREF
FS0
FS1
VFTN0
VFTN1
GSR0
GSR1
Mu
t
0
Mu
t
1
PW
D
N
RX
V
l
m
1
RX
V
l
m
0
T
XVl
m
0
T
XVl
m
1
A/u
_
S
E
L
VFR0
VFR1
CSN
Power on Reset

ASAHI KASEI
[AK2306/LV]
MS0093-E-04 4 2001/11
PIN ASSIGNMENT














VFTP1
VFTN1
GST1
GSR1
VFR1
VR1
VDD
FS
BCLK
DX
DR
TNOUT
1
2
3
4
5
6
7
8
9
10
11
12
VREF
VFTP0
VFTN0
GST0
GSR0
VFR0
VSS
VR0
LPC
CSN
DATA
SCLK
24
23
22
21
20
19
18
17
16
15
14
13
ASAHI KASEI
[AK2306/LV]
MS0093-E-04 5 2001/11
PIN CONDITION
Pin#
Name I/O Pin
type
AC load
(MAX.)
DC load
(MIN.)
Outout status
(Power down
mode)
Output status
(Reset)
Remarks
VFTP1
Analog
VFTN1
Analog
GST1
Analog 50pF
10k
(*1)
Hi-Z Hi-Z
GSR1
O Analog 50pF
10k
(*1)
Hi-Z Hi-Z
VFR1
I Analog
VR1
O Analog 50pF
10k
Hi-Z Hi-Z
VDD
-
FS
I TTL/CMOS(*3)
BCLK
I TTL/CMOS(*3)
DX
O CMOS 15pF Hi-Z Hi-Z
DR
I TTL/CMOS(*3)
TNOUT
O CMOS 15pF L L
SCLK
I TTL/CMOS(*3)
DATA
I/O TTL/CMOS(*3)
15pF Input Input
CSN
I TTL/CMOS(*3)
LPC
O Analog
0.22uF
(*2)
VSS
-
VR0
O Analog 50pF
10k
Hi-Z Hi-Z
VFR0
I Analog
GSR0
O Analog 50pF
10k
(*1)
Hi-Z Hi-Z
GST0
I Analog 50pF
10k
(*1)
Hi-Z Hi-Z
VFTN0
O Analog
VFTP0
O Analog
VREF
O Analog
1.0 uF
(*2)
*1) DC load(MIN.) includes a feedback resistance of input/output op-amp.
*2)External capacitance should be connected to VSS.
*3)TTL level is applied only for the input level of AK2306LV. Output level for both AK2306 and AK230LV,and
the input level of AK2306 are CMOS level.