ASAHI KASEI

[AK4555]

MS0363-E-01

2005/08

GENERAL DESCRIPTION

The AK4555 is a low voltage 20bit A/D & D/A converter for portable digital audio system. In the AK4555,
the loss of accuracy form clock jitter is also improved by using SCF techniques for on-chip post filter.
Analog signal input/output of the AK4555 are single-ended, therefore, any external filters are not required.
The AK4555 is suitable for portable digital audio system, as the AK4555 is low power dissipation and a
small package.

FEATURES

HPF for DC-offset cancel (fc=3.4Hz)
Single-ended ADC

- S/(N+D): 80dB@VDD=2.5V
- Dynamic Range, S/N: 89dB@VDD=2.5V

Single-ended DAC

- Digital de-emphasis for 32kHz, 44.1kHz, 48kHz sampling
- S/(N+D): 85dB@VDD=2.5V
- Dynamic Range, S/N: 92dB@VDD=2.5V

Audio I/F format: MSB First, 2's Compliment

- ADC, DAC: I

Input/Output Voltage: 0.6 x VDD (=1.5Vpp@VDD=2.5V)
High Jitter Tolerance
Sampling Rate: 8kHz to 50kHz
Master Clock: 256fs/384fs/512fs/768fs (fs=8kHz to 50kHz)

1024fs (fs=8kHz to 25kHz)

Power Supply: 1.6 to 3.6V
Low Power Supply Current: 8.6mA
Ta =

40 to 85癈

Very Small Package: 16pin TSSOP

Modulator

MCLK

VDD

VSS

AOUTL

AINL

LRCK
SCLK

VCOM

AINR

Modulator

Decimation

Filter

Serial I/O

Interface

Common Voltage

SDTO

Decimation

Filter

SDTI

PWDAN

DEM0

PWADN

Clock

Divider

AOUTR

Interpolator

Modulator

LPF

DEM1

Low Power & Small Package 20bit

CODEC

AK4555

ASAHI KASEI

[AK4555]

MS0363-E-01

2005/08

Ordering Guide

AK4555VT

-40 +85癈

16pin

TSSOP

(0.65mm

pitch)

AKD4555

Evaluation

Board

for

AK4555

Pin Layout

VCOM

AINR

VSS

AINL

VDD

DEM0

DEM1

SDTO

Top
View

AOUTR

AOUTL

PWADN

SCLK

MCLK

LRCK

SDTI

PWDAN

Comparison with AK4550 and AK4554

Item AK4550

AK4554

AK4555

Power Supply Voltage

2.3

3.6V

1.6

3.6V

Audio I/F Format

ADC: 16bit MSB
justified
DAC: 16bit LSB justified

VCOM pin

0.45 x VDD

0.5 x VDD

ADC S/(N+D) (typ)

82dB

80dB

ADC Input Resistance (typ)

100k

70k

Power Supply Current (typ)

AD+DA

10mA

8mA

5.6mA

4mA

5.6mA

4.4mA

DAC Digital Filter

Stopband Attenuation (min)

43dB

54dB

Passband Ripple (max)

�0.06dB

�0.02dB

Group

Delay

14.8/fs

19.0/fs

MCLK 256fs/384fs/512fs

256fs/384fs/512fs/768fs

(fs=8

50kHz)

1024fs (fs=8

25kHz)

External Circuit

VCOM

4.7

礔 + 0.1礔 0.1礔

AINL, AINR pins

RC filter is needed.

RC filter is on-chip.

ASAHI KASEI

[AK4555]

MS0363-E-01

2005/08

PIN/FUNCTION

No. Pin

Name

I/O Function

VCOM

Common Voltage Output Pin, 0.5 x VDD

AINR

Rch Analog Input Pin

AINL

Lch Analog Input Pin

4 VSS

- Ground

5 VDD

- Power

Supply

6 DEM0

I De-emphasis

Control

7 DEM1

I De-emphasis

Control

SDTO

Audio Serial Data Output Pin

SDTI

Audio Serial Data Input Pin

10 LRCK

Input/Output Channel Clock Pin

11 MCLK

Master Clock Input Pin

12 SCLK

Audio Serial Data Clock Pin

13 PWADN

ADC Power-Down & Reset Mode Pin

"L": Power down. ADC should always be reset upon power-up.

14 PWDAN

DAC Power-Down & Reset Mode Pin

"L": Power down. DAC should always be reset upon power-up.

15 AOUTL

Lch Analog Output Pin

16 AOUTR

Rch Analog Output Pin

Note: All input pins except analog input pins (AINR and AINL) should not be left floating.

Handling of Unused Pin

The unused I/O pins should be processed appropriately as below.

Classification Pin

Name

Setting

Analog

AINR, AINL, AOUTL, AOUTR

These pins should be open.

SDTO

This pin should be open.

Digital

SDTI

This pin should be connected to VSS.

ASAHI KASEI

[AK4555]

MS0363-E-01

2005/08

ABSOLUTE MAXIMUM RATINGS

(VSS=0V; Note 1)

Parameter Symbol

min

max

Units

Power Supply

VDD

-0.3 4.6

Input Current (any pins except for supplies)

IIN

�10 mA

Input Voltage

VIN

-0.3 VDD+0.3

Ambient Temperature (power applied)

-40 85

癈

Storage Temperature

Tstg

-65 150

癈

Note 1. All voltages with respect to ground.

WARNING: Operation at or beyond these limits may results in permanent damage to the device.

Normal operation is not guaranteed at these extremes.

RECOMMENDED OPERATING CONDITIONS

(VSS=0V; Note 1)

Parameter Symbol

min

typ

max

Units

Power Supply

VDD

1.6

2.5

3.6

Note 1. All voltages with respect to ground.

*AKM assumes no responsibility for the usage beyond the conditions in this datasheet.

ASAHI KASEI

[AK4555]

MS0363-E-01

2005/08

ANALOG CHARACTERISTICS

(Ta=25

癈; VDD=2.5V; fs=44.1kHz; Signal Frequency=1kHz; SCLK=64fs; Measurement frequency=20Hz 20kHz;

unless otherwise specified)
Parameter min

typ

max

Units

ADC Analog Input Characteristics: (Note 2)
Resolution -

Bits

S/(N+D)

(

-0.5dB Input)

70 80 -

D-Range

(

-60dB Input, A-weighted)

82 89 -

S/N (A-weighted)

Interchannel Isolation

Interchannel Gain Mismatch

0.2

0.5

Input Voltage

(Note 3)

1.35

1.50

1.65

Vpp

Input Resistance

Power Supply Rejection

(Note 4)

DAC Analog Output Characteristics:
Resolution -

Bits

S/(N+D) 75

D-Range

(

-60dB Output, A-weighted)

86 92 -

S/N (A-weighted)

Interchannel Isolation

Interchannel Gain Mismatch

0.2

0.5

Output Voltage

(Note 3)

1.35

1.5

1.65

Vpp

Load Resistance

Load Capacitance

Power Supply Rejection

(Note 4)

Power Supplies
Power Supply Current

AD+DA

PWADN= "H", PWDAN= "H"

PWADN= "H", PWDAN= "L"

PWADN= "L", PWDAN= "H"

4.4

Power down (Note 5) PWADN= "L", PWDAN= "L"

礎

Power Consumption

AD+DA

PWADN= "H", PWDAN= "H"

32.5

PWADN= "H", PWDAN= "L"

PWADN= "L", PWDAN= "H"

Power down (Note 5) PWADN= "L", PWDAN= "L"

125

礧

Note 2. The offset of ADC is removed by internal HPF.
Note 3. Input/Output of ADC and DAC scales with VDD voltage. 0.6 x VDD(typ).
Note 4. PSR is applied to VDD with 1kHz, 50mV. No signal is input to AINL/R pins and "0" data is input to SDTI pin.
Note 5. In case of power-down mode, all digital input including clocks pins (MCLK, SCLK and LRCK) are held to VDD

or VSS. PWADN and PWDAN pins are held to VSS.

协谢械泻褌褉芯薪薪褘泄 泻芯屑锌芯薪械薪褌: AK4555

协谢械泻褌褉芯薪薪褘泄泻芯屑锌芯薪械薪褌: AK4555