ASAHI KASEI
[AK4569]
MS0292-E-01
2005/07
-
1
-
GENERAL DESCRIPTION
The AK4569 is a 20bit CODEC with built-in Input PGA and Headphone Amplifier. The AK4569 includes a
microphone/line input selector and an ALC circuit for input, and a Mono line output buffer, analog volume
controls and stereo headphone amplifier for output. The AK4569 also features an analog mixing circuit
that allows easy interfacing in mobile phone and portable communication designs. The integrated
headphone amplifier features "pop-free" power-on/off, a mute control and delivers 8.7mW of power into
16
load via 6.8
series resistor. The AK4569 is housed in a 28pin QFN package, making it suitable for
portable applications.
FEATURE
2ch 20bit ADC
- S/N: 89dB
- Single-ended input
- 2 stereo inputs selector
- Analog input PGA: +32dB
-
19dB, Mute, 0.5dB step (MIC input)
+20dB
-
31dB, Mute, 0.5dB step (LINE input)
- Digital HPF for DC-offset cancellation
- I/F format: 20bit MSB justified, I
2
S
2ch 20bit DAC
- I/F Format: I
2
S, 20bit MSB justified, 20bit/16bit LSB justified
- Digital ATT: 0dB
-
127dB, Mute, 0.5dB step (soft transition)
- Soft mute
- Digital De-emphasis Filter: 32kHz, 44.1kHz and 48kHz
- Bass Boost Function
Sampling Rate: 8kHz
48kHz
System clock: 256fs/384fs/512fs
- Input level: CMOS or 1Vpp Analog Input
Analog Mixing Circuit
Mono Lineout
- Analog volume: 0dB
-
30dB, Mute, 2dB step
Headphone Amplifier
- Output Power: 8.7mW x 2ch @16
load & 6.8
series resistor
- S/N: 90dB
P Interface: 3-wire
Power management
Power supply: 2.7V
3.6V
Power dissipation: 15mA
Ta:
-
40
85
C
Small Package: 28pin QFN (5.2mm x 5.2mm, 0.5mm pitch)
20-Bit Stereo CODEC with IPGA & HP-AMP
AK4569
ASAHI KASEI
[AK4569]
MS0292-E-01
2005/07
-
2
-
VCOM
SDTO
LRCK
BICK
ADC
HPF
Audio I/F
Controller
IPGA
AINL1
AINL2
AINR1
AINR2
VCOM
HP-Amp
HPL
DAC
HPR
MOUT
LIN
RIN
MIN
HVDD
HVSS
MUTET
AVDD
AVSS
BOOST
DATT
SDTI
Control
MCLK
CSN
CCLK
CDTI
Register
PDN
DVDD
DVSS
HP-amp
IPGA & ADC
MOUT
DAC
VREF
VREF
Figure 1. Block diagram
ASAHI KASEI
[AK4569]
MS0292-E-01
2005/07
-
3
-
Ordering Guide
AK4569VN
-40 +85C
28pin
QFN
(0.5mm
pitch)
AKD4569
Evaluation
board
for
AK4569
Pin Layout
PDN
AIN
L
1
1
CSN
28
2
CCLK 3
CDTI 4
LRCK
5
MCLK 6
BICK 7
AIN
R
1
27
A
I
NL2
26
25
24
AV
S
S
23
VC
O
M
22
SD
T
I
8
SD
T
O
9
DVD
D
10
DVSS
11
HVSS
12
13
HPR
14
21
20
19
18
17
16
15
VREF
LIN
RIN
MIN
MOUT
MUTET
HPL
Top View
HVD
D
AINR
2
AV
D
D
Comparison Table between AK4566 and AK4569
Function AK4566 AK4569
DAC Digital Filter
Stopband Attenuation (min)
43dB
59dB
Passband Ripple (max)
0.06dB
0.01dB
Frequency Response including
Analog Filter (0
20.0kHz)
0.5dB
1.0dB
The condition to stop the external
clocks.
PDN pin = "L"
PDN pin = "L"
or PMADC=PMDAC bits = "0"
ASAHI KASEI
[AK4569]
MS0292-E-01
2005/07
-
4
-
PIN/FUNCTION
No. Pin
Name I/O
Function
1 PDN
I
Power-down Pin
When "L", the AK4569 is in power-down mode and is held in reset. The AK4569
should always be reset upon power-up.
2
CSN
I
Control Data Chip Select Pin
3
CCLK
I
Control Clock Input Pin
4
CDTI
I
Control Data Input Pin
5 LRCK
I
L/R Clock Pin
This clock determines which audio channel is currently being output on SDTO pin and
input on SDTI pin.
6
MCLK
I
Master Clock Input Pin
7 BICK
I
Serial Bit Clock Pin
This clock is used to latch audio data.
8
SDTI
I
Audio Data Input Pin
9 SDTO
O
Audio Data Output Pin
SDTO pin goes to DVSS when PDN pin is "L".
10 DVDD
-
Digital Power Supply Pin
11 DVSS
- Digital
Ground
Pin
12 HVSS
-
Ground Pin for Headphone Amplifier
13 HVDD
-
Power Supply Pin for Headphone Amplifier
14 HPR
O
Rch Headphone Amplifier Output Pin
HPR pin goes to HVSS when PDN pin is "L".
15 HPL
O
Lch Headphone Amplifier Output Pin
HPL pin goes to HVSS when PDN pin is "L".
16 MUTET
O
Mute Time Constant Control Pin
A capacitor for mute time constant should be connected between MUTET pin and
HVSS pin. MUTET pin goes to HVSS when PDN pin is "L".
17 MOUT
O
Mono Analog Output Pin
MOUT pin goes to Hi-Z when PDN pin is "L".
18 MIN
I
Mono Analog Input Pin
19 RIN
I
Rch Analog Input Pin
20 LIN
I
Lch Analog Input Pin
21 VREF
O
Reference Voltage Output Pin, 2.1V (typ, respect to AVSS)
Normally connected to AVSS pin with 0.1
F ceramic capacitor in parallel with a 4.7F
electrolytic capacitor. VREF pin goes to AVSS when PDN pin is "L".
22 VCOM
O
Common Voltage Output Pin, 1.25V (typ, respect to AVSS)
Normally connected to AVSS pin with 0.1
F ceramic capacitor in parallel with a 2.2F
electrolytic capacitor. VCOM pin goes to AVSS when PDN pin is "L".
23 AVSS
-
Analog Ground Pin
24 AVDD
-
Analog Power Supply Pin
25 AINR2
I
Rch Analog Input 2 Pin for ADC (MIC Input)
26 AINL2
I
Lch Analog Input 2 Pin for ADC (MIC Input)
27 AINR1
I
Rch Analog Input 1 Pin for ADC (LINE Input)
28 AINL1
I
Lch Analog Input 1 Pin for ADC (LINE Input)
Note: No digital input pins must be left floating.
ASAHI KASEI
[AK4569]
MS0292-E-01
2005/07
-
5
-
Handling of Unused Pin
The unused I/O pins should be processed appropriately as below.
Classification Pin
Name
Setting
Analog
HPR, HPL, MOUT, AINR2, AINL2,
AINR1, AINL1
These pins should be open.
SDTO
This pin should be open.
Digital
SDTI
This pin should be connected to DVSS.
ABSOLUATE MAXIMUM RATING
(AVSS, DVSS, HVSS=0V; Note 1)
Parameter Symbol
min
max
Units
Power Supplies
Analog
Digital
HP-AMP
|AVSS HVSS| (Note 2)
|AVSS DVSS| (Note 2)
AVDD
DVDD
HVDD
GND1
GND2
-0.3
-0.3
-0.3
-
-
4.6
4.6
4.6
0.3
0.3
V
V
V
V
V
Input Current (any pins except for supplies)
IIN
-
10
mA
Analog Input Voltage (Note 3)
VINA
-0.3
(AVDD+0.3) or 4.6
V
Digital Input Voltage (Note 4)
VIND
-0.3
(DVDD+0.3) or 4.6
V
Ambient Temperature
Ta
-40
85
C
Storage Temperature
Tstg
-65
150
C
Note 1. All voltages with respect to ground.
Note 2. AVSS, DVSS and HVSS must be connected to the same analog ground plane.
Note 3. MIN, RIN, LIN, AINR2, AINL2, AINR1, AINL1 pins.
Max is smaller value between (AVDD+0.3) and 4.6V.
Note 4. PDN, CSN, CCLK, CDTI, LRCK, MCLK, BICK, SDTI pins.
Max is smaller value between (DVDD+0.3) and 4.6V.
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMEND OPERATING CONDITIONS
(AVSS, DVSS, HVSS=0V; Note 1)
Parameter Symbol
min
typ
max
Units
Power Supplies Analog
Digital (Note 5)
HP-AMP
AVDD
DVDD
HVDD
2.5
2.5 or (AVDD
-0.3)
2.5
3.0
3.0
3.0
3.6
3.6 or (AVDD+0.3)
3.6
V
V
V
Note 1. All voltages with respect to ground.
Note 5. Min is larger value between 2.5V and (AVDD
-0.3). Max is smaller value between 3.6V and (AVDD+0.3).
* AKM assumes no responsibility for usage beyond the conditions in this datasheet.
PDF 
ZIP