ASAHI KASEI
[AK6002A/04A/08A]
DAI01E-01
1999/10
- 1 -
AK6002A / 04A / 08A
I
2
C bus 2K / 4K / 16Kbit Serial CMOS EEPROM
Features
ADVANCED CMOS EEPROM TECHNOLOGY
READ/WRITE NON-VOLATILE MEMORY
WIDE VCC OPERATION
AK6002A
2048 bits, 256
8 organization
AK6004A
4096 bits, 512
8 organization
AK6008A
16384 bits, 2048
8 organization
I
2
C
TM
SERIAL INTERFACE
LOW POWER CONSUMPTION
- 0.8
A max. Standby
HIGH RELIABILITY
- Endurance : 100K cycles
- Data Retention : 10 years
16 byte page write mode
Automatic write cycle time-out with auto-ERASE
IDEAL FOR LOW DENSITY DATA STORAGE
- Low cost, space saving, 8-pin package (SOP, SSOP, TSSOP)
I
2
C
TM
is a registered trademark of Phillips Corporation.
ASAHI KASEI
[AK6002A/04A/08A]
DAI01E-01
1999/10
- 2 -
General Description
The AK6002A/04A/08A is a 2048/4096/16384-bit serial CMOS EEPROM divided into 256/512/2048 registers
of 8 bits each.
The AK6002A/04A/08A can operate full function under wide operating voltage range from 1.8V to 5.5V. The
charge up circuit is integrated for high voltage generation that is used for write operation.
The AK6002A/04A/08A conforms to all specifications in the 2 wire protocol and is controlled by serial clock
(SK) and serial data (SDA) line.
Some devices can be connected to the same bus. Each device connected to the bus is software addressable
by a unique address, and can operate as either a transmitter or receiver. In addition to transmitters and
receivers, devices can also be considered as masters or slaves when performing data transfers (see Table1).
The master is the device which initiates a data transfers on the bus and generates the clock signals to permit
that transfer. At that time, the device addressed is considered as the slave.
TERM
DESCRIPTION
Transmitter The device which sends the data to the bus
Receiver
The device which receives the data from the bus
Master
The device which initiates a transfer, generates clock signals and terminates
a transfer
Slave
The device addressed by a master
Table 1. Definitions
Pin arrangement
Pin Name
Function
S0,S1,S2
Device Address Inputs
SCL
Clock Input
SDA
Data Input / Output
WC
Write Control
Vcc
Power Supply
GND
Ground
Type of Products
Model
Memory size
Temp.Range
Vcc
Package
AK6002AF
AK6002AV
2Kbits
-40
C
85
C
-40
C
85
C
2.7V
5.5V
2.7V
5.5V
8pin Plastic SOP
8pin Plastic TSSOP
AK6004AF
AK6004AM
4Kbits
-40
C
85
C
-40
C
85
C
1.8V
5.5V
1.8V
5.5V
8pin Plastic SOP
8pin Plastic SSOP
AK6008AF
16Kbits
-40
C
85
C
1.8V
5.5V
8pin Plastic SOP
ASAHI KASEI
[AK6002A/04A/08A]
DAI01E-01
1999/10
- 3 -
DATA TRANSFER
All commands are preceded by a START condition. After the START condition, a slave address is
sent. After the AK6002A/04A/08A recognizes the START condition, the devices interfaced to the
bus wait for the slave address to be transmitted over the SDA line. If the transmitted slave address
matches an address of one of the devices, the designated slave pulls the SDA line to LOW
(ACKNOWLEDGE) .
The data transfer is always terminated by a STOP condition generated by the master.
[ Data validity ]
The data on the SDA line must be stable during the HIGH period of the clock. The HIGH or LOW
state of the data line can only change when the clock signal on the SCL line is LOW.
Figure1. Data transfer
[ START and STOP condition]
A HIGH to LOW transition on the SDA line while SCL is HIGH defines a START condition. All
commands are preceded by the START condition.
A LOW to HIGH transition on the SDA line while SCL is HIGH defines a STOP condition. All
communications are terminated by the STOP condition. After a read sequence, the STOP condition
will place the EEPROM in a standby power mode.
Figure2. Start and STOP Definition
ASAHI KASEI
[AK6002A/04A/08A]
DAI01E-01
1999/10
- 4 -
[ACKNOWLEDGE]
ACKNOWLEDGE is a software convention used to indicate successful data transfers. The
transmitting device will release the bus after transmitting eight bits. During the next clock (ninth
clock), the receiver will pull the SDA line to LOW to acknowledge that it received the eight bits of
data.
The AK6002A/04A/08A will respond with an acknowledge after recognition of a start condition and
its slave address. If both the device and a write operation have been selected, the
AK6002A/04A/08A will respond with an acknowledge after the receipt of each subsequent eight bit
word.
In the read mode the AK6002A/04A/08A slave will transmit eight bits of data, release the SDA line
and monitor the line for an acknowledge. If an acknowledge is detected and no STOP condition is
generated by the master, the slave will continue to transmit data. If an acknowledge is not detected,
the slave will terminate further data transmissions and await the STOP condition to return to the
standby power mode.
Figure3. Acknowledge Response from Receiver
ASAHI KASEI
[AK6002A/04A/08A]
DAI01E-01
1999/10
- 5 -
[SLAVE ADDRESS]
After the START condition, a SLAVE ADDRESS is sent. If the transmitted slave address matches an
address of one of the device, the designated slave pulls the SDA line to LOW .
AK6002A
The most significant four bits of the slave address are fixed as "1010". The next
three bits are S0, S1 and S2 device address bits. These three bits identify the specific
device on the bus. They is set by the hard wired input pins (S0 pin, S1 pin and S2 pin).
Therefore a total of eight devices can be connected to the same bus.
AK6004A
The most significant four bits of the slave address are fixed as "1010". The next two
bits are S2, S1 device address bits. These two bits identify the specific device on the
bus. They is set by the hard wired input pins (S1 pin and S2 pin). Therefore a total of
four devices can be connected to the same bus.
The next one bit is the most significant bit of the memory address.
AK6008A
The most significant four bits of the slave address are fixed as "1010". The next
three bits are the most significant three bits of the memory address.
The last bit of the slave address (R/W bit) defines whether a write or read condition is requested by
the master. A "1" indicates that the read operation is to be executed. A "0" indicates that the write
operation is to be executed.
Figure4. Slave Address (AK6002A)
Figure5. Slave Address (AK6004A)
Figure6. Slave Address (AK6008A)
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