DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED MOSFET PAIR
GENERAL DESCRIPTION
The ALD1103 is a monolithic dual N-channel and dual P-channel matched
transistor pair intended for a broad range of analog applications. These
enhancement-mode transistors are manufactured with Advanced Linear
Devices' enhanced ACMOS silicon gate CMOS process. It consists of an
ALD1101 N-channel MOSFET pair and an ALD1102 P-channel MOSFET
pair in one package.
The ALD1103 offers high input impedance and negative current temperature
coefficient. The transistor pair is matched for minimum offset voltage and
differential thermal response, and it is designed for precision signal
switching and amplifying applications in +2V to +12V systems where low
input bias current, low input capacitance and fast switching speed are
desired. Since these are MOSFET devices, they feature very large (almost
infinite) current gain in a low frequency, or near DC, operating environment.
When used in pairs, a dual CMOS analog switch can be constructed. In
addition, the ALD1103 is intended as a building block for differential
amplifier input stages, transmission gates, and multiplexer applications.
The ALD1103 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result in extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specified at 50pA at room temperature. For example, DC beta of the device
at a drain current of 5mA at 25
C is = 5mA/50pA = 100,000,000.
FEATURES
Thermal tracking between N-channel and P-channel pairs
Low threshold voltage of 0.7V for both N-channel &
P-channel MOSFETS
Low input capacitance
Low Vos -- 10mV
High input impedance -- 10
13
typical
Low input and output leakage currents
Negative current (I
DS
) temperature coefficient
Enhancement mode (normally off)
DC current gain 10
9
Matched N-channel and matched P-channel in one package
ALD1103
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
PIN CONFIGURATION
APPLICATIONS
Precision current mirrors
Complementary push-pull linear drives
Analog switches
Choppers
Differential amplifier input stage
Voltage comparator
Data converters
Sample and Hold
Analog inverter
Precision matched current sources
DN2
GN2
SN2
GP2
SP2
GN1
SN1
DP1
GP1
1
2
3
4
DB, PB, SB PACKAGE
5
6
7
8
9
10
11
12
13
14
DN1
V
+
V
-
DP2
SP1
BLOCK DIAGRAM
N SOURCE 1 (3)
SUBSTRATE (4)
N SOURCE 2 (12)
N GATE 2 (13)
N DRAIN 1 (1)
N GATE 1 (2)
N DRAIN 2 (14)
P SOURCE 1 (7)
SUBSTRATE (11)
P SOURCE 2 (8)
P GATE 2 (9)
P DRAIN 1 (5)
P GATE 1 (6)
P DRAIN 2 (10)
Operating Temperature Range*
-55
C to +125
C
0
C to +70
C
0
C to +70
C
14-Pin
14-Pin
14-Pin
CERDIP
Plastic Dip
SOIC
Package
Package
Package
ALD1103 DB
ALD1103 PB
ALD1103 SB
* Contact factory for industrial temperature range.
ORDERING INFORMATION
1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ALD1103
Advanced Linear Devices
2
ABSOLUTE MAXIMUM RATINGS
Drain-source voltage, V
DS
13.2V
Gate-source voltage, V
GS
13.2V
Power dissipation
500 mW
Operating temperature range
PB, SB package
0
C to +70
C
DB package
-55
C to +125
C
Storage temperature range
-65
C to +150
C
Lead temperature, 10 seconds
+260
C
Gate Threshold
V
T
0.4
0.7
1.0
V
I
DS
= 10
A V
GS
= V
DS
-0.4
-0.7
-1.2
V
I
DS
= -10
A V
GS
= V
DS
Voltage
Offset Voltage
V
OS
10
mV
I
DS
= 100
A V
GS
= V
DS
10
mV
I
DS
= -100
A V
GS
= V
DS
V
GS1
- V
GS2
Gate Threshold
Temperature
TC
VT
-1.2
mV/
C
-1.3
mV/
C
Drift
On Drain
I
DS (ON)
25
40
mA
V
GS
= V
DS
= 5V
-8
-16
mA
V
GS
= V
DS
= -5V
Current
Trans-.
G
fs
5
10
mmho
V
DS
= 5V I
DS
= 10mA
2
4
mmho
V
DS
= -5V I
DS
= -10mA
conductance
Mismatch
G
fs
0.5
%
0.5
%
Output
G
OS
200
mho
V
DS
= 5V I
DS
= 10mA
500
mho
V
DS
= -5V I
DS
= -10mA
Conductance
Drain Source
R
DS(ON)
50
75
V
DS
= 0.1V V
GS
= 5V
180
270
V
DS
= -0.1V V
GS
= -5V
ON Resistance
Drain Source
ON Resistance
R
DS(ON)
0.5
%
V
DS
= 0.1V V
GS
= 5V
0.5
%
V
DS
= -0.1V V
GS
= -5V
Mismatch
Drain Source
Breakdown
BV
DSS
12
V
I
DS
= 10
A V
GS
=0V
-12
V
I
DS
= -10
A V
GS
=0V
Voltage
Off Drain
I
DS(OFF)
0.1
4
nA
V
DS
=12V I
GS
= 0V
0.1
4
nA
V
DS
= -12V V
GS
= 0V
Current
4
A
T
A
= 125
C
4
A
T
A
= 125
C
Gate Leakage
I
GSS
1
50
pA
V
DS
= 0V V
GS
=12V
1
50
pA
V
DS
= 0V V
GS
=-12V
Current
10
nA
T
A
= 125
C
10
nA
T
A
= 125
C
Input
C
ISS
6
10
pF
6
10
pF
Capacitance
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
C unless otherwise specified
N - Channel
Test
P - Channel
Test
Parameter
Symbol Min
Typ
Max
Unit
Conditions
Min
Typ
Max
Unit
Conditions
ALD1103
Advanced Linear Devices
3
P- CHANNEL TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT CHARACTERISTICS
DRAIN - SOURCE VOLTAGE (V)
DRAIN - SOURCE CURRENT
(mA)
-80
-60
-40
-20
0
V
BS
= 0V
T
A
= 25
C
-10V
-8V
-6V
-4V
-2V
0
-8
-2
-6
-4
-10
-12
V
GS
= -12V
LOW VOLTAGE OUTPUT
CHARACTERISTICS
DRAIN -SOURCE VOLTAGE (mV)
DRAIN-SOURCE CURRENT
(mA)
-320
-160
0
160
320
-4
4
2
0
-2
-4V
V
GS
= -12V
-6V
V
BS
= 0V
T
A
= 25
C
-2V
-12
FORWARD TRANSCONDUCTANCE
vs. DRAIN - SOURCE VOLTAGE
DRAIN - SOURCE VOLTAGE (V)
0
-8
-2
-6
-4
-10
FORWARD TRANSCONDUCTANCE
(
mho)
10000
5000
2000
1000
500
200
100
V
BS
= 0V
f = 1KHz
I
DS
= -5mA
T
A
= +125
C
T
A
= +25
C
I
DS
= -1mA
TRANSFER CHARACTERISTIC
WITH SUBSTRATE BIAS
GATE - SOURCE VOLTAGE (V)
0
-0.8
-1.6
-2.4
-3.2
-4.0
-20
-15
-10
-5
0
DRAIN-SOURCE CURRENT
(
A)
V
BS
= 0V
4V
6V
8V
10V
12V
V
GS
= V
DS
T
A
= 25
C
2V
GATE - SOURCE VOLTAGE (V)
R
DS (ON)
vs. GATE - SOURCE VOLTAGE
DRAIN - SOURCE ON RESISTANCE
(
)
10000
1000
100
10
-2
0
-4
-6
-8
-10
-12
V
DS
= 0.4V
V
BS
= 0V
T
A
= +125
C
T
A
= +25
C
OFF DRAIN - CURRENT vs.
TEMPERATURE
TEMPERATURE (
C)
OFF - DRAIN SOURCE CURRENT
(A)
-50
-25
+25
+50
+75
+125
+100
0
-10
X
10
-6
V
DS
= -12V
V
GS
= V
BS
= 0V
-10
X
10
-12
-10
X
10
-9
ALD1103
Advanced Linear Devices
4
N- CHANNEL TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT CHARACTERISTICS
DRAIN -SOURCE CURRENT
(mA)
160
120
80
0
40
V
BS
= 0V
T
A
= 25
C
V
GS
= 12V
10V
8V
6V
4V
2V
DRAIN-SOURCE VOLTAGE (V)
0
2
4
6
8
10
12
LOW VOLTAGE OUTPUT
CHARACTERISTICS
DRAIN -SOURCE VOLTAGE (mV)
DRAIN-SOURCE CURRENT
(mA)
-160
-80
0
80
160
-8
8
4
0
-4
4V
V
GS
= 12V
6V
V
BS
= 0V
T
A
= 25
C
2V
FORWARD TRANSCONDUCTANCE
(
mho)
FORWARD TRANSCONDUCTANCE
vs. DRAIN-SOURCE VOLTAGE
DRAIN -SOURCE VOLTAGE (V)
1 x10
5
5 x10
4
1 x10
4
5 x10
3
2 x10
3
2 x10
4
1 x10
3
T
A
= +125
C
T
A
= +25
C
I
DS
= 10mA
I
DS
= 1mA
0
2
4
6
8
10
12
V
BS
= 0V
f = 1KHz
GATE - SOURCE VOLTAGE (V)
TRANSFER CHARACTERISTIC
WITH SUBSTRATE BIAS
DRAIN-SOURCE CURRENT
(
A)
20
15
10
5
0
0
0.8
1.6
2.4
3.2
4.0
V
BS
= 0V
-2V
-4V
-6V
-8V
-10V
-12V
V
GS
= V
DS
T
A
= 25
C
GATE SOURCE VOLTAGE (V)
R
DS (ON)
vs. GATE - SOURCE VOLTAGE
DRAIN - SOURCE ON RESISTANCE
(
)
10000
1000
100
10
2
0
4
6
8
10
12
V
DS
= 0.2V
V
BS
= 0V
T
A
= +25
C
T
A
= +125
C
OFF DRAIN - CURRENT vs.
TEMPERATURE
TEMPERATURE (
C)
OFF - DRAIN SOURCE CURRENT
(A)
-50
-25
+25
+50
+75
+125
+100
0
10
X
10
-6
V
DS
= +12V
V
GS
= V
BS
= 0V
10
X
10
-12
10
X
10
-9
ALD1103
Advanced Linear Devices
5
DIFFERENTIAL AMPLIFIER
CURRENT SOURCE MULTIPLICATION
CURRENT SOURCE MIRROR
CURRENT SOURCE WITH GATE CONTROL
TYPICAL APPLICATIONS
ISET
RSET
Q3
V+ = +5V
I SOURCE
Q1, Q2: N - Channel MOSFET
Q3, Q4: P - Channel MOSFET
I SOURCE = ISET
= V+ -Vt
RSET
= 4
RSET
~
Q1
Q2
V+ = +5V
Q4
ALD1103
V+
PMOS PAIR
Q
4
V
OUT
V
IN
-
NMOS PAIR
Q
2
Q
1
V
IN
+
Current
Source
Q
3
Q
1
, Q
2
: N - Channel MOSFET
Q
3
, Q
4
: P - Channel MOSFET
ALD1103
Q
SET,
Q
1
..Q
N
: ALD 1101 or ALD 1103
N - Channel MOSFET
I
SET
V+ = +5V
I
SOURCE
= I
SET
x N
R
SET
Q
2
Q
3
Q
SET
Q
1
Q
N
V+ = +5V
Q4
ISOURCE
RSET
Q1
Q3
ISET
ON
OFF
Digital Logic Control
of Current Source
Q1
: N - Channel MOSFET
Q3,Q4 : P - Channel MOSFET
1/2 ALD1103
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