3968

DUAL FULL-BRIDGE PWM

MOTOR DRIVER WITH BRAKE

The A3968SA and A3968SLB are designed to bidirectionally control two

dc motors. Each device includes two H-bridges capable of continuous output
currents of

650 mA and operating voltages to 30 V. Motor winding current

can be controlled by the internal fixed-frequency, pulse-width modulated
(PWM), current-control circuitry. The peak load current limit is set by the
user's selection of a reference voltage and current-sensing resistors. Except
for package style and pinout, the two devices are identical.

The fixed-frequency pulse duration is set by a user-selected external

RC timing network. The capacitor in the RC timing network also determines
a user-selectable blanking window that prevents false triggering of the PWM
current-control circuitry during switching transitions.

To reduce on-chip power dissipation, the H-bridge power outputs have

been optimized for low saturation voltages. The sink drivers feature Allegro's
patented SatlingtonTM output structure. The Satlington outputs combine the
low voltage drop of a saturated transistor and the high peak current capability
of a Darlington.

For each bridge, the INPUT

and INPUT

terminals determine the load

current polarity by enabling the appropriate source and sink driver pair.
When a logic low is applied to both INPUTs of a bridge, the braking function
is enabled. In brake mode, both source drivers are turned OFF and both sink
drivers are turned ON, thereby dynamically braking the motor. When a logic
high is applied to both INPUTs of a bridge, all output drivers are disabled.
Special power-up sequencing is not required. Internal circuit protection
includes thermal shutdown with hysteresis, ground-clamp and flyback diodes,
and crossover-current protection.

The A3968SA is supplied in a 16-pin dual in-line plastic package. The

A3968SLB is supplied in a 16-lead plastic SOIC with copper heat sink tabs.
The power tab is at ground potential and needs no electrical isolation.

A3968SLB

LOGIC

OUT

GROUND

Dwg. PP-066

GROUND

OUT

INPUT

OUT

SENSE

INPUT

LOAD

SUPPLY

REFERENCE

INPUT

SENSE

OUT

LOGIC
SUPPLY

REF

Always order by complete part number:

Part Number

Package

A3968SA

16-pin DIP

C/W

A3968SLB

16-lead batwing SOIC

C/W

FEATURES

650 mA Continuous Output Current

s 30 V Output Voltage Rating
s Internal Fixed-Frequency PWM Current Control
s SatlingtonTM Sink Drivers
s Brake Mode
s User-Selectable Blanking Window
s Internal Ground-Clamp & Flyback Diodes
s Internal Thermal-Shutdown Circuitry
s Crossover-Current Protection and UVLO Protection

ADVANCE INFORMATION

(subject to change without notice)

September 3, 1999

ABSOLUTE MAXIMUM RATINGS

Load Supply Voltage, V

................... 30 V

Output Current, I

OUT

(peak) ..........

750 mA

(continuous) ..............................

650 mA

Logic Supply Voltage, V

................. 7.0 V

Input Voltage, V

..... -0.3 V to V

+ 0.3 V

Sense Voltage, V

................................ 1.0 V

Package Power Dissipation (T

= 25

C), P

A3968SA ................................... 2.08 W*
A3968SLB ................................. 1.87 W*

Operating Temperature Range,

................................... -20

C to +85

Junction Temperature,

................................................. +150

Storage Temperature Range,

................................. -55

C to +150

Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or a junction temperature
of 150

* Per SEMI G42-88 Specification, Thermal Test
Board Standardization for Measuring Junction-
to-Ambient Thermal Resistance of Semiconductor
Packages.

Data Sheet

29319.29

3968
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
WITH BRAKE

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000

FUNCTIONAL BLOCK DIAGRAM

(one-half of circuit shown)

OUT

GROUND

Dwg. PP-066-3

OUT

INPUT

OUT

SENSE

INPUT

LOAD

SUPPLY

REFERENCE

INPUT

SENSE

OUT

LOGIC

SUPPLY

REF

GROUND

LOGIC

A3968SA

REFERENCE

V CC

LOGIC

SUPPLY

INPUTA

LOAD

SUPPLY

OUT

V BB

R T

C T

GROUND

R S

Dwg. FP-036-4

SENSE

UVLO
& TSD

BLANKING

GATE

PWM LATCH

CURRENT-SENSE

COMPARATOR

INPUTB

OSC

TO OTHER
BRIDGE

CONTROL LOGIC

SOURCE

ENABLE

TRUTH TABLE

INPUT

OUT

Description

Brake mode

"Forward"

"Reverse"

Disable

Z = High impedance

3968

DUAL FULL-BRIDGE

PWM MOTOR DRIVER

WITH BRAKE

Load Supply Voltage Range

Operating, I

OUT

650 mA, L = 3 mH

Output Leakage Current

CEX

OUT

= 30 V

<1.0

OUT

= 0 V

<-1.0

-50

Output Saturation Voltage

CE(SAT)

Source Driver, I

OUT

= -400 mA

1.72.0

Source Driver, I

OUT

= -650 mA

1.8

2.1

Sink Driver, I

OUT

= +400 mA, V

= 0.5 V

0.3

0.5

Sink Driver, I

OUT

= +650 mA, V

= 0.5 V

0.4

1.3

Clamp Diode Forward Voltage

= 400 mA

1.1

1.4

= 650 mA

1.4

1.6

Motor Supply Current

BB(ON)

Both bridges ON (forward or reverse)

3.0

5.0

(No Load)

BB(OFF)

All INPUTs = 2.4 V

<1.0

200

ELECTRICAL CHARACTERISTICS at T

= +25

C, V

= 30 V, V

= 4.75 V to 5.5 V, V

REF

= 2 V,

= 0 V, 56 k

& 680 pF RC to Ground (unless noted otherwise)

Limits

Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

Units

Output Drivers

Logic Supply Voltage Range

Operating

4.75

5.50

Logic Input Voltage

IN(1)

2.4

IN(0)

0.8

Logic Input Current

IN(1)

= 2.4 V

<1.0

IN(0)

= 0.8 V

<-20

-200

Reference Input Volt. Range

REF

Operating

0.1

2.0

Reference Input Current

REF

-2.5

1.0

Reference Divider Ratio

REF

TRIP

3.8

4.0

4.2

Current-Sense Comparator

REF

= 0.1 V

-6.0

6.0

Input Offset Voltage

Current-Sense Comparator

Operating

-0.3

1.0

Input Voltage Range

Sense-Current Offset

OUT

, 50 mA

OUT

650 mA

Control Logic

NOTES:1. Typical Data is for design information only.

2. Negative current is defined as coming out of (sourcing) the specified device terminal.

3968
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
WITH BRAKE

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000

Limits

Characteristic

Symbol

Test Conditions

Min.

Typ.

Max.

Units

ELECTRICAL CHARACTERISTICS at T

= +25

C, V

= 30 V, V

= 4.75 V to 5.5 V, V

REF

= 2 V,

= 0 V, 56 k

& 680 pF RC to Ground (unless noted otherwise) (cont.)

Control Logic (continued)

NOTES:1. Typical Data is for design information only.

2. Negative current is defined as coming out of (sourcing) the specified device terminal.

PWM RC Frequency

osc

= 680 pF, R

= 56 k

22.9

25.4

27.9

kHz

PWM Propagation Delay Time

PWM

Comparator Trip to Source OFF

1.0

1.4

Cycle Reset to Source ON

0.8

1.2

Cross-Over Dead Time

codt

1 k

Load to 25 V

0.2

1.8

3.0

Propagation Delay Times

OUT

650 mA, 50% to 90%:

Disable OFF to Source ON

100

Disable ON to Source OFF

500

Disable OFF to Sink ON

200

Disable ON to Sink OFF

200

Brake Enable to Sink ON

2200

Brake Enable to Source OFF

200

Thermal Shutdown Temp.

165

Thermal Shutdown Hysteresis

UVLO Enable Threshold

T(UVLO)+

Increasing V

4.1

4.6

UVLO Hysteresis

T(UVLO)hys

0.1

0.6

Logic Supply Current

CC(ON)

Both bridges ON (forward or reverse)

CC(OFF)

All INPUTs

= 2.4 V

9.0

CC(BRAKE)

All INPUTs

= 0.8 V

3968

DUAL FULL-BRIDGE

PWM MOTOR DRIVER

WITH BRAKE

Internal PWM Current Control. The A3968SA and
A3968SLB dual H-bridges are designed to bidirectionally
control two dc motors. An internal fixed-frequency PWM
current-control circuit controls the load current in each
motor. The current-control circuitry works as follows:
when the outputs of the H-bridge are turned on, current
increases in the motor winding. The load current is sensed
by the current-control comparator via an external sense
resistor (R

). Load current continues to increase until it

reaches the predetermined value, set by the selection of
external current-sensing resistors and reference input
voltage (V

REF

) according to the equation:

TRIP

= I

OUT

+ I

= V

REF

/(4 R

)

where I

is the sense-current error (typically 18 mA) due

to the base-drive current of the sink driver transistor.

At the trip point, the comparator resets the source-

enable latch, turning off the source driver of that H-bridge.
The source turn off of one H-bridge is independent of the
other H-bridge. Load inductance causes the current to
recirculate through the sink driver and ground-clamp
diode. The current decreases until the internal clock
oscillator sets the source-enable latches of both H-bridges,
turning on the source drivers of both bridges. Load current
increases again, and the cycle is repeated.

The frequency of the internal clock oscillator is set by

FUNCTIONAL DESCRIPTION

the external timing components R

. The frequency can

be approximately calculated as:

osc

= 1/(R

+ t

blank

)

where t

blank

is defined below.

The range of recommended values for R

and C

are

20 k

to 100 k

and 470 pF to 1000 pF respectively.

Nominal values of 56 k

and 680 pF result in a clock

frequency of 25.4 kHz.

Current-Sense Comparator Blanking. When the
source driver is turned on, a current spike occurs due to
the reverse-recovery currents of the clamp diodes and
switching transients related to distributed capacitance in
the load. To prevent this current spike from erroneously
resetting the source enable latch, the current-control
comparator output is blanked for a short period of time
when the source driver is turned on. The blanking time is
set by the timing component C

according to the equa-

tion:

blank

= 1900 C

(

s).

A nominal C

value of 680 pF will give a blanking

time of 1.3

The current-control comparator is also blanked when

the load current changes polarity (direction or phase
change). This internally generated blank time is approxi-
mately 1.8

Dwg. EP-006-16

R S

BRIDGE ON

SOURCE OFF

ALL OFF

Dwg. WM-003-3

OUTB

TRIP

blank

INTERNAL

OSCILLATOR

BRIDGE

SOURCE
OFF

BRIDGE

R C

T T

ALL

OFF

INPUT

"FORWARD"

"REVERSE"

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: A3968SLB

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: A3968SLB