Data Sheet
26184.26A
A3980
Automotive DMOS Microstepping Driver with Translator
The A3980 is a complete microstepping motor driver with built-in
translator for easy operation. It is designed to operate bipolar stepper
motors in full-, half-, eighth-, and sixteenth-step modes, at up to 35 V
and 1 A. The A3980 includes a fi xed off-time current regulator which
has the ability to operate in slow, fast, or mixed decay modes. This
results in reduced audible motor noise, increased step accuracy, and
reduced power dissipation.
The translator is the key to the easy implementation of the A3980.
Simply inputting one pulse on the step input drives the motor one
microstep. There are no phase sequence tables, high frequency control
lines, or complex interfaces to program. The A3980 interface is an ideal
fi t for applications where a complex P is unavailable or overburdened.
Internal synchronous rectifi cation control circuitry is provided to
improve power dissipation during PWM operation.
Internal circuit protection includes: thermal shutdown with hysteresis,
overvoltage lockout (OVLO), undervoltage lockout (UVLO), and
crossover current protection. Special power-up sequencing is not
required. In addition, two diagnostic fault fl ags provide indication of
shorts or opens on the motor windings.
The A3980 is supplied in a low-profi le (1.1 mm) 28L TSSOP with
exposed thermal pad (part number suffi x LP).
Typical application up to 1 A, 35 V output rating
Low R
DS(ON)
outputs, 0.67
source, 0.54 sink typical
Automatic current decay mode detection/selection
3.0 V to 5.5 V logic supply voltage range
Mixed, fast, and slow current decay modes
Synchronous rectifi cation for low power dissipation
Internal OVLO, UVLO, and thermal shutdown circuitry
Crossover current protection
Short to supply/ground and short/open load diagnostics
Use the following complete part number when ordering:
AB SO LUTE MAX I MUM RAT INGS
Part Number
Package
Description
A3980KLP
28-pin, TSSOP
Exposed thermal pad
Load Supply Voltage, 500 ms,V
BB
.....................50 V
Logic Supply Voltage, V
DD
................................7.0 V
Logic Input Voltage
V
IN
................................. 0.3 V to V
DD
+ 0.3 V
(t
W
< 30 ns) ....................... 1.0 V to V
DD
+ 1 V
Sense Voltage, V
SENSE
.......................................0.5 V
Reference Voltage, V
REF
...................... 0 V to V
DD
Package Power Dissipation (T
A
= +25C), P
D
"High-K"
PCB
1
..............................R
JA
28C/W
Typical
PCB
2
..................................R
JA
38C/W
Operating Temperature Range
Junction Temperature, T
J
...........40C to +150C
Storage Temperature, T
S
..........55C to +150C
1
Measured on a JEDEC-standard "High-K" 4-layer PCB.
2
Measured on a typical two-sided PCB with 3 in.
2
copper
ground area.
Package LP
FEATURES
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Transl
at
or
&
C
ontrol
Logi
c
PWM
Ti
mer
Reg
Ch
a
r
g
e
Pu
m
p
8
VDD
VBB1
VBB2
SENSE1
SR
DIR
OUT1A
PFD
RC1
AGND
REF
RC2
VDD
OUT2A
MS2
MS1
SENSE2
VBB1
SLEEP
ENABLE
OUT1B
CP2
CP1
VCP
PGND
VREG
STEP
OUT2B
FF2
FF1
VBB2
APPLICATIONS
Automotive stepper motors
Engine management
Headlamp positioning
Approximate Scale 1:1
3
Worcester, Massachusetts 01615-0036 (508) 853-5000
115 Northeast Cutoff, Box 15036
www.allegromicro.com
Data Sheet
26184.26A
A3980
Automotive DMOS Microstepping Driver with Translator
ELECTRICAL CHARACTERISTICS
at T
J
= 40C to +150C, V
BB
= 14 V, V
DD
= 3.0 to 5.5 V (unless otherwise noted)
Characteristics
Symbol
Test Conditions
Min.
Typ.
1
Max.
Units
Output Drivers
Load Supply Voltage Range
V
BB
Driving
Operating
Sleep mode
8
7
0
V
OVB
50
35
V
Output Leakage Current
2
I
DSS
V
OUT
= V
BB
V
OUT
= 0 V
< 1.0
< 1.0
20
20
A
Output-On Resistance
R
DSON
Source driver, I
OUT
= 1 A, T
A
< 25C
Sink driver, I
OUT
= 1 A, T
A
< 25C
0.51
0.45
0.86
0.65
Source driver, I
OUT
= 1 A, T
A
< 125C
Sink driver, I
OUT
= 1 A, T
A
< 125C
0.87
0.72
1.06
0.83
Body Diode Forward Voltage
V
F
Source diode, I
F
= 1 A
Sink diode, I
F
= 1 A
1.4
1.4
V
Motor Supply Current
I
BB
f
PWM
< 50 kHz
Operating, outputs disabled
Sleep mode
8
6
20
mA
mA
A
Logic Supply Current
I
DD
f
PWM
< 50 kHz
Outputs off
Sleep mode
12
10
20
mA
mA
A
Logic Interface
Logic Supply Voltage Range
V
DD
Operating
3.0
5.0
5.5
V
Input Low Voltage
V
IL
0.3 V
DD
V
Input High Voltage
V
IH
0.7 V
DD
V
Input Hysteresis
V
IHYS
200
300
500
mV
Input Current
2
I
IN
20
< 1
20
A
Output Low Voltage
V
OL
I
O
= 3 mA
0.4
V
Output High Voltage
V
OH
I
O
= 200 A
2.8
V
STEP Pin Low
t
STPL
1
s
STEP Pin High
t
STPH
1
s
Setup Time for Input Change to STEP
t
SU
MS1, MS2, DIR
200
ns
Hold Time for Input Change from STEP
t
H
MS1, MS2, DIR
200
ns
Wake-Up Time from SLEEP
t
EN
1
ms
Continued on next page
4
Worcester, Massachusetts 01615-0036 (508) 853-5000
115 Northeast Cutoff, Box 15036
www.allegromicro.com
Data Sheet
26184.26A
A3980
Automotive DMOS Microstepping Driver with Translator
Characteristics
Symbol
Test Conditions
Min.
Typ.
1
Max.
Units
Current Control
Blank Time
t
BLANK
R
T
= 56 K , C
T
= 680 pF
700
950
1200
ns
Fixed Off Time
T
OFF
R
T
= 56 K , C
T
= 680 pF
30
38
46
s
Mixed Decay Trip Points
PFD
H
PFD
L
0.60 V
DD
0.21 V
DD
V
Crossover Dead Time
t
DT
100
475
800
ns
Recommended Reference Input Voltage
V
REF
0.8
4
V
Reference Input Current
2
I
REF
3
0
3
A
Current Trip-Level Error
3
err
I
V
REF
= 4 V, %I
TripMAX
= 38%
V
REF
= 4 V, %I
TripMAX
= 70%
V
REF
= 4 V, %I
TripMAX
= 100%
15
10
5
%
Thermal Protection
Thermal Shutdown
T
SD
160
170
180
C
Thermal Shutdown Hysteresis
T
SDH
15
C
Diagnostics
Max V
DS
on High-Side Bridge FETs
V
DSHT
Sampled after t
BLANK
+ t
SCT
1.5
V
Max V
DS
on Low-Side Bridge FETs
V
DSLT
Sampled after t
BLANK
+ t
SCT
1.5
V
V
DS
Fault Measurement Delay
t
SCT
700
ns
Minimum Load Current
I
OC
w.r.t. I
TRIPMAX
at Home position
35
%
V
BB
Overvoltage Lockout
V
OVB
V
BB
rising
32
34
36
V
V
BB
Overvoltage Lockout Hysteresis
V
OVBH
2
4
V
V
REG
Undervoltage Lockout
V
UVR
V
REG
falling
5.3
5.7
6.0
V
V
DD
Enable Threshold
V
UVD
V
DD
rising
2.45
2.7
2.95
V
V
DD
Enable Threshold Hysteresis
V
UVDH
50
100
mV
ELECTRICAL CHARACTERISTICS
(continued) at T
J
= 40C to +150C, V
BB
= 14 V, V
DD
= 3.0 to 5.5 V (unless otherwise noted)
1
Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary
for individual units, within the specifi ed maximum and minimum limits.
2
Negative current is defi ned as coming out of (sourcing from) the specifi ed device pin.
3
err
I
= (I
Trip
I
Prog
) / I
Prog
, where I
Prog
= %I
TripMAX
I
TripMAX
.
5
Worcester, Massachusetts 01615-0036 (508) 853-5000
115 Northeast Cutoff, Box 15036
www.allegromicro.com
Data Sheet
26184.26A
A3980
Automotive DMOS Microstepping Driver with Translator
Logic Interface Timing Diagram
STEP
t
STPL
t
STPH
t
H
t
SU
SLEEP
t
EN
MS1, MS2,
or DIR
MS1 MS2
Microstep Resolution
L
L
Full Step
H
L
Half Step
L
H
Eighth Step
H
H
Sixteenth Step
Table 1. Microstep Resolution Truth Table
FF1
FF2
Fault
L
L
UVLO, OVLO, Overtemperature,
Open Load, or Shorted Load
H
L
Short to Ground
L
H
Short to Supply
H
H
None
Table 2. Fault Report by Fault Flags
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