ChipFind - документация

Электронный компонент: P1707A-08TR

Скачать:  PDF   ZIP
October 2003
P1707A

rev 1.0
Alliance Semiconductor
2575, Augustine Drive
Santa Clara, CA
Tel: 408.855.4900
Fax: 408.855.4999
www.alsc.com
Notice: The information in this document is subject to change without notice.
Notebook LCD Panel EMI Reduction IC
Features
FCC approved method of EMI attenuation.
Generates a low EMI spread spectrum clock of the
input frequency.
Optimized for frequency range from 60 to 175MHz.
Internal loop filter minimizes external components
and board space.
Four selectable spread ranges.
Low inherent cycle-to-cycle jitter.
3.3V operating voltage range.
TTL or CMOS compatible inputs and outputs.
Ultra-low power CMOS design.
14.85 mA @3.3V, 140MHz
16.69mA @3.3V, 162MHz
17.78 mA @3.3V, 175MHz
Supports notebook VGA and other LCD timing
controller applications.
Pinout compatible to ICS MK1707 and Cypress
CY25561/CY25560.
SSON/SBM pin for Spread Spectrum On/Off
and Standby Mode controls.
Available in 8-pin SOIC and TSSOP.
Product Description
The P1707A is a versatile spread spectrum frequency
modulator designed specifically for input clock frequencies.
The P1707A reduces electromagnetic interference (EMI) at
the clock source, allowing system wide reduction of EMI of
down stream clock and data dependent signals. The
P1707A allows significant system cost savings by reducing
the number of circuit board layers ferrite beads, shielding
and other passive components that are traditionally
required to pass EMI regulations.

The P1707A modulates the output of a single PLL in order
to "spread" the bandwidth of a synthesized clock, and more
importantly, decreases the peak amplitudes of its
harmonics. This results in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal's bandwidth is called `spread
spectrum clock generation'.
The P1707A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.

Applications
The P1707A is targeted towards notebook LCD displays,
and other displays using an LVDS interface, PC peripheral
devices, and embedded systems.



Block Diagram
VSS
CLKIN
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
PLL
VDD
SSON
SR0 SR1
October 2003
P1707A

rev 1.0
Notebook LCD Panel EMI Reduction IC
2 of 10
Notice: The information in this document is subject to change without notice.
SSON/SBM
1
2
3
4
5
6
7
8
P1707A
CLKIN
VDD
VSS
ModOUT
SR1
SR0
NC


Pin Configuration














Pin Description



Pin#
Pin Name
Type
Description
1 CLKIN I
Connect to externally generated clock signal. To put the part into standby
mode, disable the input clock signal to this pin and pull SSON/SBM (pin 5)
low.
Refer Standby Mode Selection Table.
2
VDD
P
Connect to +3.3V.
3
VSS
P
Ground Connection. Connect to system ground.
4
ModOUT
O
Spread spectrum clock output.
5 SSON/SBM I
Spread Spectrum On/Off and standby mode control.
Refer Standby Mode
Selection Table.
This pin has an internal pull-up resistor.
6 SR1 I
Digital logic input used to select Spreading Range.
Refer Spread Spectrum
Selection Table.
This pin has an internal pull-up resistor.
7 SR0 I
Digital logic input used to select Spreading Range.
Refer Spread Spectrum
Selection Table.
This pin has an internal pull-up resistor.
8 NC -
No
connect.


October 2003
P1707A

rev 1.0
Notebook LCD Panel EMI Reduction IC
3 of 10
Notice: The information in this document is subject to change without notice.

Standby Mode Selection
CLKIN
SSON/SBM
Spread
Spectrum
ModOUT
PLL
Mode
Disabled 0 N/A Disabled
Disabled
Standby
Disabled
1
N/A
Disabled
Free Running
Free Running
Enabled 0
Off
Reference
Disabled
Buffer
out
Enabled 1
On Normal Normal Normal



Spread Range Selection
SR1
SR0
Spreading Range
Modulation Rate
0 0
1.50%
(F
IN
/80) * 34.72 KHz
0 1
2.50%
(F
IN
/80) * 34.72 KHz
1 0
0.50%
(F
IN
/80) * 34.72 KHz
1 1
1.00%
(F
IN
/80) * 34.72 KHz
October 2003
P1707A

rev 1.0
Notebook LCD Panel EMI Reduction IC
4 of 10
Notice: The information in this document is subject to change without notice.



Schematic for Notebook VGA Application

































Note: To set the P1707A to standby mode, disable the input clock (pin 1 CLKIN) and pull SSON (pin 5) low.
Refer Standby Mode Selection
Table.
Pin 8 can be tied either high or low,
or it can be left unconnected.
Tie SR0 and SR1 high/low
according to spread range desired.
External resistors are not needed to
pull these pins high.
Pin 5 SSON should be left unconnected to turn on
spread spectrum. Pull this pin low to turn spread
spectrum OFF and enable stand-by mode.
60MHz to 175MHz pixel clock input
from VGA chip
FB
VDD
0.1F
1
2
4
3
8
7
5
6
CLKIN
VDD
VSS
ModOUT
SSON
SR1
SR0
NC
P1707A
October 2003
P1707A

rev 1.0
Notebook LCD Panel EMI Reduction IC
5 of 10
Notice: The information in this document is subject to change without notice.
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
V
DD
, V
IN
Voltage on any pin with respect to GND
-0.5 to + 7.0
V
T
STG
Storage
temperature
-65 to +125
C
T
A
Operating
temperature
0 to 70
C
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.




DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
V
IL
Input low voltage
GND 0.3
-
0.8
V
V
IH
Input high voltage
2.0
-
V
DD
+ 0.3
V
I
IL
Input low current (pull-up resistors on inputs SR0, SR1
and SSON/SBM)
- -
-35
A
I
IH
Input high current
-
-
35
A
I
XOL
X
OUT
output low current @ 0.4V, V
DD
= 3.3V
-
3
-
mA
I
XOH
X
OUT
output high current @ 2.5V, V
DD
= 3.3V
-
3
-
mA
V
OL
Output low voltage V
DD
= 3.3V, I
OL
= 20mA
-
-
0.4
V
V
OH
Output high voltage V
DD
= 3.3V, I
OH
= 20mA
2.5
-
-
V
I
CC
Dynamic supply current normal mode
3.3V and 10pF loading
8.46 12
17.78
mA
I
DD
Static supply current standby mode
-
0.6
-
mA
V
DD
Operating
voltage
2.7 3.3 3.7 V
t
ON
Power up time (first locked clock cycle after power up)
-
0.18
-
mS
Z
OUT
Clock output impedance
-
50
-