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Электронный компонент: P2084A

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P2082A
October 2003
P2084A

rev 0.4
Alliance Semiconductor
2575, Augustine Drive
Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com
Notice: The information in this document is subject to change without notice.
Low Cost Frequency Multiplier

Features
Generates 2X and 4X clocks of the input clock
frequency
Input clock frequency range from 3 MHz to 78 MHz
Provides up to:
P2082A: 156 MHz output clock frequency
P2084A: 312 MHz output clock frequency
External loop filter
Low cycle-to-cycle jitter
3.3 V operating voltage range
10 mA output drives
TTL or CMOS compatible outputs
Ultra-low power CMOS design
Available in industrial temperature range
(-25C to +85C)
Available in 8-pin SOIC and TSSOP

Product Description
The P2082A and P2084A are versatile frequency
multipliers that are designed specifically as cost effective
alternatives to the high precision frequency oscillator.
The P2082A/84A can generate a 2X and 4X output clock
respectively of the input frequency which allows system
cost savings by using an inexpensive crystal or resonator
to achieve high frequency multiplication.
The P2082A/84A provides up to 156 MHz and 312 MHz
output clock frequencies respectively through the use of the
Phase-Lock-Loop (PLL) technique which delivers low jitter
and high precision synthesized clocks.
Applications
The P2082A/84A is targeted towards the high frequency
CAN OSC replacement market. Applications include xDSL,
routers, networking, PC peripherals, and embedded
systems.


Block Diagram
P2082A
October 2003
P2084A

rev 0.4
Low Cost Frequency Multiplier
2 of 9
Notice: The information in this document is subject to change without notice.

Pin Configuration


Pin Description

Pin#
Pin Name
Type
Description
1
XIN/CLKIN
I
Connect to crystal or clock input.
2
XOUT
I
Crystal output.
3
FS1
I
Digital logic input used to select input frequency range. (See Input
Frequency Selection.) This pin has an internal pull-up resistor.
4
LF
I
External loop filter for the PLL. (See Loop Filter Selection Table for value.)
5
VSS
P
Ground connection. Connect to system ground.
6
CLKOUT
O
Clock output.
7
FS0
I
Digital logic input used to select input frequency range. (See Input
Frequency Selection.) This pin has an internal pull-up resistor.
8
VDD
P
Connect to +3.3 V.

Input Frequency Selection
Output Frequency Scaling
FS1
FS0
Input (MHz)
P2082A
P2084A
0
0
3 to 9
6 to 18
12 to 36
0
1
10 to 19
20 to 38
40 to 76
1
0
20 to 38
40 to 76
80 to 152
1
1
39 to 78
78 to 156
156 to 312
P2082A
October 2003
P2084A

rev 0.4
Low Cost Frequency Multiplier
3 of 9
Notice: The information in this document is subject to change without notice.

Loop Filter Selection Table VDD 3.3 V

Input (MHz)
FS1
FS0
C1(pF)
C2(pF)
R1 (ohms)
3 0 0
270
330,000 220
4 0 0
270
100,000 270
5 0 0
270
100,000 390
6 0 0
270
100,000 510
7 0 0
270
100,000 620
8 0 0
270
100,000 820
9 0 0
270
100,000 1,000
10 0 1 270
100,000 330
11 0 1 270
100,000 390
12 0 1 270
100,000 510
13 0 1 270
100,000 560
14 0 1 270
100,000 620
15 0 1 270
100,000 750
16 0 1 270
100,000 820
17 0 1 270
100,000 910
18 0 1 270
100,000 1,000
19 0 1 270
100,000 1,200
20 1 0
270
100,000 330
21 - 22
1
0
270
100,000 390
23 - 24
1
0
270
100,000 510
25 - 26
1
0
270
100,000 560
27 - 28
1
0
270
100,000 620
29 - 30
1
0
270
100,000 750
31 - 32
1
0
270
100,000 820
33 - 34
1
0
270
100,000 910
35 - 36
1
0
270
100,000 1,000
37 - 38
1
0
270
100,000 1,200
39 - 42
1
1
270
100,000 330
43 - 46
1
1
270
100,000 390
47 - 50
1
1
270
100,000 510
51 - 54
1
1
270
100,000 560
55 - 58
1
1
270
100,000 620
59 - 62
1
1
270
100,000 750
63 - 66
1
1
270
100,000 820
67 - 70
1
1
270
100,000 910
71 - 74
1
1
270
100,000 1,000
75 - 78
1
1
270
100,000 1,200
P2082A
October 2003
P2084A

rev 0.4
Low Cost Frequency Multiplier
4 of 9
Notice: The information in this document is subject to change without notice.
Output Clock Selection Example

The P2084A can generate 4X from the input reference frequency. P2084A's internal crystal oscillator circuits
allow the use of an inexpensive crystal of resonator to replace expensive can oscillators that are used in
networking, PC peripherals, xDSL, and consumer applications for high frequency generation. Its input frequency
range is optimized for operation from 3 MHz to 78 MHz, and its output frequency can deliver up to 312 MHz.
P2082A
October 2003
P2084A

rev 0.4
Low Cost Frequency Multiplier
5 of 9
Notice: The information in this document is subject to change without notice.

Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
V
DD
, V
IN
Voltage on any pin with respect to GND
-0.5 to + 7.0
V
T
STG
Storage
temperature
-65 to +125
C
T
A
Operating
temperature
0 to 70
C


DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
V
IL
Input low voltage
GND - 0.3
0.8
V
V
IH
Input high voltage
2.0
V
DD
+
0.3
V
I
IL
Input low current (internal input pull-up resistor on FS0
and FS1)
60
A
I
IH
Input high current (internal input pull-up resistor on FS0
and FS1)
0
A
I
XOL
XOUT output low current
10
mA
I
XOH
XOUT output high current
10
mA
V
OL
Output low voltage (V
DD
= 3.3 V, I
OL
= 20 mA)
0.4
V
V
OH
Output high voltage (V
DD
= 3.3 V, I
OH
= 20 mA)
2.5
V
I
DD
Static supply current
3
mA
I
CC
Typical dynamic supply current (25 pF scope probe
loading)
5.2 at 3
MHz
21.2 at
82 MHz
mA
V
DD
Operating voltage
3.0
3.3
3.6
V
t
ON
Power-up time (C
LOOP
= 0.1 F at 16 MHz, first locked
cycle after power up)
7
mS
Z
OUT
Clock output impedance (at 16 MHz)
28


AC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
f
IN
Input frequency
3
78
MHz
P2082A
6
156
MHz
f
OUT
P2084A
12
312
MHz
t
LH
1
Output rise time (measured at 0.8 V to 2.0 V)
1
ns
t
HL
1
Output fall time (measured at 2.0 V to 0.8 V)
1
ns
t
JC
Jitter (cycle to cycle)
200
ps
t
D
Output duty cycle
45
50
55
%
1 t
LH
and t
HL
are measured into a capacitive load of 15 pF