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Электронный компонент: P2681A

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October 2003
P2681A

rev D
Alliance Semiconductor
2575, Augustine Drive
Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com
Notice: The information in this document is subject to change without notice.
General Purpose EMI Reduction IC

Features
FCC approved method of EMI attenuation
Provides up to 15 dB of EMI suppression
Generates
a
1 X or X low EMI spread
spectrum clock of the input frequency
Output frequency from 6MHz to 20MHz
Digital spread selections
Spreading ranges from +/-0.4% to +/-5.0%
Ultra low cycle-to-cycle jitter
Zero-cycle slip
3.3V and 5.0V operating voltage range
10 mA output drives
TTL or CMOS compatible outputs
Ultra-low power CMOS design
Available in 8 pin SOIC and TSSOP

Product Description
The P2681A is a versatile spread spectrum
frequency modulator designed specifically for digital
camera and other digital video and imaging
applications. The P2681A reduces electromagnetic
interference (EMI) at the clock source, which
provides system wide reduction of EMI of all clock
dependent signals. The P2681A allows significant
system cost savings by reducing the number of circuit
board layers and shielding that are traditionally
required to pass EMI regulations.
The P2681A uses the most efficient and optimized
modulation profile approved by the FCC.
The P2681A modulates the output of a single PLL in
order to "spread" the bandwidth of a synthesized
clock and, more importantly, decreases the peak
amplitudes of its harmonics. This results in
significantly lower system EMI compared to the
typical narrow band signal produced by oscillators
and most frequency generators. Lowering EMI by
increasing a signal's bandwidth is called "spread
spectrum clock generation".
Applications
The P2681A is targeted towards MFP, xDSL, fax
modem, set-top box, USB controller, DSC, and
embedded systems.

Block Diagram
October 2003
P2681A

rev D
General Purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.


Pin Configuration

Pin Description

Pin#
Pin Name
Type
Description
1
XIN/CLKIN
I
Connect to crystal or clock input.
2 XOUT I
Crystal
output
3 DIV2 I
Digital logic input used to select normal output mode or divide-by-2 output
mode. When this pin is Low, the frequency of the output clock is the same
as the input clock frequency. When it is tied High, the output frequency is
half the input clock frequency. This pin has an internal pull-low resistor.
4 LF I
External Loop Filter for the PLL. By changing the value of the CRC circuit,
the % spread can be adjusted accordingly. See Table 1.2 for detail value.
5
VSS
I
Ground Connection. Connect to system ground.
6
ModOUT
O
Spread Spectrum Clock Output.
7 SR0 I
Digital logic input used to select Spreading Range between large or small
for a given LF value (see Table 1.1 and 1.2). When SR0=0, the spreading %
is smaller than SR0=1. This pin has an internal pull-up resistor.
8
VDD
P
Connect to +3.3V or 5.0V



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P2681A

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General Purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.

Table 1 - Modulation Output and Spreading Selection VDD @ 3.3V
Xin
6 MHz
8 MHz
10 MHz
12 MHz
16 MHz
DIV=0
ModOut
6 MHz
8 MHz
10 MHz
12 MHz
16 MHz
Modulation
Rate
0
TBD TBD
+/-0.75% +/-0.75% +/-0.75% ModOut/256
SR0
1
TBD TBD
+/-1.30% +/-1.30% +/-1.30% ModOut/256
Loop filter value*
TBD TBD
C1=1,000 pF
C2=10,000 pF
R1=1K
C1=1,000 pF
C2=10,000 pF
R1=1.5K
C1=390 pF
C2=3,900 pF
R1=2.2K

Xin
6 MHz
8 MHz
10 MHz
12 MHz
16 MHz
DIV=0
ModOut
3 MHz
4 MHz
5 MHz
6 MHz
8 MHz
Modulation
Rate
0
TBD TBD
+/-0.75%
+/-0.75%
+/-0.75%
ModOut/128
SR0
1
TBD TBD
+/-1.30%
+/-1.30%
+/-1.30%
ModOut/128
Loop filter value*
TBD TBD
C1=1,000 pF
C2=10,000 pF
R1=1K
C1=1,000 pF
C2=10,000 pF
R1=1.5K
C1=390 pF
C2=3,900 pF
R1=2.2K
*For additional spread % selection please refer to Loop Filter Selection Table

Table 2 - Loop Filter Selection Table VDD @ 3.3V
Please contact Alliance Semiconductor for more information
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P2681A

rev D
General Purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.

Spread Spectrum Selection
The P2681A performs Zero Cycle Slip when sets at low % spreading. This allows no occurrence of system
timing error. The optimal setting should minimize system EMI to the fullest without affecting system
performance. The spreading is described as a percentage deviation of the center frequency (Note: the center
frequency is the frequency of the external reference input on CLKIN, Pin 1).
Example: The P2681A is designed for PC peripheral applications. It is not only optimized for operation between
6MHz 16MHz range, but its output frequency can be extended down to one half of the input clock frequency
using the Divide-by-Two feature. This feature extends low frequency operation to as low as 3MHz. Setting Pin 3
high (DIV2=1; Divide-by-Two mode) sets the output frequency (ModOUT) to half the frequency of the input clock
(CLKIN). This is a simple way to generate a spread spectrum modulated low frequency clock when only a
higher frequency signal is available. If you want the output frequency to be the same as the input, you need to
set DIV2=0.
The P2681A's spread % selection is determined by the external LF value specified in Table 2. Table 1 provides
a particular LF value which allows the % spreading to be selected between +/-0.75% or +/-1.30% by setting SR0
to either 0 and 1. At a specified LF value (See Table 2), SR0 pin allows the user to have the flexibility to digitally
select between large or small % spreading by setting SR0=1 or SR0=0 respectively.

P2681A Application Schematic
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P2681A

rev D
General Purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.

EMC Software Simulation
By using Alliance Semiconductor's proprietary EMC simulation software EMI-lator, radiated system level EMI
analysis can be made easier to allow a quantitative assessment on Alliance's EMI reduction products. The
simulation engine of this EMC software has already been characterized to correlate with the electrical
characteristics of Alliance EMI reduction IC's. The figure below is an example of the simulation result. Please
visit our web site at
www.alsc.com
for information on how to obtain a free copy and demonstration of EMI-lator.

Simulation Result from EMI-lator