ChipFind - документация

Электронный компонент: S3053

Скачать:  PDF   ZIP
1
S3054
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
April 10, 2001 / Revision D
S3054
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
FEATURES
Supports 2.5 Gbit/sec Data Rates
Fully differential for minimum
jitter accumulation
High speed 50
source terminated outputs
0.83 W Typical power dissipation
3.3 V power supply
52 Pin TQFP/TEP
GENERAL DESCRIPTION
The S3054 is a high performance 2 x 2 crosspoint
switch. It is designed to minimize jitter accumulation
by providing a high bandwidth fully differential signal
path. A 2 x 2 crosspoint can be used to switch OC-
48 data signals in Dense Wavelength Division Multi-
plexer designs and other high speed serial switch
designs.
The 2 x 2 crosspoint is designed using two 2:1 multi-
plexers. It can be used to fan out and/or multiplex
OUTB0P
OUTB0N
INB0P
1
0
INB1P
INB1N
1
0
OUTB1P
OUTB1N
SELB0
SELB1
OUTA0P
OUTA0N
INA0P
1
0
INA1P
1
0
OUTA1P
OUTA1N
SELA0
SELA1
INA0N
INA1N
INB0N
Figure 1. S3054 Block Diagram
0
B
/
0
A
L
E
S
1
B
/
1
A
L
E
S
0
B
/
0
A
T
U
O
1
B
/
1
A
T
U
O
0
0
0
B
/
0
A
N
I
0
B
/
0
A
N
I
0
1
0
B
/
0
A
N
I
1
B
/
1
A
N
I
1
0
1
B
/
1
A
N
I
0
B
/
0
A
N
I
1
1
1
B
/
1
A
N
I
1
B
/
1
A
N
I
Table 1. Truth Table
DEVICE
SPECIFICATION
high speed data signals. The S3054 is compatible
with the AMCC OC-48 clock recovery, MUX/DEMUX
and Crosspoint Switch products. This allows signal
integrity to be maintained throughout the system de-
sign.
Table 1 is a truth table detailing the control of flow
through the S3054. The primary AC parameter of im-
portance is the deterministic jitter or data eye degra-
dation inserted by the crosspoint. The design
minimizes jitter accumulation by using high band-
width, low skew fully differential circuits. This provides
for symmetric rise and fall delays as well as noise
rejection.
2
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
S3054
April 10, 2001 / Revision D
Figure 2. Timing Waveforms
Figure 3. Differential Voltage
INA0,1
INB0,1
OUTA0,1
OUTB0,1
T
1
V SINGLE
Single-ended
swing
V DIFF
2X Single-ended
swing
=
Programable Swing Control
An external resistor can be connected across adjacent pins, VSWx to VEEx, where x is A0, A1, B0 and B1. This
will result in a decreased Vswing for the specified output and a decrease in chip power dissipation. For example,
if a 700 Ohm resistor is used, the Vswing will decrease from its full scale swing of approximately 570mV to
250mV and that specific output will draw approximately 13mA less. All four outputs can be independently set. If
no external resistor is used, the output swing will default to its full scale value.
The 700 Ohm value is only used as an example. The power conscious user could use as small a resistor value
as the application can handle.
3
S3054
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
April 10, 2001 / Revision D
e
m
a
N
n
i
P
l
e
v
e
L
O
/
I
#
n
i
P
n
o
i
t
p
i
r
c
s
e
D
P
0
A
N
I
N
0
A
N
I
.
f
f
i
D
L
C
E
P
V
L
I
2
4
1
4
.
t
r
o
p
C
B
P
m
a
e
r
t
s
n
w
o
d
e
h
t
m
o
r
f
t
u
p
n
i
l
a
i
t
n
e
r
e
f
f
i
D
P
1
A
N
I
N
1
A
N
I
.
f
f
i
D
L
C
E
P
V
L
I
0
5
1
5
.
e
v
i
r
d
k
s
i
d
l
a
c
o
l
e
h
t
m
o
r
f
t
u
p
n
i
l
a
i
r
e
S
P
0
B
N
I
N
0
B
N
I
.
f
f
i
D
L
C
E
P
V
L
I
7
3
8
3
.
t
r
o
p
C
B
P
m
a
e
r
t
s
n
w
o
d
e
h
t
m
o
r
f
t
u
p
n
i
l
a
i
t
n
e
r
e
f
f
i
D
P
1
B
N
I
N
1
B
N
I
.
f
f
i
D
L
C
E
P
V
L
I
9
2
8
2
.
e
v
i
r
d
k
s
i
d
l
a
c
o
l
e
h
t
m
o
r
f
t
u
p
n
i
l
a
i
r
e
S
0
A
L
E
S
L
T
T
V
L
I
3
4
.
N
/
P
0
A
N
I
s
t
c
e
l
e
s
l
e
v
e
l
w
o
L
A
1
A
L
E
S
L
T
T
V
L
I
9
4
.
N
/
P
1
A
N
I
s
t
c
e
l
e
s
l
e
v
e
l
h
g
i
H
A
0
B
L
E
S
L
T
T
V
L
I
6
3
.
N
/
P
0
B
N
I
s
t
c
e
l
e
s
l
e
v
e
l
w
o
L
A
1
B
L
E
S
L
T
T
V
L
I
0
3
.
N
/
P
1
B
N
I
s
t
c
e
l
e
s
l
e
v
e
l
h
g
i
H
A
P
0
A
T
U
O
N
0
A
T
U
O
.
f
f
i
D
L
M
C
O
3
2
2
2
.
t
u
p
t
u
o
l
a
i
r
e
s
0
A
l
e
n
n
a
h
C
P
1
A
T
U
O
N
1
A
T
U
O
.
f
f
i
D
L
M
C
O
7
1
8
1
.
t
u
p
t
u
o
l
a
i
r
e
s
1
A
l
e
n
n
a
h
C
P
0
B
T
U
O
N
0
B
T
U
O
.
f
f
i
D
L
M
C
O
4
5
.
t
u
p
t
u
o
l
a
i
r
e
s
0
B
l
e
n
n
a
h
C
P
1
B
T
U
O
N
1
B
T
U
O
.
f
f
i
D
L
M
C
O
0
1
9
.
t
u
p
t
u
o
l
a
i
r
e
s
1
B
l
e
n
n
a
h
C
C
C
V
9
1
,
8
,
6
2
3
,
1
2
,
0
2
6
4
,
5
4
,
4
3
7
4
.
l
a
n
i
m
o
N
V
3
.
3
,
y
l
p
p
u
S
r
e
w
o
P
Table 2. Pin Assignment and Descriptions
4
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
S3054
April 10, 2001 / Revision D
e
m
a
N
n
i
P
l
e
v
e
L
O
/
I
#
n
i
P
n
o
i
t
p
i
r
c
s
e
D
0
A
W
S
V
1
A
W
S
V
0
B
W
S
V
1
B
W
S
V
g
o
l
a
n
A
I
5
2
5
1
2
2
1
.
l
o
r
t
n
o
C
g
n
i
w
S
e
g
a
t
l
o
V
E
E
V
4
1
3
1
7
1
1
3
7
2
6
2
9
3
5
3
3
3
8
4
4
4
0
4
2
5
.
d
n
u
o
r
G
0
A
E
E
V
t
u
p
t
u
O
D
N
G
4
2
.
0
A
r
o
f
d
n
u
o
r
G
1
A
E
E
V
t
u
p
t
u
O
D
N
G
6
1
.
1
A
r
o
f
d
n
u
o
r
G
0
B
E
E
V
t
u
p
t
u
O
D
N
G
3
.
0
B
r
o
f
d
n
u
o
r
G
1
B
E
E
V
t
u
p
t
u
O
D
N
G
1
1
.
1
B
r
o
f
d
n
u
o
r
G
Table 2. Pin Assignment and Descriptions (Continued)
5
S3054
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
April 10, 2001 / Revision D
Figure 4. S3054 Pinout Package
1
2
3
4
5
7
9
11
39
38
37
36
34
32
30
28
TOP VIEW
35
33
31
29
27
15
14
16
17
18
19
20
21
22
23
25
24
26
51
52
50
49
48
47
46
45
44
43
41
42
40
12
8
10
6
VSWB0
VEEB0
OUTB0P
OUTB0N
OUTB1N
VEEB1
VSWB1
OUTB1P
13
INA1N
VEE
INA1P
SELA1
VEE
VCC
VCC
VCC
VEE
SELA0
INA0N
INA0P
VEE
VSWA1
VEE
VEEA1
OUTA1P
OUTA1N
VCC
VCC
VCC
OUTA0N
OUTA0P
VSWA0
VEEA0
VEE
VEE
INB0N
INB0P
SELB0
VCC
VCC
SELB1
INB1N
VEE
VEE
VEE
INB1P
VEE
VEE
VEE
VEE
VCC
VCC
S3054
52 Pin TQFP/TEP
6
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
S3054
April 10, 2001 / Revision D
Figure 5. S3054 52 Pin TQFP/TEP Package
Table 3. Thermal Management
e
c
i
v
e
D
r
e
w
o
P
r
i
A
l
l
i
t
S
a
j
r
i
A
l
l
i
t
S
c
j
4
5
0
3
S
W
1
.
1
W
/
C
6
.
5
4
W
/
C
2
.
4
7
S3054
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
April 10, 2001 / Revision D
r
e
t
e
m
a
r
a
P
n
o
i
t
p
i
r
c
s
e
D
n
i
M
p
y
T
x
a
M
s
t
i
n
U
s
n
o
i
t
i
d
n
o
C
T
R
,
0
T
U
O
(
.
e
m
i
t
ll
a
f
d
n
a
e
s
i
r
a
t
a
D
l
a
i
r
e
S
.
)
1
T
U
O
5
7
1
s
p
a
n
o
d
e
t
s
e
t
%
0
8
o
t
%
0
2
0
0
1
(
.
s
i
s
a
b
e
l
p
m
a
s
-
o
t
-
e
n
il
)
.
e
n
il
T
F
0
5
1
s
p
1
T
o
t
N
I
y
a
l
e
d
n
o
i
t
a
g
a
p
o
r
p
h
g
u
o
r
h
t
w
o
l
F
.
T
U
O
0
.
2
s
n
0
0
1
.
e
n
il
-
o
t
-
e
n
il
R
J
r
e
t
t
ij
m
o
d
n
a
R
2
4
s
p
D
J
r
e
t
t
ij
c
i
t
s
i
n
i
m
r
e
t
e
D
0
2
s
p
w
e
k
s
t
u
p
t
u
O
5
2
s
p
Table 4. AC Characteristics (Over recommended operating conditions.)
l
o
b
m
y
S
n
o
i
t
p
i
r
c
s
e
D
n
i
M
p
y
T
x
a
M
s
t
i
n
U
s
n
o
i
t
i
d
n
o
C
V
F
F
I
D
N
I
g
n
i
w
S
e
g
a
t
l
o
V
t
u
p
n
I
l
a
i
t
n
e
r
e
f
f
i
D
0
0
3
0
0
2
1
V
m
.
3
e
r
u
g
i
F
e
e
S
V
E
L
G
N
I
S
N
I
g
n
i
w
S
e
g
a
t
l
o
V
t
u
p
n
I
d
e
d
n
e
-
e
l
g
n
i
S
0
5
1
0
0
6
V
m
.
3
e
r
u
g
i
F
e
e
S
R
F
F
I
D
e
c
n
a
t
s
i
s
e
R
t
u
p
n
I
l
a
i
t
n
e
r
e
f
f
i
D
5
7
0
0
1
5
2
1
Table 5. Internally Biased LVPECL Input DC Characterisitics
Table 6. LVTTL Input DC Characteristics
Table 7. CML Output DC Characteristics
l
o
b
m
y
S
n
o
i
t
p
i
r
c
s
e
D
n
i
M
p
y
T
x
a
M
s
t
i
n
U
s
n
o
i
t
i
d
n
o
C
V
L
O
e
g
a
t
l
o
V
w
o
L
t
u
p
t
u
O
C
C
V
0
.
1
-
C
C
V
5
5
.
-
V
0
0
1
.
e
n
i
l
-
o
t
-
e
n
i
l
V
H
O
e
g
a
t
l
o
V
h
g
i
H
t
u
p
t
u
O
C
C
V
5
3
.
-
C
C
V
1
.
-
V
0
0
1
.
e
n
i
l
-
o
t
-
e
n
i
l
f
f
i
D
t
u
o
V
g
n
i
w
S
e
g
a
t
l
o
V
f
f
i
D
t
u
p
t
u
O
0
0
9
0
6
4
1
V
m
0
0
1
.
3
e
r
u
g
i
F
e
e
S
.
e
n
i
l
-
o
t
-
e
n
i
l
.
n
e
p
o
=
t
x
e
R
e
l
g
n
i
S
t
u
o
V
d
e
d
n
E
e
l
g
n
i
S
t
u
p
t
u
O
g
n
i
w
S
e
g
a
t
l
o
V
0
5
4
0
3
7
V
m
0
0
1
.
3
e
r
u
g
i
F
e
e
S
.
e
n
i
l
-
o
t
-
e
n
i
l
.
n
e
p
o
=
t
x
e
R
l
o
b
m
y
S
n
o
i
t
p
i
r
c
s
e
D
n
i
M
p
y
T
x
a
M
s
t
i
n
U
s
n
o
i
t
i
d
n
o
C
V
H
I
e
g
a
t
l
o
V
h
g
i
H
t
u
p
n
I
0
.
2
V
x
a
M
=
c
c
V
V
L
I
e
g
a
t
l
o
V
w
o
L
t
u
p
n
I
0
.
0
8
.
0
V
x
a
M
=
c
c
V
V
H
I
t
n
e
r
r
u
C
h
g
i
H
t
u
p
n
I
0
5
A
V
N
I
V
4
.
2
=
I
L
I
t
n
e
r
r
u
C
w
o
L
t
u
p
n
I
0
0
5
-
A
V
N
I
V
5
.
0
=
8
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
S3054
April 10, 2001 / Revision D
r
e
t
e
m
a
r
a
P
n
i
M
p
y
T
x
a
M
s
t
i
n
U
V
(
e
g
a
t
l
o
V
y
l
p
p
u
S
r
e
w
o
P
C
C
)
5
.
0
4
+
V
n
i
P
t
u
p
n
I
L
C
E
P
V
L
y
n
a
n
o
e
g
a
t
l
o
V
0
V
C
C
V
n
i
P
t
u
p
n
I
L
T
T
y
n
a
n
o
e
g
a
t
l
o
V
5
.
0
-
V
C
C
5
.
0
+
V
T
(
s
a
i
B
r
e
d
n
U
e
r
u
t
a
r
e
p
m
e
T
e
s
a
C
C
)
5
5
-
5
2
1
C
T
(
e
r
u
t
a
r
e
p
m
e
T
e
g
a
r
o
t
S
G
T
S
)
5
6
-
0
5
1
C
e
g
a
t
l
o
V
e
g
r
a
h
c
s
i
D
c
i
t
a
t
S
0
0
5
V
r
e
t
e
m
a
r
a
P
n
i
M
p
y
T
x
a
M
s
t
i
n
U
V
(
e
g
a
t
l
o
V
y
l
p
p
u
S
r
e
w
o
P
C
C
)
4
1
.
3
+
3
.
3
7
4
.
3
+
V
)
T
(
e
g
n
a
R
e
r
u
t
a
r
e
p
m
e
T
g
n
i
t
a
r
e
p
O
t
n
e
i
b
m
A
0
4
-
5
8
+
C
n
i
P
t
u
p
n
I
L
C
E
P
V
L
y
n
a
n
o
e
g
a
t
l
o
V
2
-
c
c
V
c
c
V
V
t
n
e
r
r
u
C
y
l
p
p
u
S
C
C
I
0
6
2
0
3
3
A
m
Table 8. Absolute Maximum Ratings
1
Table 9. Recommended Operating Conditions
1
1. CAUTION: Stresses listed under "Absolute Maximum Ratings" may be applied to devices one at a time
without causing permanent damage. Functionality at or above the values listed is not implied. Exposure
to these values for extended periods may affect device reliability.
1. AMCC guarantees the functional and parametric operation of the part under "Recommended Operating
Conditions" (except where specifically noted in the AC and DC Parametric tables).
9
S3054
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
April 10, 2001 / Revision D
Input Structures
Two input structures exist in this part; TTL and High Speed, Differential Inputs. The LVTTL Inputs will interface with
any LVTTL outputs. The High Speed, Differential Inputs can be AC Coupled. Therefore, the High Speed, differen-
tial Input buffers are biased at Vcc -0.5V. Refer to Figure 6 for High Speed Differential Input termination.
Figure 6. Input Termination
S3054
Biased at Vcc -0.5V
100
Figure 7. S3054 Output Termination
S3054
GND
VCC
VSWx
VEEx
Rext*
* Reduced Swing Amplitude
50
50
100
10
2.5 GBIT 2 X 2 DUAL CROSSPOINT SWITCH
S3054
April 10, 2001 / Revision D
AMCC is a registered trademark of Applied Micro Circuits Corporation.
Copyright 2001 Applied Micro Circuits Corporation
D432/R624
AMCC reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and
advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied
on is current.
AMCC does not assume any liability arising out of the application or use of any product or circuit described herein, neither does it
convey any license under its patent rights nor the rights of others.
AMCC reserves the right to ship devices of higher grade in place of those of lower grade.
AMCC SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR
USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.
Applied Micro Circuits Corporation 6290 Sequence Dr., San Diego, CA 92121
Phone: (619) 450-9333 (800) 755-2622 Fax: (619) 450-9885
http://www.amcc.com
C
E
R T I F I E
D
IS
O 9001
X
I
F
E
R
P
E
C
I
V
E
D
E
G
A
K
C
A
P
E
D
A
R
G
t
i
u
c
r
i
C
d
e
t
a
r
g
e
t
n
I
-
S
4
5
0
3
P
E
T
/
P
F
Q
T
2
5
T
T
l
a
i
c
r
e
m
m
o
C
)
k
n
a
l
b
(
l
a
i
r
t
s
u
d
n
I
I
Ordering Information
X
XXXX
XX
Prefix
Device
Package
X
Grade