SUPPLEMENT
Publication# 21258
Rev: B Amendment/+1
Issue Date: April 1998
Am29F400B Known Good Die
4 Megabit (512 K x 8-Bit/256 K x 16-Bit)
CMOS 5.0 Volt-only, Boot Sector Flash Memory--Die Revision 1
DISTINCTIVE CHARACTERISTICS
s
Single power supply operation
-- 5.0 volt-only operation for read, erase, and
program operations
-- Minimizes system level requirements
s
Manufactured on 0.35 m process technology
-- Compatible with 0.5 m Am29F400 device
s
High performance
-- Acess time as fast as 70 ns
s
Low power consumption (typical values at 5
MHz)
-- 1 A standby mode current
-- 20 mA read current (byte mode)
-- 28 mA read current (word mode)
-- 30 mA program/erase current
s
Flexible sector architecture
-- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
seven 64 Kbyte sectors (byte mode)
-- One 8 Kword, two 4 Kword, one 16 Kword, and
seven 32 Kword sectors (word mode)
-- Supports full chip erase
-- Sector Protection features:
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
s
Top or bottom boot block configurations
available
s
Embedded Algorithms
-- Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
-- Embedded Program algorithm automatically
writes and verifies data at specified addresses
s
Minimum 1,000,000 write cycle per sector
guaranteed
s
Compatibility with JEDEC standards
-- Pinout and software compatible with single-
power-supply Flash
-- Superior inadvertent write protection
s
Data# Polling and toggle bits
-- Provides a software method of detecting
program or erase operation completion
s
Ready/Busy# pin (RY/BY#)
-- Provides a hardware method of detecting
program or erase cycle completion
s
Erase Suspend/Erase Resume
-- Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
s
Hardware reset pin (RESET#)
-- Hardware method to reset the device to reading
array data
2
Am29F400B Known Good Die
S U P P L E M E N T
GENERAL DESCRIPTION
The Am29F400B in Known Good Die (KGD) form is a
4 Mbit, 5.0 volt-only Flash memory. AMD defines KGD
as standard product in die form, tested for functionality
and speed. AMD KGD products have the same relia-
bility and quality as AMD products in packaged form.
Am29F400B Features
The Am29F400B is a 4 Mbit, 5.0 volt-only Flash
memory organized as 524,288 bytes or 262,144 words.
The word-wide data (x16) appears on DQ15DQ0; the
byte-wide (x8) data appears on DQ7DQ0. This device
is designed to be programmed in-system with the
standard system 5.0 volt V
CC
supply. A 12.0 V V
PP
is
not required for write or erase operations. The device
can also be programmed in standard EPROM pro-
grammers.
This device is manufactured using AMD's 0.35 m
process technology, and offers all the features and ben-
efits of the Am29F400, which was manufactured using
0.5 m process technology.
To eliminate bus contention the device has separate
chip enable (CE#), write enable (WE#) and output
enable (OE#) controls.
The device requires only a single 5.0 volt power sup-
ply for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard. Com-
mands are written to the command register using
standard microprocessor write timings. Register con-
tents serve as input to an internal state-machine that
controls the erase and programming circuitry. Write
cycles also internally latch addresses and data needed
for the programming and erase operations. Reading
data out of the device is similar to reading from other
Flash or EPROM devices.
Device programming occurs by executing the program
command sequence. This initiates the Embedded
Program algorithm--an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin.
Device erasure occurs by executing the erase com-
mand sequence. This initiates the Embedded Erase
algorithm--an internal algorithm that automatically
preprograms the array (if it is not already pro-
grammed) before executing the erase operation. Dur-
ing erase, the device automatically times the erase
pulse widths and verifies proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle) status bits. After a program or erase cycle has
been completed, the device is ready to read array data
or accept another command.
The sector erase architecture allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The hardware sector
protection feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved via programming equipment.
The Erase Suspend feature enables the user to put
erase on hold for any period of time to read data from,
or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The hardware RESET# pin terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The system can place the device into the standby mode.
Power consumption is greatly reduced in this mode.
AMD's Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effectiveness.
The device electrically erases all bits within a sector
simultaneously via Fowler-Nordheim tunneling. The
data is programmed using hot electron injection.
ELECTRICAL SPECIFICATIONS
Refer to the Am29F400B data sheet, document
number 21505, for full electrical specifications on the
Am29F400B in KGD form.
Am29F400B Known Good Die
3
S U P P L E M E N T
PRODUCT SELECTOR GUIDE
DIE PHOTOGRAPH
DIE PAD LOCATIONS
Family Part Number
Am29F400B KGD
Speed Option
V
CC
= 5.0 V
5%
-75
V
CC
= 5.0 V
10%
-90
-120
Max access time, ns (t
ACC
)
70
90
120
Max CE# access time, ns (t
CE
)
70
90
120
Max OE# access time, ns (t
OE
)
30
35
50
Orientation relative
to top left corner of
Gel-Pak
Orientation relative
to leading edge of
tape and reel
2
3
4
5
6
7
8
9
13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
AMD logo location
35
37
38
39
40
41
42
43
1
36
10
11
12
32
33
34
30 31
4
Am29F400B Known Good Die
S U P P L E M E N T
PAD DESCRIPTION
Note: The coordinates above are relative to the center of pad 1 and can be used to operate wire bonding equipment.
Pad
Signal
Pad Center (mils)
Pad Center (millimeters)
X
Y
X
Y
1
V
CC
0.00
0.00
0.0000
0.0000
2
DQ4
7.22
0.00
0.1835
0.0000
3
DQ12
13.45
0.00
0.3417
0.0000
4
DQ5
19.59
0.00
0.4977
0.0000
5
DQ13
25.82
0.00
0.6559
0.0000
6
DQ6
31.96
0.00
0.8119
0.0000
7
DQ14
38.19
0.00
0.9701
0.0000
8
DQ7
44.33
0.00
1.1261
0.0000
9
DQ15/A-1
50.56
0.00
1.2843
0.0000
10
V
SS
58.61
1.42
1.4887
0.0361
11
BYTE#
60.50
6.84
1.5367
0.1738
12
A16
60.50
18.99
1.5367
0.4823
13
A15
60.13
181.06
1.5274
4.5990
14
A14
53.99
181.06
1.3714
4.5990
15
A13
48.28
181.06
1.2264
4.5990
16
A12
42.14
181.06
1.0704
4.5990
17
A11
36.43
181.06
0.9254
4.5990
18
A10
30.29
181.06
0.7694
4.5990
19
A9
24.58
180.80
0.6244
4.5924
20
A8
18.34
181.06
0.4659
4.5990
21
WE#
12.63
181.06
0.3209
4.5990
22
RESET#
2.54
185.03
0.0646
4.6998
23
RY/BY#
10.00
185.03
0.2538
4.6998
24
A17
25.79
181.06
0.6546
4.5990
25
A7
31.92
181.06
0.8106
4.5990
26
A6
37.63
181.06
0.9556
4.5990
27
A5
43.77
181.06
1.1116
4.5990
28
A4
49.48
181.06
1.2566
4.5990
29
A3
55.62
181.06
1.4126
4.5990
30
A2
61.33
181.06
1.5576
4.5990
31
A1
67.47
181.06
1.7136
4.5990
32
A0
67.84
18.99
1.7229
0.4823
33
CE#
67.84
6.84
1.7229
0.1738
34
V
SS
67.84
4.00
1.7229
0.1015
35
OE#
57.84
2.39
1.4691
0.0608
36
DQ0
49.86
0.00
1.2664
0.0000
37
DQ8
43.63
0.00
1.1082
0.0000
38
DQ1
37.49
0.00
0.9522
0.0000
39
DQ9
31.26
0.00
0.7940
0.0000
40
DQ2
25.12
0.00
0.6380
0.0000
41
DQ10
18.89
0.00
0.4798
0.0000
42
DQ3
12.75
0.00
0.3238
0.0000
43
DQ11
6.52
0.00
0.1656
0.0000
Am29F400B Known Good Die
5
S U P P L E M E N T
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of the following:
Valid Combinations
Valid Combinations list configurations planned to be sup-
ported in volume for this device. Consult the local AMD sales
office to confirm availability of specific valid combinations and
to check on newly released combinations.
Am29F400B
DEVICE NUMBER/DESCRIPTION
Am29F400B Known Good Die
4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS Flash Memory--Die Revision 1
5.0 Volt-only Program and Erase
-75
SPEED OPTION
See Valid Combinations
PACKAGE TYPE AND
MINIMUM ORDER QUANTITY
DP =
Waffle Pack
180 die per 5 tray stack
DG =
Gel-Pak
Die Tray
378 die per 6 tray stack
DT
=
SurftapeTM (Tape and Reel)
1800 per 7-inch reel
DW= Gel-Pak
Wafer Tray (sawn wafer on frame)
Call AMD sales office for minimum order
quantity
TEMPERATURE RANGE
C = Commercial (0
C to +70
C)
I = Industrial (40
C to +85
C)
E = Extended (55
C to +125
C)
DP
C
1
DIE REVISION
This number refers to the specific AMD manufacturing
process and product technology reflected in this
document. It is entered in the revision field of AMD
standard product nomenclature.
T
BOOT CODE SECTOR ARCHITECTURE
T = Top sector
B = Bottom sector
Valid Combinations
Am29F400BT-75
Am29F400BB-75
DPC 1, DPI 1, DPE 1,
DGC 1, DGI 1, DGE 1,
DTC 1, DTI 1, DTE 1,
DWC 1, DWI 1, DWE 1
Am29F400BT-90
Am29F400BB-90
Am29F400BT-120
Am29F400BB-120
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