A6173081 Series
Preliminary
128K X 8 BIT HIGH SPEED CMOS SRAM
PRELIMINARY
(July, 2000, Version 0.0)
AMIC Technology, Inc.
Document Title
128K X 8 BIT HIGH SPEED CMOS SRAM
Revision History
Rev. No. History
Issue Date
Remark
0.0
Initial issue
July 14, 2000
Preliminary
A6173081 Series
Preliminary
128K X 8 BIT HIGH SPEED CMOS SRAM
PRELIMINARY
(July, 2000, Version 0.0)
1
AMIC Technology, Inc.
Features
n
Center power pinout
n
Supply voltage: 5V
10%
n
Access times: 12/15 ns (max.)
n
Current: Operating: -12: 170mA (max.)
-15: 165mA (max.)
Standby:
TTL: 25mA (max.)
CMOS: 8mA (max.)
n
Full static operation, no clock or refreshing required
n
All inputs and outputs are directly TTL compatible
n
Common I/O using three-state output
n
Data retention voltage: 3V (min.)
n
Available in 32-pin 300mil / 400mil SOJ packages
General Description
The A6173081 is a high-speed 1,048,576-bit static
random access memory organized as 131,072 words by
8 bits and operates on a 5V power supply. It is built
using high performance CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Minimum standby power is drawn by this device when
chip enable is disable, independent of the other input
levels.
Data retention is guaranteed at a power supply voltage
as low as 3V.
Pin Configurations
n
SOJ
A0
A2
A3
I/O
0
I/O
1
VCC
GND
I/O
2
I/O
3
A4
A5
A6
A8
A7
A9
A10
A11
A12
I/O
5
I/O
6
I/O
7
A14
A15
A16
GND
A6173081S(SW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
VCC
I/O
4
OE
A1
CE
WE
A13
A6173081 Series
PRELIMINARY
(July, 2000, Version 0.0)
2
AMIC Technology, Inc.
Block Diagram
Pin Descriptions SOJ
Pin No.
Symbol
Description
1-4, 13-21, 29-32
A0 - A16
Address Inputs
6-7, 10-11, 22-23, 26-27
I/O
0
- I/O
7
Data Inputs/Outputs
5
CE
Chip Enable
28
OE
Output Enable
12
WE
Write Enable
8, 24
VCC
Power Supply
9, 25
GND
Ground
ADDRESS
DECODER
1,048,576-BIT
MEMORY ARRAY
I/O CONTROL
CONTROL
LOGIC
A16
A0
OE
WE
8
8
8
I/O
0
- I/O
7
CE
A6173081 Series
PRELIMINARY
(July, 2000, Version 0.0)
3
AMIC Technology, Inc.
Recommended DC Operating Conditions
(T
A
= 0
C to + 70
C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
VCC
Supply Voltage
4.5
5.0
5.5
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
-
VCC + 0.5
V
V
IL
Input Low (1) Voltage
-0.5
0
+0.8
V
C
L
Output Load
-
-
30
pF
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
IN, IN/OUT Volt to GND . . . . . . . . . . -0.5V to VCC +0.5V
Operating Temperature, Topr . . . . . . . . . . . 0
C to +70
C
Storage Temperature, Tstg . . . . . . . . . . -55
C to +125
C
Temperature Under Bias, Tbias . . . . . . . . -10
C to +85
C
Power Dissipation, P
T
. . . . . . . . . . . . . . . . . . . . . . . 1.0W
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied or intended. Exposure to the absolute maximum
rating conditions for extended periods may affect device
reliability.
DC Electrical Characteristics
(T
A
= 0
C to + 70
C, VCC = 5V
10%, GND = 0V)
Symbol
Parameter
A6173081-12
A6173081-15
Unit
Conditions
Min.
Max.
Min.
Max.
I
LI
Input Leakage
-
2
-
2
A
V
IN
= GND to VCC
I
LO
Output Leakage
-
2
-
2
A
CE = V
IH
, OE = V
IH
V
I/O
= GND to VCC
I
CC1
(2)
Dynamic Operating
Current
-
170
-
165
mA
CE = V
IL
, I
I/O
= 0 mA
Min. Cycle, Duty = 100%
I
SB
-
25
-
25
mA
CE = V
IH
I
SB1
Standby Power
Supply Current
-
8
-
8
mA
CE
VCC - 0.2V,
V
IN
VCC -0.2V or V
IN
0.2V
V
OL
Output Low Voltage
-
0.4
-
0.4
V
I
OL
= 8 mA
V
OH
Output High Voltage
2.4
-
2.4
-
V
I
OH
= -4 mA
Notes: 1. V
IL
= -3.0V for pulses less than 20 ns.
2. I
CC1
is dependent on output loading, cycle rates, and Read/Write patterns.
A6173081 Series
PRELIMINARY
(July, 2000, Version 0.0)
4
AMIC Technology, Inc.
Truth Table
Mode
CE
OE
WE
I/O Operation
Supply Current
Standby
H
X
X
High Z
I
SB
, I
SB1
Output Disable
L
H
H
High Z
I
CC1
Read
L
L
H
D
OUT
I
CC1
Write
L
X
L
D
IN
I
CC1
Note: X = H or L
Capacitance
(T
A
= 25
C, f = 1.0MHz)
Symbol
Parameter
Min.
Max.
Unit
Conditions
C
IN
*
Input Capacitance
-
8
pF
V
IN
= 0V
C
I/O
*
Input/Output Capacitance
-
8
pF
V
I/O
= 0V
* These parameters are sampled and not 100% tested.
AC Characteristics
(T
A
= 0
C to +70
C, VCC = 5V
10%)
Symbol
Parameter
A6173081-12
A6173081-15
Unit
Min.
Max.
Min.
Max.
Read Cycle
t
RC
Read Cycle Time
12
-
15
-
ns
t
AA
Address Access Time
-
12
-
15
ns
t
ACE
Chip Enable Access Time
-
12
-
15
ns
t
OE
Output Enable to Output Valid
-
6
-
8
ns
t
CLZ
Chip Enable to Output in Low Z
3
-
3
-
ns
t
OLZ
Output Enable to Output in Low Z
0
-
0
-
ns
t
CHZ
Chip Disable Output in High Z
0
6
-
8
ns
t
OHZ
Output Disable to Output in High Z
0
6
0
8
ns
t
OH
Output Hold from Address Change
3
-
3
-
ns
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