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A625308A Series
Preliminary
32K X 8 BIT CMOS SRAM
PRELIMINARY (July, 2002, Version 0.2)
AMIC Technology, Inc.
Document Title
32K X 8 BIT CMOS SRAM
Revision History
Rev. No. History
Issue Date
Remark
0.0
Initial issue
February 2, 2001
Preliminary
0.1
Add ultra temp grade and 28-pin DIP package type
November 7, 2001
0.2
Add SI grade
July 17, 2002
A625308A Series
Preliminary
32K X 8 BIT CMOS SRAM
PRELIMINARY (July, 2002, Version 0.2)
1
AMIC Technology, Inc.
Features
n
Power Supply Range: 4.5V to 5.5V
n
Access times: 70 ns
A625308A-S series:
Operating: 35mA (max.)
Standby: 10
A (max.)
A625308A-SI/SU series: Operating: 35mA (max.)
Standby: 15
A (max.)
n
Extended operating temperature range: 0
C to 70
C
for -S series, -25
C to 85
C for -SI series, -40
C to
85
C for -SU series.
n
Full static operation, no clock or refreshing required
n
All inputs and outputs are directly TTL-compatible
n
Common I/O using three-state output
n
Data retention voltage: 2.0V (min.)
n
Available in 28-pin, DIP/SOP and TSOP
General Description
The A625308A is a low operating current 262,144-bit
static random access memory organized as 32,768
words by 8 bits and operates on a voltage from 4.5V to
5.5V.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Minimum standby power is drawn by this device when
CE is at a high level, independent of the other input
levels.
Data retention is guaranteed at a power supply voltage
as low as 2.0V.
Pin Configurations
n
DIP / SOP
n
TSOP
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
I/O
1
I/O
2
GND
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
CE
OE
A11
A9
A8
A13
WE
VCC
A10
A625308A(M)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A625308AV
1
9
28
20
A11
2
3
4
5
6
7
8
10
11
12
13
14
A9
A8
A13
A14
A12
A7
A6
A5
A4
A3
27
26
25
24
23
22
21
19
18
17
16
15
I/O
6
I/O
5
I/O
4
I/O
3
VSS
I/O
2
I/O
1
I/O
0
A0
A1
A2
A10
VCC
I/O
7
OE
WE
CE
~ ~
~ ~
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
2
AMIC Technology, Inc.
Block Diagram
ROW
DECODER
512 X 512
MEMORY ARRAY
INPUT DATA
CIRCUIT
COLUMN I/O
CONTROL
CIRCUIT
CE
WE
I/O
7
I/O
0
A14
A13
A12
A0
VCC
GND
OE
Pin Descriptions DIP / SOP
Pin No.
Symbol
Description
1-10, 21, 23-26
A0 - A14
Address Input
11-13, 15-19
I/O
0
- I/O
7
Data Input/Output
20
CE
Chip Enable
22
OE
Output Enable
27
WE
Write Enable
28
VCC
Power Supply
14
GND
Ground
Pin Description-TSOP
Pin No.
Symbol
Description
2-5, 8-17, 28
A0 - A14
Address Input
18-20, 22-26
I/O
0
- I/O
7
Data Input/Output
27
CE
Chip Enable
1
OE
Output Enable
6
WE
Write Enable
7
VCC
Power Supply
21
GND
Ground
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
3
AMIC Technology, Inc.
Recommended DC Operating Conditions
(T
A
= 0
C to +70
C, -25
C to +85
C or -40
C to +85
C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
VCC
Supply Voltage
4.5
5.0
5.5
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
-
VCC + 0.5
V
V
IL
Input Low Voltage
-0.5
0
+0.8
V
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . 0
C to +70
C or -40
C to +85
C
Storage Temperature, Tstg . . . . . . . . . -55
C to +125
C
Power Dissipation, P
T
. . . . . . . . . . . . . . . . . . . . . . 0.7W
Soldering Temp. & Time . . . . . . . . . . . . . 260
C, 10 sec
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied and exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
DC Electrical Characteristics
(T
A
= 0
C to +70
C, -25
C to +85
C or -40
C to +85
C, VCC = 5.0V
10%, GND = 0V)
Symbol
Parameter
A625308A-70S/SI/SU
Unit
Conditions
Min.
Max.
I
LI
Input Leakage Current
-
1
A
V
IN
= GND to VCC
I
LO
Output Leakage Current
-
1
A
CE = V
IH
V
I/O
= GND to VCC
I
CC
Active Power Supply Current
-
5
mA
CE = V
IL
, I
I/O
= 0mA
I
CC1
Dynamic Operating Current
-
35
mA
Min. Cycle, Duty = 100%
CE = V
IL
, I
I/O
= 0mA
I
CC2
Dynamic Operating Current
-
5
mA
CE = V
IL
, V
IH
= VCC
V
IL
= 0V, f = 1 MHz
I
I/O
= 0 mA
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
4
AMIC Technology, Inc.
DC Electrical Characteristics (continued)
Symbol
Parameter
A625308A-70S
A625308A-70SI/SU
Unit
Conditions
Min.
Max.
Min.
Max.
I
SB
Supply Current
-
0.5
-
0.5
mA
CE = V
IH
I
SB1
Standby Power
-
10
-
15
A
CE
VCC - 0.2V
V
IN
0V
V
OL
Output Low Voltage
-
0.4
-
0.4
V
I
OL
= 2.1 mA
V
OH
Output High Voltage
2.4
-
2.4
-
V
I
OH
= -1.0 mA
Truth Table
Mode
CE
OE
WE
I/O Operation
Supply Current
Standby
H
X
X
High Z
I
SB
, I
SB1
Output Disable
L
H
H
High Z
I
CC
, I
CC1
, I
CC2
Read
L
L
H
D
OUT
I
CC
, I
CC1
, I
CC2
Write
L
X
L
D
IN
I
CC
, I
CC1
, I
CC2
Note: X: H or L
Capacitance
(T
A
= 25
C, f = 1.0 MHz)
Symbol
Parameter
Min.
Max.
Unit
Conditions
C
IN
*
Input Capacitance
-
6
pF
V
IN
= 0V
C
I/O
*
Input/Output Capacitance
-
8
pF
V
I/O
= 0V
* These parameters are sampled and not 100% tested.
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
5
AMIC Technology, Inc.
AC Characteristics
(T
A
= 0
C to +70
C, -25
C to +85
C or -40
C to +85
C, VCC = 5.0V
10%)
Symbol
Parameter
A625308A-70S/SI/SU
Unit
Min.
Max.
Read Cycle
t
RC
Read Cycle Time
70
-
ns
t
AA
Address Access Time
-
70
ns
t
ACE
Chip Enable Access Time
-
70
ns
t
OE
Output Enable to Output Valid
-
35
ns
t
CLZ
Chip Enable to Output in Low Z
10
-
ns
t
OLZ
Output Enable to Output in Low Z
5
-
ns
t
CHZ
Chip Disable to Output in High Z
-
25
ns
t
OHZ
Output Disable to Output in High Z
-
25
ns
t
OH
Output Hold from Address Change
10
-
ns
Write Cycle
t
WC
Write Cycle Time
70
-
ns
t
CW
Chip Enable to End of Write
60
-
ns
t
AS
Address Set up Time
0
-
ns
t
AW
Address Valid to End of Write
60
-
ns
t
WP
Write Pulse Width
50
-
ns
t
WR
Write Recovery Time
0
-
ns
t
WHZ
Write to Output in High Z
-
25
ns
t
DW
Data to Write Time Overlap
30
-
ns
t
DH
Data Hold from Write Time
0
-
ns
t
OW
Output Active from End of Write
5
-
ns
Notes: t
CHZ
, t
OHZ
and t
WHZ
are defined as the time at which the outputs achieve the open circuit condition and are not
referred to output voltage levels.
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
6
AMIC Technology, Inc.
Timing Waveforms
Read Cycle 1
(1)
t
RC
t
AA
t
OH
Address
D
OUT
t
OHZ5
t
CHZ5
t
ACE
t
CLZ5
t
OLZ5
t
OE
CE
OE
Read Cycle 2
(1, 2, 4)
t
RC
t
OH
t
AA
t
OH
Address
D
OUT
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
7
AMIC Technology, Inc.
Timing Waveforms (continued)
Read Cycle 3
(1, 3, 4)
t
CLZ 5
t
ACE
t
CHZ 5
CE
D
OUT
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled, CE = V
IL
.
3. Address valid prior to or coincident with CE transition low.
4. OE = V
IL
.
5. Transition is measured
500mV from steady state. This parameter is sampled and not 100% tested.
Write Cycle 1
(6)
(Write Enable Controlled)
t
WC
Address
CE
D
IN
t
OW 7
t
DH
t
DW
t
WHZ 7
t
WP2
t
AS1
(4)
t
CW5
t
AW
t
WR3
WE
D
OUT
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
8
AMIC Technology, Inc.
Timing Waveforms (continued)
Write Cycle 2
(6)
(Chip Enable Controlled)
t
WC
Address
CE
D
IN
t
DH
t
DW
(4)
t
CW5
t
AW
t
WR3
WE
D
OUT
t
WHZ7
t
WP2
t
AS1
Notes: 1. t
AS
is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (t
WP
) of a low CE and a low WE .
3. t
WR
is measured form the earliest of CE or WE going high to the end of the Write cycle.
4. If the CE low transition occurs simultaneously with the WE low transition or after the WE transition, outputs
remain in a high impedance state.
5. t
CW
is measured from the later of CE going low to the end of Write.
6. OE level is high or low.
7. Transition is measured
500mV from steady. This parameter is sampled and not 100% tested.
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
9
AMIC Technology, Inc.
AC Test Conditions
Input Pulse Levels
0V, 3V
Input Rise And Fall Time
5 ns
Input and Output Timing Reference Levels
1.5V
Output Load
See Figure 1 and 2
30pF
* Including scope and jig.
* Including scope and jig.
C
L
TTL
5pF
C
L
TTL
Figure 1. Output Load
Figure 2. Output Load for t
CLZ1
,
t
CLZ2
, t
OHZ
, t
OLZ
, t
CHZ1
,
t
CHZ2
, t
WHZ
, and t
OW
Data Retention Characteristics
(T
A
= 0
C to +70
C, -25
C to +85
C or -40
C to +85
C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
V
DR
VCC for Data Retention
2.0
5.5
V
CE
VCC - 0.2V
I
CCDR
Data Retention Current
-
3
A
VCC = 2.0V,
CE
VCC - 0.2V
V
IN
0V
t
CDR
Chip Disable to Data Retention Time
0
-
ns
t
R
Operation Recovery Time
t
RC
-
ns
See Retention Waveform
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
10
AMIC Technology, Inc.
Low VCC Data Retention Waveform
VCC
t
CDR
V
IH
4.5V
t
R
V
IH
4.5V
DATA RETENTION MODE
V
DR
2.0V
CE
V
DR
- 0.2V
CE
Ordering Information
Part No.
Access Time (ns)
Operating Current
Max. (mA)
Standby Current
Max. (
A
)
Package
A625308A-70S
35
10
28L DIP
A625308AM-70S
35
10
28L SOP
A625308AV-70S
35
10
28L TSOP (Forward)
A625308A-70SI
35
15
28L DIP
A625308AM-70SI
35
15
28L SOP
A625308AV-70SI
35
15
28L TSOP (Forward)
A625308A-70SU
35
15
28L DIP
A625308AM-70SU
35
15
28L SOP
A625308AV-70SU
70
35
15
28L TSOP (Forward)
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
11
AMIC Technology, Inc.
Package Information
P-DIP 28L Outline Dimensions
unit: inches/mm
1
28
E
1
S
A
2
A
L
E
e
A
D
C
B
1
B
A
1
Base Plane
Seating Plane
14
15
e
1
Dimensions in inches
Dimensions in mm
Symbol
Min
Nom
Max
Min
Nom
Max
A
-
-
0.210
-
-
5.33
A
1
0.010
-
-
0.25
-
-
A
2
0.150
0.155
0.160
3.81
3.94
4.06
B
0.016
0.018
0.022
0.41
0.46
0.56
B
1
0.058
0.060
0.064
1.47
1.52
1.63
C
0.008
0.010
0.014
0.20
0.25
0.36
D
-
1.460
1.470
-
37.08
37.34
E
0.590
0.600
0.610
14.99
15.24
15.49
E
1
0.540
0.545
0.550
13.72
13.84
13.97
e
1
0.090
0.100
0.110
2.29
2.54
2.79
L
0.120
0.130
0.140
3.05
3.30
3.56
0
-
15
0
-
15
e
A
0.630
0.650
0.670
16.00
16.51
17.02
S
-
-
0.090
-
-
2.29
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E
1
does not include resin fins.
3. Dimension S includes end flash.
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
12
AMIC Technology, Inc.
Package Information
SOP (W.B.) 28L Outline Dimensions
unit: inches/mm
1
E
H
L
L
1
c
14
See Detail F
Detail F
B
15
28
A
1
A
2
A
S
D
Seating Plane
D y
e
y
Dimensions in inches
Dimensions in mm
Symbol
Min
Nom
Max
Min
Nom
Max
A
-
-
0.112
-
-
2.85
A
1
0.004
-
-
0.10
-
-
A
2
0.093
0.098
0.103
2.36
2.49
2.62
B
0.014
0.016
0.020
0.36
0.41
0.51
C
0.008
0.010
0.012
0.20
0.25
0.30
D
-
0.713
0.728
-
18.11
18.49
E
0.326
0.331
0.336
8.28
8.41
8.53
e
0.044
0.050
0.056
1.12
1.27
1.42
H
0.453
0.465
0.477
11.51
11.81
12.12
L
0.028
0.036
0.044
0.71
0.91
1.12
L
1
0.059
0.067
0.075
1.50
1.70
1.91
S
-
-
0.047
-
-
1.19
y
-
-
0.004
-
-
0.10
0
-
8
0
-
8
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
A625308A Series
PRELIMINARY (July, 2002, Version 0.2)
13
AMIC Technology, Inc.
Package Information
TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions
unit: inches/mm
Dimensions in inches
Dimensions in mm
Symbol
Min
Nom
Max
Min
Nom
Max
A
-
-
0.049
-
-
1.25
A
1
0.002
-
-
0.05
-
-
A
2
0.037
0.039
0.041
0.95
1.00
1.05
b
0.007
0.009
0.011
0.17
0.22
0.27
c
0.005
-
0.008
0.12
-
0.21
E
0.311
0.315
0.319
7.90
8.00
8.10
L
0.012
0.020
0.028
0.30
0.50
0.70
D
0.520
0.528
0.536
13.20
13.40
13.60
D
1
0.461
0.465
0.469
11.70
11.80
11.90
e
0.022 BSC
0.55 BSC
S
0.017 TYP
0.425 TYP
y
-
-
0.004
-
-
0.10
0
-
5
0
-
5
Notes:
1. The maximum value of dimension D
1
includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
D
1
E
e
D
L
A
A
2
c
Detail "A"
D
y
Detail "A"
S
A
1
b
28
15
1
14
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