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Электронный компонент: A62S6316V-55S

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A62S6316 Series
Preliminary
64K X 16 BIT LOW VOLTAGE CMOS SRAM
PRELIMINARY
(August, 2002, Version 0.5)
AMIC Technology, Inc.
Document Title
64K X 16 BIT LOW VOLTAGE CMOS SRAM
Revision History
Rev. No. History
Issue Date
Remark
0.0
Initial issue
October 8, 1998
Preliminary
0.1
Change access times from 70/100 ns to 55/70 ns(max.)
February 12, 1999
Change dynamic operating current from 80/70mA to 40mA
Modify TSOP 44L (Type II) package outline drawing
0.2
Modify truth table
June 9, 1999
0.3
Change dynamic operating current from 40mA to 50mA(max.)
June 21, 1999
0.4
Modify TSOP 44L (Type II) package outline drawing and
November 9, 1999
Dimensions
0.5
Add mini BGA package outline dimensions symbol E
2
min.
August 12, 2002
and max.
A62S6316 Series
Preliminary
64K X 16 BIT LOW VOLTAGE CMOS SRAM
PRELIMINARY
(August, 2002, Version 0.5)
1
AMIC Technology, Inc.
Features
n
Operating voltage: 2.7V to 3.3V
n
Access times: 55/70 ns (max.)
n
Current:
A62S6316-S series:
Operating: 50mA (max.)
Standby: 15
A (max.)
A62S6316-SI series:
Operating: 50mA (max.)
Standby: 30
A (max.)
n
Extended operating temperature range : -25
C to 85
C
for -SI series
n
Full static operation, no clock or refreshing required
n
All inputs and outputs are directly TTL-compatible
n
Common I/O using three-state output
n
Data retention voltage: 2V (min.)
n
Available in 44-pin TSOP and 48-ball Mini BGA (6X8)
packages.
General Description
The A62S6316 is a low operating current 1,048,576-bit
static random access memory organized as 65,536
words by 16 bits and operates on low power supply
voltage from 2.7V to 3.3V. It is built using AMIC's high
performance CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
The chip enable input is provided for POWER-DOWN,
device enable. Two byte enable inputs and an output
enable input are included for easy interfacing.
Data retention is guaranteed at a power supply voltage
as low as 2V.
Pin Configuration
n
TSOP (Type II)
1
A4
A3
A2
A1
A0
CE
I/O
0
I/O
1
I/O
2
I/O
3
VCC
GND
I/O
4
I/O
5
I/O
6
I/O
7
23
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A5
A6
A7
OE
HB
LB
I/O
15
I/O
14
I/O
13
I/O
12
VCC
GND
I/O
11
I/O
10
I/O
9
I/O
8
A62S6316V
17
18
19
20
21
22
24
25
26
27
28
29
WE
A15
A14
A13
A12
NC
NC
A8
A9
A10
A11
NC
n
Mini BGA (6X8) Top View
1
2
3
4
5
6
A
LB
OE
A0
A1
A2
NC
B
I/O
8
HB
A3
A4
CS
I/O
0
C
I/O
9
I/O
10
A5
A6
I/O
1
I/O
2
D
VSS
I/O
11
NC
A7
I/O
3
VCC
E
VCC
I/O
12
NC
NC
I/O
4
VSS
F
I/O
14
I/O
13
A14
A15
I/O
5
I/O
6
G
I/O
15
NC
A12
A13
WE
I/O
7
H
NC
A8
A9
A10
A11
NC
A62S6316G
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
2
AMIC Technology, Inc.
Block Diagram
DECODER
512 X 2048
MEMORY ARRAY
COLUMN I/O
INPUT
DATA
CIRCUIT
CONTROL
CIRCUIT
VCC
GND
I/O
7
I/O
0
A15
A14
A0
WE
HB
INPUT
DATA
CIRCUIT
I/O
8
I/O
15
CE
LB
OE
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
3
AMIC Technology, Inc.
Pin Description - TSOP
Pin No.
Symbol
Description
1 - 5, 18 - 21,
24 - 27,42 - 44
A0 - A15
Address Inputs
6
CE
Chip Enable Input
7 - 10, 13 - 16,
29 - 32, 35 - 38
I/O
0
- I/O
15
Data Input/Outputs
17
WE
Write Enable Input
39
LB
Byte Enable Input (I/O
0
to I/O
7
)
40
HB
Byte Enable Input (I/O
8
to I/O
15
)
41
OE
Output Enable Input
11, 33
VCC
Power
12, 34
GND
Ground
22 , 23, 28
NC
No Connection


Recommended DC Operating Conditions
(T
A
= 0
C to + 70
C or -25
C to 85
C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
VCC
Supply Voltage
2.7
3.0
3.3
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
-
VCC + 0.3
V
V
IL
Input Low Voltage
-0.3
-
+0.6
V
C
L
Output Load
-
-
30
pF
TTL
Output Load
-
-
1
-
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
4
AMIC Technology, Inc.
Absolute Maximum Ratings*

VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +4.6V
IN, IN/OUT Volt to GND . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . . . . -25
C to +85
C
Storage Temperature, Tstg . . . . . . . . . -55
C to +125
C
Power Dissipation, P
T
. . . . . . . . . . . . . . . . . . . . . 0.7W
Soldering Temp. & Time . . . . . . . . . . . . 260
C, 10 sec
*Comments

Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
DC Electrical Characteristics
(T
A
= 0
C to + 70
C or -25
C to 85
C, VCC = 2.7V to 3.3V, GND = 0V)
Symbol
Parameter
A62S6316-55S/70S
A62S6316-55SI/70SI
Unit
Conditions
Min.
Max.
Min.
Max.
I
LI
Input Leakage
Current
-
1
-
1
A
V
IN
= GND to VCC
I
LO

Output Leakage
Current
-
1
-
1
A
CE = V
IH
or LB = V
IH
or
HB = V
IH
or OE = V
IH
or
WE = V
IH
V
I/O
= GND to VCC
I
CC
Active Power
Supply Current
-
5
-
5
mA
CE = V
IL
, I
I/O
= 0mA
I
CC1
-
50
-
50
mA
Min. Cycle, Duty = 100%
CE = V
IL
, I
I/O
= 0mA
I
CC2
Dynamic
Operating
Current
-
20
-
20
mA
CE = V
IL
, V
IH
= VCC,
V
IL
= 0V, f = 1MHz,
I
I/O
= 0 mA
I
SB
-
0.5
-
0.5
mA
CE = V
IH
I
SB1
Standby Power
Supply Current
-
15
-
30
A
CE
VCC - 0.2V
V
IN
0V
V
OL
Output Low
Voltage
-
0.4
-
0.4
V
I
OL
= 2.1mA
V
OH
Output High
Voltage
2.2
-
2.2
-
V
I
OH
= -1.0mA
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
5
AMIC Technology, Inc.
Truth Table
CE
OE
WE
LB
HB
I/O
0
to I/O
7
Mode
I/O
8
to I/O
15
Mode
VCC Current
H
X
X
X
X
Not selected
Not selected
I
SB1
, I
SB
L
L
Read
Read
I
CC1
, I
CC2
, I
CC
L
L
H
L
H
Read
High - Z
I
CC1
, I
CC2
, I
CC
H
L
High - Z
Read
I
CC1
, I
CC2
, I
CC
L
L
Write
Write
I
CC1
, I
CC2
, I
CC
L
X
L
L
H
Write
Not Write/Hi - Z
I
CC1
, I
CC2
, I
CC
H
L
Not Write/Hi - Z
Write
I
CC1
, I
CC2
, I
CC
L
X
High - Z
High - Z
I
CC1
, I
CC2
, I
CC
L
H
H
X
L
High - Z
High - Z
I
CC1
, I
CC2
, I
CC
X
X
X
H
H
Not selected
Not selected
I
SB1
, I
SB
Note: X = H or L
Capacitance
(T
A
= 25
C, f = 1.0MHz)
Symbol
Parameter
Min.
Max.
Unit
Conditions
C
IN
*
Input Capacitance
-
6
pF
V
IN
= 0V
C
I/O
*
Input/Output Capacitance
-
8
pF
V
I/O
= 0V
* These parameters are sampled and not 100% tested.
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
6
AMIC Technology, Inc.
AC Characteristics
(T
A
= 0
C to +70
C or -25
C to 85
C, VCC = 2.7V to 3.3V)
Symbol
Parameter
A62S6316-55S/SI
A62S6316-70S/SI
Unit
Min.
Max.
Min.
Max.
Read Cycle
t
RC
Read Cycle Time
55
-
70
-
ns
t
AA
Address Access Time
-
55
-
70
ns
t
ACE
Chip Enable Access Time
-
55
-
70
ns
t
BE
Byte Enable Access Time
-
55
-
70
ns
t
OE
Output Enable to Output Valid
-
30
-
35
ns
t
CLZ
Chip Enable to Output in Low Z
10
-
10
-
ns
t
BLZ
Byte Enable to Output in Low Z
5
-
5
-
ns
t
OLZ
Output Enable to Output in Low Z
5
-
5
-
ns
t
CHZ
Chip Disable to Output in High Z
-
20
-
25
ns
t
BHZ
Byte Disable to Output in High Z
-
20
-
25
ns
t
OHZ
Output Disable to Output in High Z
-
20
-
25
ns
t
OH
Output Hold from Address Change
5
-
10
-
ns
Write Cycle
t
WC
Write Cycle Time
55
-
70
-
ns
t
CW
Chip Enable to End of Write
50
-
60
-
ns
t
BW
Byte Enable to End of Write
50
-
60
-
ns
t
AS
Address Setup Time
0
-
0
-
ns
t
AW
Address Valid to End of Write
50
-
60
-
ns
t
WP
Write Pulse Width
40
-
50
-
ns
t
WR
Write Recovery Time
0
-
0
-
ns
t
WHZ
Write to Output in High Z
-
25
-
30
ns
t
DW
Data to Write Time Overlap
25
-
30
-
ns
t
DH
Data Hold from Write Time
0
-
0
-
ns
t
OW
Output Active from End of Write
5
-
5
-
ns
Note: t
CHZ
, t
BHZ
and t
OHZ
and t
WHZ
are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
7
AMIC Technology, Inc.
Timing Waveforms

Read Cycle 1
(1, 2, 4)
t
RC
t
OH
t
AA
t
OH
Address
D
OUT

Read Cycle 2
(1, 2, 3)
t
RC
t
AA
Address
t
ACE
t
CHZ5
CE
HB, LB
t
BHZ5
OE
t
CLZ5
t
BE
t
BLZ5
t
OE
t
OLZ5
t
OHZ5
D
OUT

Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled CE = V
IL
, HB = V
IL
and, or LB = V
IL
.
3. Address valid prior to or coincident with CE and ( HB and, or LB ) transition low.
4. OE = V
IL
.
5. Transition is measured
500mV from steady state. This parameter is sampled and not 100% tested.
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
8
AMIC Technology, Inc.
Timing Waveforms (continued)

Write Cycle 1
(Write Enable Controlled)
t
WC
t
AW
Address
DATA IN
DATA OUT
WE
HB, LB
CE
t
WR3
t
CW
t
BW
t
AS1
t
WP2
t
DW
t
DH
t
OW
t
WHZ4
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
9
AMIC Technology, Inc.
Timing Waveforms (continued)

Write Cycle 2
(Chip Enable Controlled)
t
WC
t
AW
Address
DATA IN
DATA OUT
WE
HB, LB
CE
t
WR3
t
CW2
t
BW
t
AS1
t
WP
t
DW
t
DH
t
OW
t
WHZ4
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
10
AMIC Technology, Inc.
Timing Waveforms (continued)

Write Cycle 3
(Byte Enable Controlled)
t
WC
t
AW
Address
DATA IN
DATA OUT
WE
HB, LB
CE
t
WR3
t
CW
t
BW2
t
AS1
t
WP
t
DW
t
DH
t
OW
t
WHZ4
Notes: 1. t
AS
is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (t
WP
, t
BW
) of a low CE , WE and ( HB and, or LB ).
3. t
WR
is measured from the earliest of CE or WE or ( HB and, or LB ) going high to the end of the Write cycle.
4. OE level is high or low.
5. Transition is measured
500mV from steady state. This parameter is sampled and not 100% tested.


A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
11
AMIC Technology, Inc.
AC Test Conditions
Input Pulse Levels
0V to 2.4V
Input Rise And Fall Time
5 ns
Input and Output Timing Reference Levels
1.5V
Output Load
See Figures 1 and 2
30pF
* Including scope and jig.
* Including scope and jig.
C
L
TTL
5pF
C
L
TTL
Figure 1. Output Load
Figure 2. Output Load for t
CLZ
,
t
OLZ
,
t
CHZ
,
t
OHZ
,
t
WHZ
,
and t
OW
Data Retention Characteristics
(T
A
= 0
C to 70
C or -25
C to 85
C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
V
DR
VCC for Data Retention
2.0
3.3
V
CE
VCC - 0.2V
I
CCDR

Data Retention Current
S-Version
-
10*
A
VCC = 2.0V,
CE
VCC - 0.2V
SI-Version
-
20**
V
IN
0V
t
CDR
Chip Disable to Data Retention Time
0
-
ns
t
R
Operation Recovery Time
T
RC
-
ns
See Retention Waveform
t
VR
VCC Rise Time from Data Retention
Voltage to Operating Voltage
5
-
ms
* A62S6316-55S/70S
I
CCDR
: max. 3
A at T
A
= 0
C to + 40
C
** A62S6316-55SI/70SI
I
CCDR
: max. 3
A at T
A
= 0
C to + 40
C
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
12
AMIC Technology, Inc.
Low VCC Data Retention Waveform
VCC
CE
t
CDR
V
IH
2.7V
t
R
V
IH
2.7V
DATA RETENTION MODE
V
DR
2V
CE
V
DR
- 0.2V
t
VR
Ordering Information
Part No.
Access Time (ns)
Operating Current
Max. (mA)
Standby Current
Max. (

A)
Package
A62S6316V-55S
50
15
44L TSOP
A62S6316V-55SI
50
30
44L TSOP
A62S6316G-55S
50
15
48B Mini BGA
A62S6316G-55SI
55
50
30
48B Mini BGA
A62S6316V-70S
50
15
44L TSOP
A62S6316V-70SI
50
30
44L TSOP
A62S6316G-70S
50
15
48B Mini BGA
A62S6316G-70SI
70
50
30
48B Mini BGA
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
13
AMIC Technology, Inc.
Package Information

TSOP 44L (Type II) Outline Dimensions
unit: inches/mm
1
E
L
1
L
1
c
44
ZD
D y
e
D
b
L
L
A
1
A
2
A
E
1

Dimensions in inches
Dimensions in mm
Symbol
Min
Nom
Max
Min
Nom
Max
A
-
-
0.047
-
-
1.20
A
1
0.002
-
0.006
0.05
-
0.15
A
2
0.037
0.039
0.041
0.95
1.00
1.05
b
0.012
-
0.018
0.30
-
0.45
c
0.005
-
0.008
0.12
-
0.21
D
0.720
0.725
0.730
18.28
18.41
18.54
ZD
0.032 REF
0.805 REF
E
0.455
0.463
0.471
11.56
11.76
11.96
E
1
0.395
0.400
0.405
10.03
10.16
10.29
L
0.019
0.023
0.027
0.49
0.59
0.69
L
1
0.031 REF
0.80 REF
e
0.031 BSC
0.80 BSC
y
-
-
0.004
-
-
0.10
0
-
5
0
-
5
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E
1
does not include resin fins.
3. Dimension ZD includes end flash.




Package Information
A62S6316 Series
PRELIMINARY
(August, 2002, Version 0.5)
14
AMIC Technology, Inc.

Mini BGA 6X8 (48 BALLS) Outline Dimensions
unit : millimeter(mm)


Symbol
Min
Typ
Max
A
-
0.75
-
B
5.90
6.00
6.10
B1
-
3.75
-
C
7.90
8.00
8.10
C1
-
5.25
-
D
0.30
0.35
0.40
E
1.00
1.10
1.20
E1
-
0.36
-
E2
0.17
0.22
0.27
1
2
3
4
5
6
A
B
C
D
E
F
G
H
Bottom View
Pin A1 Index
Diameter D
Solder Ball
A
B1
A
C1
Top View
Pin A1 Index
B
C
0.10
E1
E
E2
D