LP62S16512-T Series
Preliminary
512K X 16 BIT LOW VOLTAGE CMOS SRAM
PRELIMINARY (March, 2002, Version 0.2)
AMIC Technology, Inc.
Document Title
512K X 16 BIT LOW VOLTAGE CMOS SRAM
Revision History
Rev. No. History
Issue Date
Remark
0.2
Add Product Family and 55ns specification
March 20, 2002
Preliminary
LP62S16512-T Series
Preliminary
512K X 16 BIT LOW VOLTAGE CMOS SRAM
PRELIMINARY (March, 2002, Version 0.2)
1
AMIC Technology, Inc.
Features
n
Operating voltage: 2.7V to 3.6V
n
Access times: 55/70 ns (max.)
n
Current:
Very low power version: Operating: 50mA (max.)
Standby:
20
A (max.)
n
Full static operation, no clock or refreshing required
n
All inputs and outputs are directly TTL-compatible
n
Common I/O using three-state output
n
Data retention voltage: 2.0V (min.)
n
Available in 48-ball CSP (8
10mm) packages
General Description
The LP62S16512-T is a low operating current 8,388,608-
bit static random access memory organized as 524,288
words by 16 bits and operates on low power voltage from
2.7V to 3.6V. It is built using AMIC's high performance
CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Two chip enable input is provided for POWER-DOWN,
device enable. Two byte enable inputs and an output
enable input are included for easy interfacing.
Data retention is guaranteed at a power supply voltage
as low as 2.0V.
Product Family
Power Dissipation
Product
Family
Operating
Temperature
VCC
Range
Speed
Data Retention
(I
CCDR
, Typ.)
Standby
(I
SB1
, Typ.)
Operating
(I
CC2
, Typ.)
Package
Type
LP62S16512
-40
C ~ +85
C 2.7V~3.6V
55ns / 70ns
0.3
A
0.5
A
4mA
48 CSP
1. Typical values are measured at VCC = 3.0V, T
A
= 25
C and not 100% tested.
2. Data retention current VCC = 2.0V.
Pin Configurations
n
n
CSP (Chip Size Package)
48-pin Top View
I/O
9
I/O
10
GND
VCC
I/O
15
I/O
16
A18
A8
NC
A9
A12
A10
A11
NC
A13
A14
A15
I/O
8
I/O
7
I/O
3
I/O
1
GND
VCC
A0
A3
A5
A6
A4
A1
A2
CS
2
6
5
4
3
2
1
A
B
C
D
E
F
G
H
I/O
14
I/O
13
I/O
12
I/O
11
A17
NC
A7
A16
I/O
2
I/O
4
I/O
5
I/O
6
LB
HB
WE
OE
CS
1
LP62S16512-T Series
PRELIMINARY (March, 2002, Version 0.2)
2
AMIC Technology, Inc.
Block Diagram
DECODER
1024 X 8192
MEMORY ARRAY
COLUMN I/O
INPUT
DATA
CIRCUIT
CONTROL
CIRCUIT
VCC
GND
I/O
8
I/O
1
A18
A17
A0
INPUT
DATA
CIRCUIT
I/O
9
I/O
16
LB
WE
OE
HB
LB
CS
2
CS
1
LP62S16512-T Series
PRELIMINARY (March, 2002, Version 0.2)
3
AMIC Technology, Inc.
Pin Description - CSP
Symbol
Description
Symbol
Description
A0 - A18
Address Inputs
HB
Higher Byte Enable Input
(I/O
9
- I/O
16
)
1
CS , CS
2
Chip Enable
OE
Output Enable
I/O
1
- I/O
16
Data Input/Output
VCC
Power Supply
WE
Write Enable Input
GND
Ground
LB
Byte Enable Input
(I/O
1
- I/O
8
)
NC
No Connection
Recommended DC Operating Conditions
(T
A
= -25
C to + 85
C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
VCC
Supply Voltage
2.7
3
3.6
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.0
-
VCC + 0.3
V
V
IL
Input Low Voltage
-0.3
-
+0.6
V
C
L
Output Load
-
-
30
pF
TTL
Output Load
-
-
1
-
LP62S16512-T Series
PRELIMINARY (March, 2002, Version 0.2)
4
AMIC Technology, Inc.
Absolute Maximum Ratings*
VCC to GND ..............................................-0.5V to +4.0V
IN, IN/OUT Volt to GND ................... -0.5V to VCC + 0.5V
Operating Temperature, Topr ...................-25
C to +85
C
Storage Temperature, Tstg.....................-55
C to +125
C
Power Dissipation, P
T ......................................................................
0.7W
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
DC Electrical Characteristics
(T
A
= -25
C to + 85
C, VCC = 2.7V to 3.6V, GND = 0V)
Symbol
Parameter
LP62S16512-55/70LLT
Unit
Conditions
Min.
Max.
I
LI
Input Leakage Current
-
1
A
V
IN
= GND to VCC
I
LO
Output Leakage Current
-
1
A
1
CS = V
IH
or CS
2
= V
IL
or
LB = HB = V
IH
V
I/O
= GND to VCC
I
CC
Active Power Supply
Current
-
5
mA
1
CS = V
IL
, CS
2
= V
IH
,
LB = V
IL
or HB = V
IL ,
I
I/O
= 0mA
I
CC1
Dynamic Operating
-
50
mA
Min. Cycle, Duty = 100%,
1
CS = V
IL
,
CS
2
= V
IH
, LB = V
IL
or HB = V
IL
I
I/O
= 0mA
I
CC2
Current
-
15
mA
1
CS
0.2V, CS
2
VCC-0.2V ,
LB
0.2V or HB
0.2V
f = 1MHz , I
I/O
= 0mA
I
SB
-
1
mA
1
CS = V
IH
or
CS
2
= V
IL
or
LB = HB = V
IH
I
SB1
Standby Current
-
20
A
1
CS
VCC - 0.2V or CS
2
0.2V or
LB = HB
VCC-0.2V
V
IN
VCC-0.2V or V
IN
0.2V
V
OL
Output Low Voltage
-
0.4
V
I
OL
= 2.1 mA
V
OH
Output High Voltage
2.2
-
V
I
OH
= -1.0 mA
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