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Электронный компонент: ARA2000S23

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S23
28 PIN SSOP PACKAGE
FEATURES
APPLICATIONS
ARA2000S23
CATV Reverse Amplifier with Step Attenuator
Advanced Product Information
Rev. 2
Low cost integrated monolithic GaAs
amplifier with step attenuator.
Attenuation Range: 0 58 dB, variable in
1 dB steps via 16 bit serial input.
Meets DOCSIS distortion requirements at
+60 dBmV
Low distortion & Low noise figure
Frequency range: 5 100 MHz
5 Volt operation
Programmable address allows multiple
parts to share 3 wire bus
MCNS/DOCSIS Compliant Cable Modems
CATV Interactive Set-Top Box
Telephony over Cable Systems
Open Cable Set-Top Box
Description
The ARA2000S23 is a GaAs IC designed to provide the reverse path amplification and output level control
functions in a CATV Set-Top Box or Cable Modem. It incorporates a digitally controlled precision step
attenuator that is preceded by an ultra low noise amplifier stage, and followed by an ultra-linear output driver
amplifier. This part is a balanced design that meets or exceeds the MCNS/DOCSIS requirement for
harmonic performance @ +60dBmV output levels while only requiring a single polarity +5V supply. Both the
input and output are matched to 75 ohms. The precision attenuator provides up to 58 dB of attenuation in 1
dB increments. The ARA2000S23 is supplied in a 28-pin SSOP package featuring a thermal heat slug on the
bottom of the package. Soldering this heat slug to the ground plane of the PC board ensures the lowest
possible thermal resistance for the device resulting in a long MTF.
PA
MAC
QAM
Receiver
w/FEC
SAW
Double
Conversion
Tuner
Microcontroller
w/Enet MAC
RAM
ROM
10Base-T
Tranceiver
Balun
ARA
2000
Reverse Amp
54-860 MHz
Gain Control
Clock
Clock
Data
Data
RJ45
Connector
45 MHz IF
Tx Enable/Disable
CL
K
DA
T
EN
CMOS IC
PA
PA
"Shutdown"
~
Low Pass
Filter
Diplexer
Filter
Coax Input
ATTN
1/2/4/8/16/32 dB
PA
~
"Shutdown"
Low Pass
Filter
Upstream
QPSK/
16-QAM
Modulator
Figure 1: Cable Modem or Interactive Set-Top Box Block Diagram
2
ARA2000S23
32 dB
16 dB
8 dB
4 dB
2 dB
1 dB
EFET
EFET
GaAs IC
Attn In
Amp Out
Amp In
ISET 1
Control 1
Amp Out
Amp In
Attn In
32 dB
16 dB
8 dB
4 dB
2 dB
1 dB
Attn Out
Amp In
Amp Out
Control 2
ISET 2
Amp Out
Amp In
Attn Out
CMOS IC (Serial to Parallel Interface)
2-Bit Shift
Register/
Address
Buffer
Buffer
Control Latch
Data Latch
2-Bit Shift
Register / Die ID
4-Bit Shift
Register/ Chip Sel
8-Bit Shift Register
P5
P4
P3
P2
P1
P0
8
2
8
8
2
Die
Address 0
Die
Address 1
Clock
Data
Enable
Figure 2: ARA 2000 Block Diagram
V
D
D
)
4
2
,
1
2
,
9
,
4
,
2
S
N
I
P
(
9
C
D
V
V
N
I
F
R
)
8
,
5
S
N
I
P
(
3
-
o
t
0
C
D
V
T
T
A
N
I
T
T
A
)
0
1
,
3
(
T
U
O
V
)
6
2
,
9
1
(
5
C
D
V
I
T
E
S
)
2
2
,
7
S
N
I
P
(
2
C
D
V
S
N
I
P
(
e
g
a
tl
o
V
t
u
p
n
I
F
R
8
,
5
*
)
0
6
+
V
m
B
d
e
r
u
t
a
r
e
p
m
e
T
e
g
a
r
o
t
S
0
0
2
+
o
t
5
5
-
C
e
r
u
t
a
r
e
p
m
e
T
g
n
i
r
e
d
l
o
S
0
6
2
C
e
m
i
T
g
n
i
r
e
d
l
o
S
5
c
e
S
e
r
u
t
a
r
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p
m
e
T
e
s
a
C
g
n
it
a
r
e
p
O
5
8
+
o
t
0
C
ABSOLUTE MAXIMUM RATINGS
PARAMETER
PARAMETER
3
ARA2000S23
ELECTRICAL CHARACTERISTICS (TYPICAL) (V
DD
=5 V
DC
, T
C
=25 C)
R
E
T
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M
A
R
A
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c
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3
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6
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1
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3
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7
0
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5
1
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3
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8
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7
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1
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3
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4
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0
3
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5
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4
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b
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t
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p
t
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O
1
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1
-
0
1
-
B
d
d
e
l
b
a
s
i
d
x
T
V
1
D
D
V
,
2
D
D
)
4
2
,
1
2
,
9
,
4
s
n
i
P
(
-
5
7
V
V
D
D
)
2
n
i
P
(
l
a
ti
g
i
D
-
5
-
V
V
D
D
)
1
1
n
i
P
(
S
O
M
C
3
-
5
V
I
1
D
D
)
9
d
n
a
4
s
n
i
P
(
)
p
m
A
t
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p
n
I(
-
8
4
0
8
A
m
d
e
l
b
a
n
e
x
T
4
ARA2000S23
ELECTRICAL CHARACTERISTICS (TYPICAL) (V
DD
=5 V
DC
, T
C
=25 C) (Continued)
ARA2000
Attenuation Level vs C ontrol Word
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60
64
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
Control W ord
A
tten
u
a
ti
o
n
(d
B
)
Notes:
1. As measured in ANADIGICS test fixture
2. At +60 dBmV output level into 75 ohm load
R
E
T
E
M
A
R
A
P
N
I
M
P
Y
T
X
A
M
T
I
N
U
S
T
N
E
M
M
O
C
I
1
D
D
-
4
.
2
6
A
m
d
e
l
b
a
s
i
d
x
T
I
2
D
D
)
4
2
d
n
a
1
2
s
n
i
P
(
)
p
m
A
t
u
p
t
u
O
(
-
7
7
0
2
1
A
m
d
e
l
b
a
n
e
x
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I
2
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-
7
.
3
9
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m
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l
b
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)
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P
(
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o
t
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u
n
e
tt
A
(
l
a
ti
g
i
D
-
9
5
1
A
m
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it
p
m
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n
o
C
r
e
w
o
P
-
7
6
.
0
8
0
.
1
W
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l
b
a
n
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T
n
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it
p
m
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s
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C
r
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w
o
P
-
5
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5
1
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d
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l
b
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d
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S
p
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t
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tt
A
6
.
0
-
4
.
1
B
d
s
s
e
n
t
a
l
F
n
i
a
G
1
-
5
.
1
-
B
d
z
H
M
5
6
-
5
t
n
e
i
s
n
a
r
T
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g
a
tl
o
V
t
u
p
t
u
O
1
e
l
b
a
s
i
d
/
e
l
b
a
n
e
x
T
-
-
-
4
0
0
1
7
p
-
p
V
m
-
g
n
it
t
e
S
r
o
t
a
u
n
e
tt
A
b
d
0
t
A
g
n
it
t
e
S
r
o
t
a
u
n
e
tt
A
b
d
4
2
t
A
n
o
it
a
u
n
e
tt
A
m
u
m
i
x
a
M
6
.
8
5
3
.
0
6
5
ARA2000S23
Gain & Noise Figure vs Frequency
5
10
15
20
25
30
35
10
20
30
40
50
60
70
80
90
100
Frequency (MHz)
Ga
in
(d
B)
2
3
4
5
6
7
8
NF
(
d
B)
Gain
Noise Figure
Gain & Noise Figure vs V
DD
20
23
26
29
32
35
3
4
5
6
7
V
DD
( Volts )
G
A
IN
(d
B
)
1
2
3
4
5
6
NF (
d
B)
Gain
Noise Figure
Measured @ 30 MHz
GAIN & Noise Figure vs Temperature
20
23
26
29
32
35
-40
-25
-10
5
20
35
50
65
80
Temperature (C
o
)
G
A
IN (
d
B)
1
2
3
4
5
6
NF (
d
B)
Gain
Noise Figure
Measured @ 30 MHz