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Электронный компонент: ATA01501

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08/2001
2-1
ATA01501
AGC Transimpedance Amplifier
SONET OC-3
PRELIMINARY DATA SHEET - Rev 1.6
S2
12 Pin 4 Sided
SQFP Package
D1
Die Package
Figure 1: Equivalent Circuit
PRODUCT DESCRIPTION
The ANADIGICS ATA01501 is a 5V low noise
transimpedance amplifier with AGC designed to be
used in OC-3/STM-1 fiber optic links. The device is
used in conjunction with a photodetector (PIN diode
or avalanche photodiode) to convert an optical signal
into an output voltage. The ATA01501 offers a wide
bandwidth of 175MHz and a dynamic range of 38dB.
It is manufactured in a GaAs MESFET process and
available in bare die form or a 12 pin SQFP package.
V
DD2
V
OUT
C
AGC
GND
V
DD1
I
IN
C
BY
US PATENT
GND
or
neg.supply
VGA
- 45
70K
+
4pF
+ 0.8
AGC
19 K
Photodector cathode must be connected
to Iin for proper AGC operation
I
IN
V
DD1
I
IN
GND
GND
GND GND
GND
GND
GND
GND
C
BY
C
BY
C
AGC
V
OUT
1992
19
I
V
DD2
FEATURES
Single +5 Volt Supply
Automatic Gain Control
-38 dBm Sensitivity
0 dBm Optical Overload
175 MHz Bandwidth
APPLICATIONS
SONET OC-3/SDH STM-1 (155mb/s) receiver
FDDI Ethernet Fiber LAN
Low Noise RF Amplifier
ATA01501
2
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
1
2
3
4
5
6
7
8
9
10
11
12
N
I
P
N
O
I
T
P
I
R
C
S
E
D
N
I
P
N
O
I
T
P
I
R
C
S
E
D
1
C
N
7
V
T
U
O
2
D
N
G
8
D
N
G
3
I
N
I
9
C
N
4
C
Y
B
0
1
V
D
D
5
D
N
G
1
1
D
N
G
6
C
C
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Table 3: Pad Description
Figure 3: Pin Layout
Table 2: Pin Description
925 um
V
DD1
I
IN
GND
GND
GND GND
GND
GND
GND
GND
C
BY
C
BY
C
AGC
V
OUT
1992
19
I
1250 um
V
DD2
Figure 2: Die Bonding Pads
ATA01501
3
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
Table 3: Absolute Maximum Ratings
ELECTRICAL CHARACTERISTICS
Stresses in excess of the absolute ratings may cause
permanent damage. Functional operation is not implied
under these conditions. Exposure to absolute ratings for
extended periods of time may adversely affect reliability.
V
1
D
D
V
0
.
7
V
2
D
D
V
0
.
7
I
N
I
A
m
5
T
A
0
4
-
.
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m
e
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g
n
it
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r
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O
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C
0
C
T
S
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6
-
.
p
m
e
T
e
g
a
r
o
t
S
0
0
5
1
o
t
C
0
C
ATA01501
4
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
Table 4: Electrical Specifications
(1)
(TA= 25
C, VDD=+5.0V + 10%, CDIODE+CSTRAY = 0.5 pF, Det. Cathode to IIN)
Notes:
1.
f = 50 MHz
2.
Measured with I
IN
below
AGC Threshold. During AGC, input impedance will decrease proportionally to I
IN
3.
Defined as the I
IN
where Transresistance has decreased by 50%.
4.
See note on Indirect Measurement of Optical Overload.
5.
See note on Measurement of Input Referred Noise Current.
6.
C
AGC
= 220 pF
7. Parameter is guaranteed (not tested) by design and characterization data
@155Mb assuming detector responsivity of 0.9
R
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ATA01501
5
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
0.17
0.15
0.13
0.11
0.90
-40
10
60
85
V
DD
=
4.5 V
V
DD
=
5.0 V
V
DD
=
5.5 V
C
T
= 0.5 pF
B
a
n
d
w
i
d
t
h

(
G
Hz
)
Temperature (
O
C)
1
2
3
4
5
6
7
8
9
10
11
12
I
IN
NC
GND
or
Neg.Supply
0.1F
Vout
NC
0.1F
V
DD
NC
56 pF
56 pF
Figure 5: ATA01501DS2C Typical SQFP
Connection Package
Figure 4: ATA01501D1C Die Typical Bonding
V
DD
56pF
56pF
GND
V
DD
19
I
I
IN
GND
GND
GND GND
C
BY
C
BY
GND C
AGC
GND
GND
GND
V
DD2
56pF
56pF
1992
V
OUT
OUT
PIN
Power Supplies and General Layout
The ATA00501D1C may be operated from a positive
supply as low as +4.5 V and as high as +6.0 V. Below
+4.5 V, bandwidth, overload and sensitivity will
degrade, while at +6.0 V, bandwidth, overload and
sensitivity improve (see Bandwidth vs. Temperature
curves). Use of surface mount (preferably MIM type
capacitors), low inductance power supply bypass
capacitors (>=56pF) are essential for good high
frequency and low noise performance. The power
supply bypass capacitors should be mounted on or
connected to a good low inductance ground plane.
General Layout Considerations
Since the gain stages of the transimpedance
amplifier have an open loop bandwidth in excess
of 1.0 GHz, it is essential to maintain good high
frequency layout practices. To prevent oscillations,
a low inductance RF ground plane should be made
available for power supply bypassing. Traces that
can be made short should be made short, and
the utmost care should be taken to maintain very
low capacitance at the photodiode-TIA interface
(IIN), as excess capacitance at this node will
cause a degradation in bandwidth and sensitivity
(see Bandwidth vs. CT curves).
Figure 6: Bandwidth vs. Temperature
ATA01501
6
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
Note: All performance curves are typical @ TA =25 oC
unless otherwise noted.
(Refer to the equivalent circuit diagram.) Bonding
the detector cathode to I
IN
(and thus drawing current
from the ATA00501) improves the dynamic range.
Although the detector may be used in the reverse
direction for input currents not exceeding 25 mA, the
specifications for optical overload will not be met.
V
DD
= 5.5 V
V
DD
= 4.5 V
I
IN
(mA DC)
-2.1 -1.6 -1.1 -0.6 -0.1
25
22
19
16
13
10
7
4
1
T
r
a
n
s
i
m
peda
nc
e (
K
O
h
m
)
I
IN
50
I
IN
Connection
V
DD
= 4.5 V
V
DD
= 5.0 V
V
DD
= 5.5 V
210
200
190
180
170
160
150
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
B(3dB) A / 2
Rf (C
in
+C
t
)
C
T
(pF)
B
andwit
h (
M
Hz
)
Figure 7: Bandwidth vs. CT
V
DD
= 4.5 V
V
DD
= 5.5 V
50
I
IN
(mA DC)
I
IN
B
ANDW
ID
T
H

(
G
H
z
)
- 2.1 - 1.6 - 1.1 - 0.6 - 0.1
1.44
1.24
1.04
.84
.64
.44
.24
.04
R
f
Figure 8: Transimpedance vs. I
IN
Figure 9: Bandwidth vs. I
IN
V
OUT
Connection
The output pad should be connected via a coupling
capacitor to the next stage of the receiver channel
(filter or decision circuits), as the output buffers are
not designed to drive a DC coupled 50 ohm load
(this would require an output bias current of
approximately 36 mA to maintain a quiescent 1.8
Volts across the output load). If VOUT is connected
to a high input impedance decision circuit (>500
ohms), then a coupling capacitor may not be
required, although caution should be exercised since
DC offsets of the photo detector/TIA combination may
cause clipping of subsequent gain or decision
circuits.
V
DD
= 4.5 V
V
DD
= 5.5 V
Output Collapse
I
IN
v
OUT
Heavy AGC
Linear Region
(
o
3.4
3.2
3.0
2.9
2.7
2.5
2.4
2.2
2.0
1.9
1.7
1.5
1.4
1.2
1.0
0.8
0.7
0.5
0.3
0.2
0.0
R
f
-4 - 3 - 2 - 1
I
IN
(mA DC)
V
O
U
T

(
Volt
s
)
Figure 10: V
OUT
vs. I
IN
ATA01501
7
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
p
A
/
H
z
C
T
=1.0pF
CT
50
CT =0.5pF
14
10
6
2
- 0.1 1 10 100 1000
Frequency (MHz)
R
f
Sensitivity and Bandwidth
In order to guarantee sensitivity and bandwidth
performance, the TIA is subjected to a
comprehensive series of tests at the die sort level
(100% testing at 25 oC) to verify the DC parametric
performance and the high frequency performance
(i.e. adequate |S21|) of the amplifier. Acceptably high
|S21| of the internal gain stages will ensure low
amplifier input capacitance and hence low input
referred noise current. Transimpedance sensitivity
and bandwidth are then guaranteed by design and
correlation with RF and DC die sort test results.
The Input Noise Current is directly related to
sensitivity . It can be defined as the output noise
voltage (Vout), with no input signal, (including a 30
MHz lowpass filter at the output of the TIA) divided by
the AC transresistance.
Measurement of Input Referred Noise
Current
V
DD
= 5.5 V
V
DD
=
5.0V
V
DD
=
4.5V
1.9
1.85
1.8
1.75
1.7
1.65
1.6
1.55
1.5
- 40 10 60
Temperature
o
C
Input
O
f
f
set
V
o
l
t
age
Figure 11: Input Offset Voltage vs. Temperature
C
BY
Connection
The CBY pad must be connected via a low
inductance path to a surface mount capacitor of at
least 56pF (additional capacitance can be added in
parallel with the 56 pF or 220 pF capacitors to
improve low frequency response and noise
performance). Referring to the equivalent circuit
diagram and the typical bonding diagram, it is critical
that the connection from CBY to the bypass capacitor
use two bond wires for low inductance, since any
high frequency impedance at this node will be fed
back to the open loop amplifier with a resulting loss
of transimpedance bandwidth. Two pads are
provided for this purpose
Indirect Measurement of Optical Overload
Optical overload can be defined as the maximum
optical power above which the BER (bit error rate)
increases beyond 1 error in 1010 bits. The
ATA00501D1C is 100% tested at die sort by a DC
measurement which has excellent correlation with
an PRBS optical overload measurement. The mea-
surement consists of sinking a negative current
(see VOUT vs IIN figure) from the TIA and determin-
ing the point of output voltage collapse. Also the
input node virtual ground during heavy AGC is
checked to verify that the linearity (i.e. pulse width
distortion) of the amplifier has not been compro-
mised.
(dBm) = 10 LOG
6500
i
n
R
16
15
14
13
12
11
0.5pF
25dB
Temperature (
o
C)
TIA
100
MHz
LPF
V
DD =
4.5 V
V
DD
=5.5V
I
n
p
u
t
R
e
f
e
r
r
ed N
o
is
e
i
n
(nA
RM
S)
- 40 0 40 80
Input Referred Noise Test Circuit
Figure 12: Input Referred Noise Spectral Density
FIgure 13: Input Referred Noise vs Temperature
ATA01501
8
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
It is important to select an external AGC capacitor of
high quality and appropriate size. The ATA00501D1C
has an on-chip 70 KW resistor with a shunt 4 pF
capacitor to ground. Without external capacitance the
chip will provide an AGC time constant of 280 nS. For
the best performance in a typical 51MB/s SONET
receiver, a minimum AGC capacitor of 56pF is
recommended. This will provide the minimum amount
of protection against pattern sensitivity and pulse
width distortion on repetitive data sequences during
high average optical power conditions. Conservative
design practices should be followed when selecting
an AGC capacitor, since unit to unit variability of the
internal time constant and various data conditions
can lead to data errors if the chosen value is too small.
At frequencies below the 3dB bandwidth of the device,
the transimpedance phase response is characteristic
of a single pole transfer function (as shown in the
Phase vs Frequency curve). The output impedance is
essentially resistive up to 1000 MHz.
50 100 150
Frequency (MHz)
I
IN
0.5pF
00501
V
OUT
Deg
r
ees
180
200
220
240
AGC Capacitor
Phase Response
Figure 14: Phase (I
IN
to V
OUT
)
ATA01501
9
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
0.024 (.61)
0.018 (.46)
0.018 (.460)
0.012 (.300)
0.165 (4.19)
0.152 (3.86)
0.245 (6.22)
0.230 (5.84)
0.011 (.28)
0.007 (.18)
0.035 (.89)
0.020 (.51)
0.015 (.38)
0.000 (0.00)
0.032 BSC
(0.81)
4X 0.023X45
0.021X45
4 Sides
7
0
o
1
2
3
4
5
6
7
8
9
10
11
12
0.047 (1.19)
0.032 (0.81)
0.065 (1.65)
0.055 (1.40)
0.000 (0.00)
0.020 (.51)
PACKAGE OUTLINE
Figure 15: SQFP Package Outline
ATA01501
10
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
NOTES
ATA01501
11
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
NOTES
ATA01501
12
PRELIMINARY DATA SHEET - Rev 1.6
08/2001
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS
product in any such application without written consent is prohibited.
IMPORTANT NOTICE
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: Mktg@anadigics.com
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without
notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are
subject to change prior to a products formal introduction. Information in Data Sheets have been carefully checked and are
assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges
customers to verify that the information they are using is current before placing orders.
R
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ORDERING INFORMATION