4-Bit Micro-controller With LCD Driver
Features
Low power and low voltage operation
Powerful instruction set (150 instructions)
Memory capacity
Instruction ROM capacity 4096 x 16 bits
Index ROM capacity 256 x 8 bits
Internal RAM capacity 384 or 256 x 4 bits
Input/Output ports of up to 20 pins
8-level subroutine nesting
Built-in LCD driver, 8 x 42 = 336 segments
Built-in EL driver, frequency or melody generator
Built-in Resistance-to-Frequency Converter
Built-in 2-channel 6/8-bit PWM output
Built-in key strobe function
(Shared with segment pin)
Built-in voltage doubler, halver, tripler
quadrupler charge pump circuit
Two 6-bit programmable timers with
programmable clock source
Watchdog timer
4 external & 3 internal interrupt resources
External: INT, RFC, IOA/IOC/S port,
keystrobe
Internal: TM1, TM2, Predivider
Dual clock operation
HALT and STOP function
General Description
The
APU429 is an embedded high performance
4-bit micro-computer with an on-chip LCD driver. It
contains all the necessary functions in a single chip:
4-bit parallel processing ALU, ROM, RAM, I/O ports,
timer, clock generator, dual clock, RFC, EL-light,
LCD driver, look-up table, watchdog timer and
keyboard scanning. The instruction set includes not
only 4-bit operation and manipulation instructions
but also various conditional branch instructions and
LCD driver data transfer instructions which are
powerful and easy to use.
The HALT function stops any internal operations
other than the oscillator, divider and LCD driver in
order to minimize the power dissipation.
The STOP function stops all the clocks in the chip.
Block Diagram
Preliminary
1 Ver. 0.0
L C D D rive r
C O M 1 8
S E G 1 S E G 2 6
V D D 1 4
S e g m e n t P L A
4 -B it D a ta B u s
S R A M
1 2 8 x 4
A L U
2 x 6 B its
P re se t T im e r
In stru ctio n
D e co d e r
C o n tro l
C ircu it
M a sk R O M
4 0 9 6 x 1 6
8 -L e ve ls S ta ck
RE
S
E
T
IN
T
C U P 1
C U P 2
1 2 -B it P ro g ra m
C o u n te r
T a b le R O M
2 5 6 x 8
F re q u e n cy
G e n e ra to r
P re -D ivid e r
W a tch d o g
T im e r
O scilla to r
XT
I
N
XT
O
U
T
CF
I
N
CF
O
U
T
In d e x S R A M
2 5 6 x 4
C U P 3
S 1 S 4
IO D P o rt
/P W M
S E G 2 7 3 0
IO C P o rt
/K E Y IN
S E G 3 9 4 2
IO B P o rt
/E L , B Z
S E G 3 1 3 4
IO A P o rt
/R F C
S E G 3 5 3 8
Pad Assignment
Chip size : 2620 x 2050 m
Pad size : 100 x 100 m
Pad window : 90 x 90 m
Pad pitch : min. 120 m
20
30
40
50
60
70
1
10
Note: The substrate of die must connect to GND.
Pad Coordinates
Pad No.
Pad Name
X
Y
Pad No.
Pad Name
X
Y
1
CFIN
1971.50
2544.50
36
SEG13/KO3
75.25
75.25
2
CFOUT
1785.25
2544.50
37
SEG14/KO4
225.25
75.25
3
XTIN
1665.25
2544.50
38
SEG15/KO5
345.25
75.25
4
XTOUT
1545.25
2544.50
39
SEG16/KO6
465.25
75.25
5
BAK
1425.25
2544.50
40
SEG17/KO7
585.25
75.25
6
TESTA
1305.25
2544.50
41
SEG18/KO8
705.25
75.25
7
RESET
1185.25
2544.50
42
SEG19/KO9
825.25
75.25
8
INT
1065.25
2544.50
43
SEG20/KO10
945.25
75.25
9
S1
945.25
2544.50
44
SEG21/KO11
1065.25
75.25
10
S2
825.25
2544.50
45
SEG22/KO12
1185.25
75.25
11
S3
705.25
2544.50
46
SEG23/KO13
1305.25
75.25
Preliminary
2 Ver. 0.0
APU429
APU429
Pad No.
Pad Name
X
Y
Pad No.
Pad Name
X
Y
12
S4
585.25
2544.50
47
SEG24/KO14
1425.25
75.25
13
VDD1
465.25
2544.50
48
SEG25/KO15
1545.25
75.25
14
VDD2
345.25
2544.50
49
SEG26/KO16
1665.25
75.25
15
VDD3
225.25
2544.50
50
SEG27/IOD1
1785.25
75.25
16
VDD4
75.25
2544.50
51
SEG28/IOD2
1971.50
75.25
17
CUP1
75.25
2394.50
52
SEH29/IOD3/PWM1 1971.50
225.25
18
CUP2
75.25
2274.50
53
SEH30/IOD4/PWM2 1971.50
345.25
19
CUP3
75.25
2154.50
54
SEG31/IOB1/ELC
1971.50
465.25
20
COM1
75.25
2034.50
55
SEG32/IOB2/ELP
1971.50
585.25
21
COM2
75.25
1914.50
56
SEG33/IOB3/BZB
1971.50
705.25
22
COM3
75.25
1785.25
57
SEG34/IOB4/BZ
1971.50
825.25
23
COM4
75.25
1665.25
58
SEG35/IOA1/CX
1971.50
945.25
24
SEG1
75.25
1545.25
59
SEG36/IOA2/RR
1971.50
1065.25
25
SEG2
75.25
1425.25
60
SEG37/IOA3/RT
1971.50
1185.25
26
SEG3
75.25
1305.25
61
SEG38/IOA4/RH
1971.50
1305.25
27
SEG4
75.25
1185.25
62
SEG39/IOC1/KI1
1971.50
1425.25
28
SEG5
75.25
1065.25
63
SEG40/IOC2/KI2
1971.50
1545.25
29
SEG6
75.25
945.25
64
SEG41/IOC3/KI3
1971.50
1665.25
30
SEG7
75.25
825.25
65
SEG42/IOC4/KI4
1971.50
1785.25
31
SEG8
75.25
705.25
66
COM5
1971.50
1905.25
32
SEG9
75.25
585.25
67
COM6
1971.50
2034.50
33
SEG10
75.25
465.25
68
COM7
1971.50
2154.50
34
SEG11/KO1
75.25
345.25
69
COM8
1971.50
2274.50
35
SEG12/KO2
75.25
225.25
70
GND
1971.50
2394.50
Chip size : 2620 x 2050 m
Pad Descriptions
Pad Name
I/O
Description
BAK
Positive back-up voltage.
In Li mode, connects a 0.1 capacitance to GND.
VDD1
VDD2
VDD3
VDD4
LCD drive voltage and positive supply voltage.
While in Ag mode, connects +1.5V to VDD1.
While in Li/ExtV mode, connects +3.0V to VDD2.
RESET
I
Input pin for LSI reset signal.
With Internal pull-down resistor.
INT
I
Input pin for external INT request signal.
Falling edge or rising edge triggered by mask option.
Internal pull-down or pull-up resistor or floatting to be selected by mask option.
TESTA I Test signal input pin, internal pull-down resistor.
TESTA
I
Test signal input pin.
CUP1
CUP2
CUP3
O
Switching pins for supplying the LCD driving voltage to the VDD1, 2, 3, 4 pins.
Connects the CUP1, CUP2 and CUP3 pins with a nonpolarized electronic
capacitor if 1/2, 1/3 or 1/4 bias mode has been selected. In the STATIC mode,
these pins should be open.
Preliminary
3 Ver. 0.0
Pad Name
I/O
Description
XTIN
XTOUT
I
O
Time based counter frequency (Clock specified. LCD alternating frequency.
Alarm signal frequency.) or system clock oscillation.
32KHz crystal oscillator.
Oscillation stops at the execution of STOP instruction.
CFIN
CFOUT
I
O
System clock oscillation.
Connected with ceramic resonator.
Connected with RC oscillation circuit.
Oscillation stops at the execution of STOP or SLOW instruction.
COM1~8
O
Output pins for supplying voltage to drive the common pins of the LCD panel.
SEG1~10
O
Output pins for LCD panel segment.
SEG11~26/KO1~16
O
Output pins for LCD panel segment.
Key strobe function, share pins as key scan output.
SEG27~42
O
Output pins for LCD panel segment.
IOA1~4
I/O
Input/Output port A, can use software to define the internal pull-low resistor
and chattering clock in order to reduce input bounce and generate an
interrupt.
This port shares pins with SEG35~38 and is set by mask option.
This port also shares pins with CC, RR, RT and RH, and is set by mask option.
IOB1~4
I/O
Input/Output port B.
IOB port shares pins with SEG31~34, and is set by mask option.
This port also shares pins with ELC, ELP, BZB and BZ, and is set by mask
option.
IOC1~4
I/O
Input/Output port C, can use software to define internal pull-low/low-level hold
resistor and chattering clock in order to reduce input bounce and generate an
interrupt or keyboard scanning function with ELC, ELP, BZB and BZ, and is
set by mask option.
IOD1~4
I/O
Input/Output port D.
This port shares pins with SEG27~30 and is set by mask option.
IOD3, 4 shares pins with PWM1, 2 and is set by mask option.
S1~4
I
Input ports by mask option to internal pull-low/low-level hold resistor and
chattering clock in order to reduce input bounce and generate an interrupt or
HALT or STOP release.
KI1~4
I
Key scan input, this port shares pins with IOC1~4 and is set by mask option.
CC
RFC RR
RT
RH
I
O
O
O
1 input pin and 3 output pins for RFC application.
This port shares pins with SEG35~38 and is set by mask option.
This port shares pins with IOA1~4 and is set by mask option.
EL ELC
ELP
O
O
Output port for EL-light.
This port shares pins with SEG31, 32 and is set by mask option.
This port shares pins with IOB1, 2 and is set by mask option.
ALM BZB
BZ
O
Output port for alarm, frequency or melody generator.
This port shares pins with IOB3, 4 and is set by mask option.
PWM1, 2
O
6/8-Bit PWM output; set by mask option.
GND
Negative supply voltage.
Preliminary
4 Ver. 0.0
Absolute Maximum Rating
Ta = 0 to 70 GND=0V
Name
Symbol
Rating
Unit
V
DD1
-0.3 ~ +5.5
V
V
DD2
-0.3 ~ +5.5
V
V
DD3
-0.3 ~ +8.5
V
Maximum Supply Voltage
V
DD4
-0.3 ~ +8.5
V
Maximum Input Voltage
V
IN
-0.3 to V
DD1/2
+0.3
V
V
OUT1
-0.3 to V
DD1/2
+0.3
V
Maximum Output Voltage
V
OUT2
-0.3 to V
DD3
+0.3
V
Maximum Operating Temperature
t
OPG
0 to +70
Maximum Storage Temperature
t
STG
-25 to +125
Allowable operating conditions
Ta = 0 to 70 GND=0V
Name
Symbol
Condition
Min.
Max.
Unit
V
DD1
1.2
5.25
V
V
DD2
2.4
5.25
V
V
DD3
2.4
8.0
V
Supply Voltage
V
DD4
2.4
8.0
V
Oscillator Start-up Voltage
V
DDB
Crystal Mode
1.3
V
Oscillator Sustain Voltage
V
DDB
Crystal Mode
1.2
V
Supply Voltage
V
DD1
Ag Mode
1.2
1.65
V
Supply Voltage
V
DD2
EXT-V, Li Mode
2.4
5.25
V
Input H Voltage
V
IH1
Ag Battery Mode
V
DD1-0.7
V
DD1+0.7
V
Input L Voltage
V
IL1
-0.7
0.7
V
Input H Voltage
V
IH2
V
DD2-0.7
V
DD2+0.7
V
Input L Voltage
V
IL2
Li Battery Mode
-0.7
0.7
V
Input H Voltage
V
IH3
0.8V
DD1
V
DD1
V
Input L Voltage
V
IL3
OSCIN at Ag Battery Mode
0
0.2V
DD1
V
Input H Voltage
V
IH4
0.8V
DD2
V
DD2
V
Input L Voltage
V
IL4
OSCIN at Li Battery Mode
0
0.2V
DD2
V
Input H Voltage
V
IH5
0.8V
DD2
V
DD2
V
Input L Voltage
V
IL5
CFIN at Li Battery or EXT-V Mode
0
0.2V
DD2
V
Input H Voltage
V
IH6
0.8V
DDO
V
DDO
V
Input L Voltage
V
IL6
RC Mode
0
0.2V
DDO
V
f
OPG1
Crystal Mode
32
3580
kHz
f
OPG2
External RC Mode
32
1000
kHz
Operating Freq.
f
OPG3
CF Mode
1000
3580
kHz
Preliminary
5 Ver. 0.0
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