SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 3.1 12/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
CS
CS
CS
CS
\
GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS8S512K32 and
AS8S512K32A are 16 Megabit CMOS SRAM Modules organized as
512Kx32 bits. These devices achieve high speed access, low power
consumption and high reliability by employing advanced CMOS
memory technology.
This military temperature grade product is ideally suited for
military and space applications.
FEATURES
Operation with single 5V supply
High speed: 17, 20, 25 and 35ns
Built in decoupling caps for low noise
Organized as 512Kx32 , byte selectable
Low power CMOS
TTL Compatible Inputs and Outputs
Future offerings
3.3V Power Supply
15 ns Ultra High Speed
OPTIONS
MARKINGS
Operating Temperature Ranges
Military (-55
o
C to +125
o
C)
XT
Industrial (-40
o
C to +85
o
C)
IT
Timing
17ns
-17
20ns
-20
25ns
-25
35ns
-35
45ns
-45
55ns
-55
Package
Ceramic Quad Flatpack
Q
No.702
Pin Grid Array
P
No.904
Low Power Data Retention Mode
L
Pinout
Military
(no indicator)
Commercial
A
PIN ASSIGNMENT
(Top View)
AVAILABLE AS MILITARY
SPECIFICATIONS
SMD 5962-94611 (Military Pinout)
MIL-STD-883
68 Lead CQFP (Q)
Military SMD Pinout Option
512K x 32 SRAM
SRAM MEMORY ARRAY
For more products and information
please visit our web site at
www.austinsemiconductor.com
68 Lead CQFP
Commercial Pinout Option (A)
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
I/O17
I/O18
I/O19
Vss
I/O20
I/O21
I/O22
I/O23
Vcc
I/O24
I/O25
I/O26
I/O27
Vss
I/O28
I/O29
I/O30
I/O 14
I/O 13
I/O 12
Vss
I/O 11
I/O 10
I/O 9
I/O 8
Vcc
I/O 7
I/O 6
I/O 5
I/O 4
Vss
I/O 3
I/O 2
I/O 1
6 0
5 9
5 8
5 7
5 6
5 5
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
I/O 31
A6
A5
A4
A3
A2
A1
A0
Vcc
A13
A12
A11
A10
A9
A8
A7
I/O 0
I/O 16
A18
A17
CS4\
CS3\
CS2\
CS1\
NC
Vcc
NC
NC
OE\
WE\
A16
A15
A14
I/O 15
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
GND
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
6 0
5 9
5 8
5 7
5 6
5 5
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
Vcc
A11
A12
A13
A14
A15
A16
CS1\
OE\
CS2\
A17
WE2\
WE3\
WE4\
A18
NC
NC
NC
A0
A1
A2
A3
A4
A5
CS3\
GND
CS4\
WE1\
A6
A7
A8
A9
A10
Vcc
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
66 Lead PGA (P)
Military SMD Pinout
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 3.1 12/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
CS\4
CS\3
CS\2
CS\1
WE\
OE\
A0 - A18
I/O 24 - I/O 31
I/O 16 - I/O 23
I/O 8 - I/O 15
I/O 0 - I/O 7
M3
M2
M1
M0
512K x 8
512K x 8
512K x 8
512K x 8
COMMERCIAL PINOUT/BLOCK DIAGRAM
CS
MILITARY PINOUT/BLOCK DIAGRAM
CS
CS
CS
TRUTH TABLE
MODE
OE\
CE\
WE\
I/O
POWER
Read
L
L
H
D
OUT
ACTIVE
Write(2)
X
L
L
D
IN
ACTIVE
Standby
X
H
X
High Z
STANDBY
CS
CS4\
CS3\
CS2\
CS1\
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 3.1 12/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
ABSOLUTE MAXIMUM RATINGS*
Voltage of Vcc Supply Relative to Vss......................-.5V to +7V
Storage Temperature............................................-65C to +150C
Short Circuit Output Current(per I/O).................................20mA
Voltage on Any Pin Relative to Vss....................-.5V to Vcc+1V
Maximum Junction Temperature**...................................+150C
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation on the
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
**Junction temperature depends upon package type, cycle time,
loading, ambient temperature and airflow. See the Application
Information section at the end of this datasheet for more infor-
mation.
DESCRIPTION SYMBOL
-17
-20
-25
-35
-45
-55
UNITS NOTES
Power Supply
Current: Operating
Icc 700
650
600
570
570
550
mA
3,13
Power Supply
Current: Standby
I
SBT1
240 240
190
190
150
150
mA 3,
13
CMOS Standby
I
SBT2
80 80
80
80
80
80
mA
VIN = VCC - 0.2V, or
VSS +0.2V
VCC=Max; f = 0Hz
MAX
CONDITIONS
CS\<VIL; VCC = MAX
f = MAX = 1/ tRC (MIN)
Outputs Open
CS\>VIH; VCC = MAX
f = MAX = 1/ tRC (MIN)
Outputs Open
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55
o
C < T
A
< 125
o
C and -40
o
C to +85
o
C; Vcc = 5V +10%)
DESCRIPTION
CONDITIONS
SYMBOL
MIN
MAX
UNITS
NOTES
Input High (logic 1) Voltage
V
IH
2.2
V
CC
+.5
V
1
Input Low (logic 1) Voltage
V
IL
-0.5
0.8
V
1,2
Input Leakage Current
ADD,OE
I
LI1
-10
10
A
Input Leakage Current
WE, CE
I
LI2
-10
10
A
Output(s) Disabled
0V<V
OUT
<V
CC
Output High Voltage
I
OH
= 4.0mA
V
OH
2.4
V
1
Output Low Voltage
I
OL
= 8.0mA
V
OL
0.4
V
1
Supply Voltage
V
CC
4.5
5.5
V
1
0V<V
IN
<V
CC
Output Leakage Current
I/O
ILO
A
10
-10
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 3.1 12/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
AC TEST CONDITIONS
NOTE:
1. This parameter is sampled.
OH
OL
I
I
Current Source
Current Source
Vz = 1.5V
(Bipolar
Supply)
Device
Under
Test
Ceff = 50pf
-
+
+
NOTES:
Vz is programmable from -2V to + 7V.
I
OL
and I
OH
programmable from 0 to 16 mA.
Vz is typically the midpoint of V
OH
and V
OL
.
I
OL
and I
OH
are adjusted to simulate a typical resistive load
circuit.
Input pulse levels.........................................V
SS
to 3V
Input rise and fall times.........................................5ns
Input timing reference levels...............................1.5V
Output reference levels........................................1.5V
Output load..............................................See Figure 1
Test Specifications
SYMBOL
PARAMETER
MAX
UNITS
C
ADD
A0 - A18 Capacitance
50
pF
C
OE
OE\ Capacitance
50
pF
C
WE,
C
CS
WE\ and CS\ Capacitance
20
pF
C
IO
I/O 0- I/O 31 Capacitance
20
pF
C
WE
("A" version)
WE\ Capacitance
50
pF
CAPACITANCE (V
IN
= 0V, f = 1MHz, T
A
= 25
o
C
)1
Figure 1
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 3.1 12/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(NOTE 5) (-55
o
C<T
A
< 125
o
C and -40
o
C to +85
o
C; V
CC
= 5V +10%)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
READ cycle time
t
RC
17
20
25
35
45
55
ns
Address access time
t
AA
17
20
25
35
45
55
ns
Chip select access time
t
ACS
17
20
25
35
45
55
ns
Output hold from address change
t
OH
2
2
2
2
2
2
ns
Chip select to output in Low-Z
t
LZCS
2
2
2
2
2
2
ns
4,6,7
Chip select to output in High-Z
t
HZCS
9
10
12
15
20
20
ns
4,6,7
Output enable access time
t
AOE
9
10
12
15
20
20
ns
Output enable to output in Low-Z
t
LZOE
0
0
0
0
0
0
ns
4,6
Output disable to output in High-Z
t
HZOE
12
12
12
15
20
20
ns
4,6
WRITE cycle time
t
WC
17
20
25
35
45
55
ns
Chip select to end of write
t
CW
15
15
17
20
25
25
ns
Address valid to end of write
t
AW
15
15
17
20
25
25
ns
Address setup time
t
AS
2
2
2
2
2
2
ns
Address hold from end of write
t
AH
1
1
1
1
1
1
ns
WRITE pulse width
t
WP1
15
15
17
20
25
25
ns
WRITE pulse width
t
WP2
15
15
17
20
25
25
ns
Data setup time
t
DS
12
10
12
15
20
20
ns
Data hold time
t
DH
0
0
0
0
0
0
ns
Write disable to output in Low-z
t
LZWE
2
2
2
2
2
2
ns
4,6,7
Write enable to output in High-Z
t
HZWE
9
11
13
15
15
15
ns
4,6,7
-45
-55
WRITE CYCLE
READ CYCLE
DESCRIPTION
-20
-17
-25
SYMBOL
NOTES
UNITS
-35
PDF 
ZIP