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Электронный компонент: T5744

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Features
Minimal External Circuitry Requirements, no RF Components on the PC Board Except
Matching to the Receiver Antenna
High Sensitivity, Especially at Low Data Rates
SSO20 and SO20 package
Fully Integrated VCO
Supply Voltage 4.5 V to 5.5 V, Operating Temperature Range -40C to 105C
Single-ended RF Input for Easy Adaptation to l/4 Antenna or Printed Antenna on PCB
Low-cost Solution Due to High Integration Level
Various Types of Protocols Supported (i.e., PWM, Manchester and Biphase)
Distinguishes the Signal Strength of Several Transmitters via RSSI (Received Signal
Strength Indicator)
ESD Protection According to MIL-STD. 883 (4KV HBM)
High Image Frequency Suppression Due to 1 MHz IF in Conjunction with a SAW Front-
end Filter, up to 40 dB is thereby Achievable with Newer SAWs
Power Management (Polling) is Possible by Means of a Separate Pin via the
Microcontroller
Receiving Bandwidth BIF = 600 kHz
Description
The T5744 is a PLL receiver device for the receiving range of f
0
= 300 MHz to
450 MHz. It is developed for the demands of RF low-cost data communication sys-
tems with low data rates and fits for most types of modulation schemes including
Manchester, Biphase and most PWM protocols. Its main applications are in the areas
of telemetering, security technology and keyless-entry systems.
Figure 1. System Block Diagram
Demod.
IF Amp
LNA
VCO
PLL
XTO
Data
interface
T5744
1...3
C
Power
amp.
XTO
VCO
PLL
U2741B
Antenna Antenna
UHF ASK/FSK
Remote control transmitter
UHF ASK
Remote control receiver
Encoder
M44Cx9x
1 Li cell
Keys
UHF ASK
Receiver
T5744
Rev. 4521BRKE01/03
2
T5744
4521BRKE01/03
Pin Configuration
Figure 2. Pinning SO20 and SSO20
Pin Description
Pin
Symbol
Function
1
BR_0
Baud rate select LSB
2
BR_1
Baud rate select MSB
3
CDEM
Lower cut-off frequency data filter
4
AVCC
Analog power supply
5
AGND
Analog ground
6
DGND
Digital ground
7
MIXVCC
Power supply mixer
8
LNAGND
High-frequency ground LNA and mixer
9
LNA_IN
RF input
10
n.c.
Not connected
11
LFVCC
Power supply VCO
12
LF
Loop filter
13
LFGND
Ground VCO
14
XTO
Crystal oscillator
15
DVCC
Digital power supply
16
MODE
Selecting 433.92 MHz /315 MHz
Low: 315 MHz (USA)
High: 433.92 MHz (Europe)
17
RSSI
Output of the RSSI amplifier
18
TEST
Test pin, during operation at GND
19
ENABLE
Selecting operation mode
Low: sleep mode
High: receiving mode
20
DATA
Data output
1
2
3
4
5
6
7
8
10
9
19
18
17
16
14
15
13
12
11
20
AV
C
C
AG
N
D
DG
N
D
MIXVC
C
LN
A
G
ND
LN
A
_
I
N
BR_
1
CDE
M
R
SSI
MO
D
E
XT
O
LFG
N
D
LF
EN
ABL
E
T
EST
n.
c
.
LF
V
C
C
DA
T
A
DVC
C
BR
_
0
T5744
3
T5744
4521BRKE01/03
Figure 3. Block Diagram
RF Front End
The RF front end of the receiver is a heterodyne configuration that converts the input
signal into a 1-MHz IF signal. According to Figure 3, the front end consists of an LNA
(Low-Noise Amplifier), LO (Local Oscillator), a mixer and RF amplifier.
The LO generates the carrier frequency for the mixer via a PLL synthesizer. The XTO
(crystal oscillator) generates the reference frequency f
XTO
. The VCO (Voltage-Controlled
Oscillator) generates the drive voltage frequency f
LO
for the mixer. f
LO
is dependent on
the voltage at Pin LF. f
LO
is divided by factor 64. The divided frequency is compared to
f
XTO
by the phase frequency detector. The current output of the phase frequency detec-
tor is connected to a passive loop filter and thereby generates the control voltage VLF
for the VCO. By means of that configuration, VLF is controlled in a way that f
LO
/64 is
equal to f
XTO
. If f
LO
is determined, f
XTO
can be calculated using the following formula:
f
XTO
= f
LO
/64
The XTO is a one-pin oscillator that operates at the series resonance of the quartz crys-
tal. According to Figure 4, the crystal should be connected to GND via a capacitor CL.
The value of that capacitor is recommended by the crystal supplier. The value of CL
should be optimized for the individual board layout to achieve the exact value of f
XTO
and
hereby of f
LO
. When designing the system in terms of receiving bandwidth, the accuracy
of the crystal and the XTO must be considered.
ASK-
Demodulator
and data filter
RSSI IF Amp
IF Amp
4. Order
LPF
3 MHz
LPF
3 MHz
Dem_out
RSSI
Standby logic
VCO
XTO
64
f
CDEM
AVCC
RSSI
AGND
DGND
MIXVCC
LNAGND
LNA_IN
DATA
ENABLE
TEST
MODE
LFGND
LFVCC
XTO
LF
DVCC
LNA
Data interface
Test
BR_0
BR_1
4
T5744
4521BRKE01/03
Figure 4. PLL Peripherals
The passive loop filter connected to Pin LF is designed for a loop bandwidth of BLoop =
100 kHz. This value for BLoop exhibits the best possible noise performance of the LO.
Figure 4 shows the appropriate loop filter components to achieve the desired loop
bandwidth
f
LO
is determined by the RF input frequency f
RF
and the IF frequency f
IF
using the follow-
ing formula:
f
LO
= f
RF
- f
IF
To determine f
LO
, the construction of the IF filter must be considered at this point. The
nominal IF frequency is f
IF
= 1 MHz. To achieve a good accuracy of the filter's corner fre-
quencies, the filter is tuned by the crystal frequency f
XTO
. This means that there is a
fixed relation between f
IF
and f
LO
that depends on the logic level at pin mode. This is
described by the following formulas:
MODE = 0 USA f
IF
= f
LO
/314
MODE = 1 Europe f
IF
= f
LO
/432.92
The relation is designed to achieve the nominal IF frequency of f
IF
= 1 MHz for most
applications. For applications where f
RF
= 315 MHz, MODE must be set to '0'. In the
case of f
RF
= 433.92 MHz, MODE must be set to '1'. For other RF frequencies, f
IF
is
not equal to 1 MHz. f
IF
is then dependent on the logical level at Pin MODE and on f
RF
.
Table 1 summarizes the different conditions.
The RF input either from an antenna or from a generator must be transformed to the RF
input Pin LNA_IN. The input impedance of that pin is provided in the electrical parame-
ters. The parasitic board inductances and capacitances also influence the input
matching. The RF receiver T5744 exhibits its highest sensitivity at the best signal-to-
noise ratio in the LNA. Hence, noise matching is the best choice for designing the trans-
formation network.
A good practice when designing the network, is to start with power matching. From that
starting point, the values of the components can be varied to some extent to achieve the
best sensitivity.
If a SAW is implemented into the input network a mirror frequency suppression of
D
P
Ref
= 40 dB can be achieved. There are SAWs available that exhibit a notch at
D
f = 2 MHz. These SAWs work best for an intermediate frequency of IF = 1 MHz. The
selectivity of the receiver is also improved by using a SAW. In typical automotive appli-
cations, a SAW is used.
DVCC
XTO
LF
LFVCC
LFGND
V
C
C10
R1
C9
S
L
V
S
R1 = 820
W
C9 = 4.7 nF
C10 = 1 nF
5
T5744
4521BRKE01/03
Figure 5 shows a typical input matching network for f
RF
= 315 MHz and f
RF
=
433.92 MHz using a SAW. Figure 6 illustrates the input matching to 50
W
without a
SAW. The input matching networks shown in Figure 6 are the reference networks for the
parameters given in the electrical characteristics.
Table 1. Calculation of LO and IF Frequency
Figure 5. Input Matching Network with SAW Filter
Conditions
Local Oscillator Frequency
Intermediate Frequency
f
RF
= 315 MHz, MODE = 0
f
LO
= 314 MHz
f
IF
= 1 MHz
f
RF
= 433.92 MHz, MODE = 1
f
LO
= 432.92 MHz
f
IF
= 1 MHz
300 MHz < f
RF
< 365 MHz, MODE = 0
365 MHz < f
RF
< 450 MHz, MODE = 1
f
LO
f
RF
1
1
314
----------
+
-------------------
=
f
IF
f
LO
314
----------
=
f
LO
f
RF
1
1
432.92
------------------
+
----------------------------
=
f
IF
f
LO
432.92
------------------
=
IN
IN_GND
OUT
OUT_GND
CASE_GND
B3555
T5744
C3
22p
L
25n
C16
100p
C17
8.2p
L3
TOKO LL2012
F27NJ
27n
C2
8.2p
L2
TOKO LL2012
F33NJ
33n
1
2
3,4 7,8
5
6
8
9
RF
IN
f
RF
= 433.92 MHz
LNAGND
LNA_IN
IN
IN_GND
OUT
OUT_GND
CASE_GND
B3551
T5744
C3
47p
L
25n
C16
100p
C17
22p
L3
TOKO LL2012
F47NJ
47n
C2
10p
L2
TOKO LL2012
F82NJ
82n
1
2
3,4 7,8
5
6
8
9
f
RF
= 315 MHz
LNAGND
LNA_IN
RF
IN