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Электронный компонент: P35-5112-000-200

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Data
sheet
www.bookham.com
Thinking RF solutions
HEMT MMIC LNA
8.5 10.5GHz
The P35-5112-000-200 is an 8.5 10.5GHz Gallium
Arsenide low noise amplifier. This product is intended for
use in a wide range of applications including
telecommunications, instrumentation and electronic warfare.
The die is fabricated using Bookham Technology's 0.20m
gate length, pHEMT process and is fully protected using
Silicon Nitride passivation for excellent performance and
reliability.
Features
19dB Gain Typical
1dB Noise Figure
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Parameter Conditions
Min
Typ
Max
Units
Small Signal Gain
8.5-10.5GHz
-
18
-
dB
Input Return Loss
8.5-10.5GHz
-
10
-
dB
Output Return Loss
8.5-10.5GHz
-
16
-
dB
Noise Figure
8.5-10.5GHz
-
1.0
-
dB
Supply current,
Idd By Adjustment of Vg1/Vg2
-
32
-
mA
Electrical Performance
Ambient Temperature = 223 C, Zo = 50
, Vd = 2V, Vg1 set for Id1=12mA, Vg2 set for Id2 = 20mA
0
5
10
15
20
25
30
35
40
10
11
12
7
8
9
Frequency (GHz)
Return Loss (dB)
P35-5112-000-200
Output Return Loss (dB)
Notes
1. All parameters measured on wafer
Typical RFOW Performance ( ----- With Bondwires ) (Id1,Id2) (20mA, 35mA) (12mA, 20mA)
0
5
10
15
20
10
11
12
7
8
9
Frequency (GHz)
Return Loss (dB)
0
5
10
15
20
25
30
10
7
8
9
11
12
Frequency (GHz)
Gain (dB)
0
0.25
0.5
0.75
1
1.25
1.5
7
8
9
10
11
Frequency (GHz)
Noise Figure (dB)
Gain
0
10
20
30
40
50
60
9
7
8
10
11
12
Frequency (GHz)
Isolation (dB)
Reverse
Noise Figure
Input Return Loss (dB)
Thinking RF solutions
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P35-5112-000-200
Frequency S11
S21
S12
S22
(GHz) Mag
Angle Mag Angle Mag
Angle Mag
Angle
7 0.44
-78.9
9.59
-75.7
0.0063
109.8
0.18
176.4
7.2 0.41
-89.2
9.55
-86.8
0.0066
100.8
0.17
177.4
7.4 0.38
-98.7
9.51
-97.2
0.0069
92.3
0.16
178.3
7.6 0.35
-106.7
9.41
-107.2
0.0072
84.2
0.15
179.7
7.8 0.33
-113.9
9.31
-116.8
0.0075
76.6
0.15
-178.8
8 0.30
-120.3
9.23
-126
0.0078
69.6
0.14
-177.3
8.2 0.28
-125.9
9.15
-135
0.008
62.4
0.14
-175.6
8.4 0.27
-130.1
9.06
-143.8
0.0083
56.1
0.13
-174.1
8.6 0.26
-133.4
8.97
-152.3
0.0085
48.7
0.13
-172.5
8.8 0.25
-135.6
8.89
-160.7
0.0087
41.8
0.13
-171.6
9 0.24
-137.2
8.82
-169
0.0091
36
0.12
-170.8
9.2 0.23
-137.6
8.75
-177.2
0.0094
29.3
0.12
-170.2
9.4 0.23
-138.2
8.69
174.5
0.0097
24.2
0.11
-170
9.6 0.23
-138.3
8.62
166.3
0.01
17.2
0.11
-170.2
9.8 0.24
-138.1
8.55
158
0.0103
11.1
0.10
-170.6
10 0.25
-137.7
8.47
149.8
0.0107
5
0.09
-171.3
10.2 0.26
-138.4
8.38
141.5
0.0109
-2 0.08
-172.3
10.4 0.28
-139.8
8.29
133.1
0.0112
-7.7
0.07
-172.6
10.6 0.30
-141.5
8.17
124.7
0.0114
-14.9
0.05
-170.5
10.8 0.32
-143.9
8.03
116.3
0.0118
-21.2
0.03
-164.7
11 0.35
-147.2
7.89
107.9
0.012
-27.9
0.02
-137.2
11.2 0.37
-150.4
7.68
99.3
0.0121
-35
0.02
-68.7
11.4 0.40
-153.8
7.50 91
0.0122
-41.4
0.04
-47.8
11.6 0.42
-157.9
7.28
82.6
0.0123
-48
0.07
-43.7
11.8 0.44
-162.6
7.05
74.1
0.0122
-55.1
0.10
-44.2
12 0.47
-167.3
6.79
65.7
0.0123
-61.6
0.14
-46.4
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Chip Outline
Pad Details
P35-5112-000-200
Die size:
2.17 x 1.02mm
RF bond pads (1 & 7): 120m x 80m
All other bond pads:
80m x 80m
Die Thickness:
100m
Pad Function
1 RF
Input
2 Vg1
3 Vd1
4 Vg2
5 Vd2
6 N/C
7 RF
Output
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Handling and Assembly Information
Gallium Arsenide (GaAs) devices are susceptible to electrostatic and mechanical damage. Dice are supplied in
antistatic containers, which should be opened in cleanroom conditions at an appropriately grounded anti-static
workstation. Devices need careful handling using correctly designed collets, vacuum pickups or, with care, sharp
tweezers.
GaAs Products from Bookham Technology's pHEMT Foundry process are 100m thick and have through GaAs
vias to enable grounding to the circuit. Windows in the surface passivation above the bond pads are provided to
allow wire bonding to the die.
The surface to which the die are to be attached should be cleaned with a proprietary de-greasing cleaner.
Conductive epoxy mounting is recommended. Recommended epoxies are Ablestick 84-1LMI or 84-1LMIT cured
at 150C for 1 hour in a nitrogen atmosphere. The epoxy should be applied sparingly to avoid encroachment of
the epoxy on to the top surface of the die. An epoxy fillet should be visible around the total die periphery.
Eutectic mounting should be used and entails the use of a gold-tin (AuSn) preform, approximately 0.001 thick,
placed between the die and the attachment surface. The preferred method of mounting is the use of a machine
such as a Mullins 8-140 die bonder. This utilises a heated collet and workstation with a facility for applying a
scrubbing action to ensure total wetting and avoid the formation of voids. Dry nitrogen gas is directed across the
work piece.
The gold-tin eutectic (80% Au 20% Sn) has a melting point of approximately 280C (Note: Gold Germanium with
a higher melting temperature should be avoided, in particular for MMICs). The work station temperature should be
310C 10C. The collet should be heated, and the die pre-heated to avoid excessive thermal shock. The
strength of the bonding formed by this method will result in fracture of the die, rather than the bond under die
strength testing.
The P35-5112-000-200 amplifier die has gold bond pads. The recommended wire bonding procedure uses 25m
(0.001") 99.99% pure gold wire with 0.5-2% elongation. Thermo-compression wedge bonding is preferred though
thermosonic wire bonding may be used providing the ultrasonic content of the bond is minimised. A work station
temperature of 260C 10C with a wedge tip temperature of 120C 10C is recommended. The wedge force
should be 45 5 grams. Bonds should be made from the bond pads on the die to the package or substrate.
The RF bond pads at the input and output are 120m x 80m; all other bond pads are 120m x 120m.
The P35-5112-000-200 has been designed to include the inductance of a single 25m bond wire at both the input
and output, facilitating the integration of the die into a 50
environment, these should be kept to a minimum
length.
Operating and Biasing of the P35-5112-000-200
The P35-5112-000-200 is a two-stage low noise amplifier. The drain biases for both stages (Vd1 & Vd2) are
accessible and should be set to 2 volts. The gate voltages (Vg1 & Vg2) are set to give 12mA of drain current in the
first stage and 20mA in the second stage drain. The separate drain and gate voltage supplies for both stages can
be combined into single supplies (Vdd & Vgg). As with most GaAs devices gate voltages should be applied before
connecting the drain supply. DC bias supplies should be decoupled to ground using 100pF chip capacitors
placed close to the chip with short bondwires to the amplifier bond pads.
P35-5112-000-200
P35-5112-000-200