MAY 2004 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089HDM Overvoltage Protector
TISP61089HDM
DUAL FORWARD-CONDUCTING P-GATE THYRISTOR
PROGRAMMABLE OVERVOLTAGE PROTECTOR
Device Symbol
Intended for Use in GR-1089-CORE Issue 3 Compliant
Line Cards
Dual, Voltage-Programmable SLIC Protector
Low 15 mA max. Gate Triggering Current
Supports Battery Voltages Down to -155 V
High 150 mA min. Holding Current
Rated for GR-1089-CORE Issue 3 Conditions
How To Order
8-SOIC (210 mil) Package (Top View)
Description
The TISP61089HDM is a dual forward-conducting buffered p-gate thyristor (SCR) overvoltage protector. It is designed to protect monolithic
SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction.
The TISP61089HDM limits voltages that exceed the SLIC supply rail voltage. The TISP61089HDM parameters are specified to allow
equipment compliance with Telcordia GR-1089-CORE, Issue 3 and ITU-T recommendations K.20, K.21 and K.45.
The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of -20 V to -155 V. The protector gate is
connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. The protection voltage will
then track the negative supply voltage and the overvoltage stress on the SLIC is minimized.
Impulse Waveshape
GR-1089-CORE Test
I
PPSM
A
Section
Test #
2/10
4.6.7
4.6.8
4
1
500
10/1000
4.6.7
4.6.7.1
1, 3
1
100
Meets GR-1089-CORE First Level A.C. Power Fault Conditions
GR-1089-CORE
Section 4.6.10
Test #
I RMS
Power Fault Duration
A
s
1
0.33
900
2
0.17
900
3
1
1
4
1
1
6
0.5
30
7
2.2
2
8
3
1.1
9
5
0.4
GR-1089-CORE Second Level A.C. Power Fault Conditions are
Detailed in the `Applications Information' Section
MD-8SOIC(210)-001-b
NC - No internal connection
Terminal typical application names shown in
parenthesis
1
2
3
4
5
6
7
8
K1
A
A
K2
G
K1
K2
NC
(Tip)
(Ground)
(Ground)
(Ring)
(Gate)
(Tip)
(Ring)
SD-TISP6-001-a
G
K1
K2
K1
K2
A
A
The negative protection voltage is
controlled by the voltage, V
GG
,
applied to the G terminal.
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
............................................... UL Recognized Component
Device
Package
Carrier
Marking Code
Standard Quantity
TISP61089HDM
8-SOIC (210 mil)
Embossed Tape Reeled
TISP61089HDMR-S
61089H
2000
For Lead Free
Termination Finish
Order As
*RoHS COMPLIANT
MAY 2004 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Absolute Maximum Ratings, TA = 25 C (Unless Otherwise Noted)
TISP61089HDM Overvoltage Protector
Electrical Characteristics, TA = 25 C (Unless Otherwise Noted)
Description (Continued)
Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC
negative supply rail value. If sufficient current is available from the overvoltage, then the protector SCR will switch into a low voltage on-state
condition. As the overvoltage subsides the high holding current of TISP61089HDM SCR prevents d.c. latchup.
The TISP61089HDM is designed to be used with a pair of Bourns
B1250T fuses for overcurrent protection. Level 2 power fault compliance
requires the series overcurrent element to become open-circuit or high impedance. For equipment compliant to ITU-T recommendations K.20,
K.21 or K.45 only, the series resistor value is set by the coordination requirements. For coordination with a 400 V limit GDT, a minimum series
resistor value of 6.5 is recommended.
Rating
Symbol
Value
Unit
Repetitive peak off-state voltage, V
GK
= 0
V
DRM
-170
V
Repetitive peak gate-cathode voltage, V
KA
= 0
V
GKRM
-167
V
Non-repetitive peak impulse current (see Notes 1, 2 and 3)
I
PPSM
100
150
100
500
500
A
10/1000 s (Telcordia GR-1089-CORE, Issue 3)
5/310 s (ITU-T K.20, K.21 & K.45, K.44 open-circuit voltage wave shape 10/700 s)
10/360 s (Telcordia GR-1089-CORE, Issue 3)
1.2/50 s voltage waveshape (Telcordia GR-1089-CORE, Issue 3), including 3 non-inductive resistor
2/10 s (Telcordia GR-1089-CORE, Issue 3)
Non-repetitive peak on-state current, 50 Hz / 60 Hz (see Notes 1, 2, 3 and 4)
I
TSM
7.7
6.1
4.8
3.7
2.8
2.6
A
0.5 s
1 s
2 s
5 s
30 s
900 s
Junction temperature
T
J
-40 to +150
C
Storage temperature range
T
stg
-65 to +150
C
NOTES: 1. Initially the device must be in thermal equilibrium with T
J
= 25 C. The surge may be repeated after the device returns to its initial
conditions.
2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both
terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the
rated current value of an individual terminal pair). Ratings are obtained by using the gate circuitr y as shown in Fig. 3.
3. Rated currents only apply if pins 1 & 8 (T ip) are connected together, pins 4 & 5 (Ring) are connected together and pins 6 & 7
(Anode) are connected together.
4. EIA/JESD51-2 environment and EIA/JESD51-7 high effective thermal conductivity test board (multi-layer) connected with 0.6 mm
printed wiring track widths.
Parameter
Test Conditions
Min Typ Max Unit
I
D
Off-state current
V
D
= V
DRM
, V
GK
= 0
T
A
= 25 C
T
A
= 85 C
-5
-50
A
V
GK(BO)
Gate-cathode impulse breakover voltage
10/1000 s, I
TM
= 100 A, V
GG
= -100 V
5/310 s, I
TM
= 150 A, V
GG
= -100 V
2/10 s, I
TM
= 200 A, V
GG
= -100 V (see Note 5)
12
12
20
V
V
F
Forward voltage
I
F
= 5 A, t
W
= 200 s
3
V
V
FRM
Peak forward recovery voltage
10/1000 s, I
F
= 100 A, V
GG
= -100 V
5/310 s, I
F
= 150 A, V
GG
= -100 V
2/10 s, I
F
= 200 A, V
GG
= -100 V (see Note 5)
6
7
10
V
MAY 2004 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Thermal Characteristics, TA = 25 C (Unless Otherwise Noted)
Parameter Measurement Information
TISP61089HDM Overvoltage Protector
Electrical Characteristics, TA = 25 C (Unless Otherwise Noted) (Continued)
I
H
Holding current
I
T
= -1 A, di/dt = 1 A/ms, V
GG
= -100 V
-150
mA
I
GKS
Gate reverse current
V
GG
= V
GK
= V
GKRM
, V
KA
= 0
T
A
= 25 C
T
A
= 85 C
-5
-50
A
I
GT
Gate trigger current
I
T
= -3 A, t
p(g)
20 s, V
GG
= -100 V
15
mA
V
GT
Gate-cathode trigger voltage
I
T
= -3 A, t
p(g)
20 s, V
GG
= -100 V
2.5
V
C
KA
Cathode-anode off-state capacitance
f = 1 MHz, V
d
= 1 V rms, V
D
= -50 V, I
G
= 0
40
pF
NOTE:
5. Voltage measurements should be made with an oscilloscope with limited bandwidth (20 MHz) to avoid high frequency noise.
Parameter
Test Conditions
Min Typ Max Unit
Parameter
Test Conditions
Min Typ Max
Unit
R
JA
Junction to ambient thermal resistance
EIA/JESD51-7 PCB, EIA/JESD51-2 Environment, P
TOT
= 4 W
(See Note 6)
55
C/W
NOTE
6. EIA/JESD51-7 high effective thermal conductivity test board (multi-layer) connected with 0.6 mm printed wiring track widths.
Figure 1. Voltage-Current Characteristic
Unless Otherwise Noted, All Voltages are Referenced to the Anode
-v
I
S
V
S
V
GG
V
D
I
H
I
T
V
T
I
TSM
I
PPSM
V
(BO)
I
(BO)
I
D
Quadrant I
Forward
Conduction
Characteristic
+v
+i
I
F
V
F
I
FSM
(= |I
TSM
|)
I
PPSM
-i
Quadrant III
Switching
Characteristic
V
GK(BO)
PM-TISP6-001-a
MAY 2004 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089HDM Overvoltage Protector
Thermal Information
Figure 2.
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
t - Current Duration - s
0.1
1
10
100
1000
I
TS
M(t
)
-
Non-Repetitive Peak On-State Current - A
1.5
2
3
4
5
6
7
8
9
15
1
10
TI-TISP6-001-a
V
GEN
= 600 Vrms, 50/60 Hz
R
GEN
= 1.4 x V
GEN
/I
TSM(t)
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-7 PCB, T
A
= 25 C
SIMULTANEOUS OPERATION
OF R AND T TERMINALS.
MAY 2004 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089HDM Overvoltage Protector
APPLICATIONS INFORMATION
Figure 3. Line Protection with TISP61089HDM
SLIC
-V
BAT
SLIC
PROTECTOR
TISP
61089HDM
C1
220 nF
AI-TISP6-001-a
1.0
F1b
B1250T
F1a
B1250T
Tip
Ring
D1
Fuse
1.0 k
D2
Figure 3 illustrates how a typical SLIC protection circuit may look for a TISP61089HDM and a pair of Bourns
Telefuse
TM
overcurrent
protectors. This is a generic circuit that is designed to withstand both lightning surge testing and AC power fault testing. As applications can
differ, it is recommended you contact your Bourns representative for detailed applications guidance on your specific design.
MAY 2004 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
APPLICATIONS INFORMATION (Continued)
TISP61089HDM Overvoltage Protector
Figure 4.
Figure 5.
PEAK AC
vs
CURRENT DURATION
t - Current Duration - s
0.1
1
10
100
1000
Pea
k
5
0
Hz
/ 60
Hz C
u
rr
e
n
t
-
A
0.15
0.2
0.3
0.4
0.5
0.6
0.7
1.5
2
3
4
5
6
7
15
1
10
AI-TISP6-002-a
TISP61089HDM I
TSM
GR-1089 First Level Tests
TYPICAL TIME TO OPEN
vs
CURRENT
t - Current Duration - s
0.01
0.1
1
10
100
1000
RMS
Curre
n
t
- A
2
3
4
5
6
7
8
20
30
40
50
60
1
10
AI-TISP6-003-a
B1250T
TISP61089HDM
GR-1089-CORE Issue A.C. Power Fault testing has been comprehended in the design of the TISP61089HDM. For compliance, circuit designs
must pass both First Level and Second Level A.C. Power Fault testing.
First Level Power Fault testing requires that the equipment shall not be damaged and continues to operate correctly without disruption to
other parts of the system. In laboratory tests it has been shown that the circuit shown in Figure 3 can pass these tests without damage.
Figure 4 shows the TISP61089HDM I
TSM
rating to be above the level of GR-1089-CORE First Level tests.
Second Level Power Fault testing may result in the equipment becoming non-operational, but any component failure should not allow the
equipment to become a hazard. The system should not burn, fragment, or become an electrical safety hazard. The test data in Figure 5
illustrates that the TISP61089HDM and the B1250T are current coordinated, as the fuse interrupt time is shorter than the time it takes to
damage the TISP61089HDM package for a given current.
Bourns Sales Offices
Region
Phone
Fax
The Americas:
+1-951-781-5500
+1-951-781-5700
Europe:
+41-41-7685555
+41-41-7685510
Asia-Pacific:
+886-2-25624117
+886-2-25624116
Technical Assistance
Region
Phone
Fax
The Americas:
+1-951-781-5500
+1-951-781-5700
Europe:
+41-41-7685555
+41-41-7685510
Asia-Pacific:
+886-2-25624117
+886-2-25624116
www.bourns.com
Bourns
products are available through an extensive network of manufacturer's representatives, agents and distributors.
To obtain technical applications assistance, a quotation, or to place an order, contact a Bourns representative in your area.
"TISP" is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
"Bourns" is a registered trademark of Bourns, Inc. in the U.S. and other countries.
COPYRIGHT 2004, BOURNS, INC. LITHO IN U.S.A. e 10/04/TSP0409
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