MARCH 2002 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
TISP6NTP2C
QUAD FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
Description
Independent Tracking Overvoltage Protection for Two SLICs:
- Dual Voltage-Programmable Protectors
- Supports Battery Voltages Down to -155 V
- Low 5 mA max. Gate Triggering Current
- High 150 mA min. (70
C) Holding Current
- Specified 2/10 Limiting Voltage
- Small Outline Surface Mount Package
- Full 0
C to 70
C Temperature Range
Rated for Common Impulse Waveforms
How to Order
Device Symbol
D Package (Top View)
Voltage Impulse
Wave Shape
Current Impulse
Wave Shape
I
PPSM
A
10/1000
10/1000
25
10/700
5/310
40
2/10
2/10
90
Typical TISP6NTP2C Router Application
PROCESSOR
SLIC 1
SLIC 2
TRANSCEIVER
TRANSCEIVER
TISP6-
NTP2C
POTS 2
POTS 1
TERMINAL ADAPTOR
LINE
LAN
AI6NTP2C
The TISP6NTP2C has been designed for short loop systems such as:
WILL (Wireless In the Local Loop)
SOHO (Small Office Home Office)
FITL (Fibre In The Loop)
ISDN-TA (Integrated Services Digital Network - Terminal Adaptors)
DAML (Digital Added Main Line, Pair Gain)
MDRXAN
1
2
3
4
5
6
7
8
K2
A
A
K4
G1,G2
K1
K3
G3,G4
SDRXAIA
K1
K3
K4
K2
G3,G4
A
A
G1,G2
............................................ UL Recognized Components
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
Device
Package
Carrier
TISP6NTP2C
D (8-pin Small-Outline)
R (Embossed Tape Reeled)
TISP6NTP2CDR
- (Tube)
TISP6NTP2CD
TISP6NTP2CDR-S
TISP6NTP2CD-S
For Standard
Termination Finish
Order As
For Lead Free
Termination Finish
Order As
*R
oH
S C
OM
PL
IA
NT
VE
RS
IO
NS
AV
AI
LA
BL
E
MARCH 2002 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Description (Continued)
TISP6NTP2C High Voltage Ringing SLIC Protector
Recommended Operating Conditions
Absolute Maximum Ratings, 0 C TJ 70 C (Unless Otherwise Noted)
The systems described often have the need to source two POTS (Plain Old Telephone Service) lines, one for a telephone and the other for a
facsimile machine. In a single surface mount package, the TISP6NTP2C protects the two POTS line SLICs (Subscriber Line Interface Circuits)
against overvoltages caused by lightning, a.c. power contact and induction.
The TISP6NTP2C has an array of four buffered P-gate forward conducting thyristors with twin commoned gates and a common anode
connection. Each thyristor cathode has a separate terminal connection. An antiparallel anode-cathode diode is connected across each
thyristor. The buffer transistors reduce the gate supply current.
In use, the cathodes of an TISP6NTP2C thyristors are connected to the four conductors of two POTS lines (see applications information).
Each gate is connected to the appropriate negative voltage battery feed of the SLIC driving that line pair. By having separate gates, each SLIC
can be protected at a voltage level related to the negative supply voltage of that individual SLIC. The anode of the TISP6NTP2C is connected
to the SLIC common. The TISP6NTP2C voltage and current ratings also make it suitable for the protection of ISDN d.c. feeds of down to
-115 V (ETSI Technical Report ETR 080:1993, ranges 1 to 5).
Positive overvoltages are clipped to common by forward conduction of the TISP6NTP2C antiparallel diode. Negative overvoltages are initially
clipped close to the SLIC negative supply by emitter follower action of the TISP6NTP2C buffer transistor. If sufficient clipping current flows,
the TISP6NTP2C thyristor will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the high holding
current of the TISP6NTP2C prevents d.c. latchup.
Component
Min
Typ
Max
Unit
C
G
Gate decoupling capacitor
100
220
nF
R
S
Series resistor for GR-1089-CORE intra-building surge survival, section 4.5.9, tests 1 and 2
5
50
Series resistor for K.20, K.21 and K.45 coordination with a 400 V primary protector
10
50
Rating
Symbol
Value
Unit
Repetitive peak off-state voltage, V
GK
= 0
V
DRM
-170
V
Repetitive peak gate-cathode voltage, V
KA
= 0
V
GKRM
-167
V
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
I
PPSM
A
10/1000 (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
5/320 (ITU-T K.20, K.21& K.45, K.44 open-circuit voltage wave shape 10/700)
2/10 (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
25
40
90
Non-repetitive peak on-state current, 50 Hz/60 Hz (see Notes 1 and 2)
I
TSM
A
0.1 s
7
1 s
5 s
300 s
900 s
2.7
1.5
0.45
0.43
Non-repetitive peak gate current, 1/2
s pulse, cathodes commoned (see Note 1)
I
GSM
+25
A
Operating free-air temperature range
T
A
-40 to +85
C
Junction temperature
T
J
-40 to +150
C
Storage temperature range
T
stg
-40 to +150
C
NOTES: 1. Initially, the protector must be in thermal equilibrium. The surge may be repeated after the device returns to its initial conditions.
Gate voltage range is -20 V to -155 V.
2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied to any cathode-
anode terminal pair. Additionally, all cathode-anode terminal pairs may have their rated current values applied simultaneously (in
this case the anode terminal current will be four times the rated current value of an individual terminal pair).
MARCH 2002 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
Electrical Characteristics, 0 C TJ 70 C (Unless Otherwise Noted)
Thermal Characteristics
Parameter
Test Conditions
Min
Typ
Max
Unit
I
D
Off-state current
V
D
= V
DRM
, V
GK
= 0
T
J
= 25
C
-5
A
-50
A
V
(BO)
Ramp breakover
voltage
UL 497B, dv/dt
100 V/
s, di/dt =
10 A/
s,
V
GG
= -100 V, Maximum ramp value =
10 A
T
J
= 25
C
-112
V
V
(BO)
Impulse breakover
voltage
2/10
s, I
TM
= -27 A, di/dt = -27 A/
s, R
S
= 50
, V
GG
= -100 V,
(see Note 3)
-115
V
V
GK(BO)
Gate-cathode impulse
breakover voltage
2/10
s, I
TM
= -27 A, di/dt = -27 A/
s, R
S
= 50
, V
GG
= -100 V,
(see Note 3)
15
V
V
F
Forward voltage
I
F
= 5 A, t
w
= 200
s
3
V
V
FRM
Ramp peak forward
recovery voltage
UL 497B, dv/dt
100 V/
s, di/dt =
10 A/
s,
Maximum ramp value =
10 A
T
J
= 25
C
5
V
V
FRM
Impulse peak forward
recovery voltage
2/10
s, I
TM
= -27 A, di/dt = -27 A/
s, R
S
= 50
,
(see Note 3)
12
V
I
H
Holding current
I
T
= -1 A, di/dt = 1A/ms, V
GG
= -100 V
-150
mA
I
GKS
Gate reverse current
V
GG
= V
GK
= V
GKRM
, V
KA
= 0
T
J
= 25
C
-5
A
-50
A
I
GT
Gate trigger current
I
T
= -3 A, t
p(g)
20
s, V
GG
= -100 V
T
J
= 25
C
5
mA
6
mA
V
GT
Gate-cathode trigger
voltage
I
T
= -3 A, t
p(g)
20
s, V
GG
= -100 V
2.5
V
C
KA
Cathode-anode off-
state capacitance
f = 1 MHz, V
d
= 1 V, I
G
= 0, (see Note 4)
V
D
= -3 V
100
pF
V
D
= -48 V
50
pF
NOTES: 3. GR-1089-CORE intra-building 2/10, 1.5 kV conditions with 20 MHz bandwidth. The diode forward recovery and the thyristor gate
impulse breakover (overshoot) are not strongly dependent of the SLIC supply voltage value (V
GG
).
4. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
Parameter
Test Conditions
Min
Typ
Max
Unit
R
JA
Junction to free air thermal resistance
T
A
= 70
C, EIA/JESD51-3 PCB,
EIA/JESD51-2 environment, P
tot
= 0.52 W
160
C/W
MARCH 2002 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
Parameter Measurement Information
Figure 1. Principal Terminal and Gate Transfer Characteristics
PM6XAIC
-v
V
GG
V
D
I
H
I
T
I
TSM
I
PPSM
V
(BO)
I
D
Quadrant I
Forward
Conduction
Characteristic
+v
+i
I
F
V
F
I
FSM
(= |I
TSM
|)
I
PPSM
-i
Quadrant III
Switching
Characteristic
V
GK(BO)
PRINCIPAL TERMINAL V- I CHARACTERISTIC
I
GT
I
F
+i
K
-i
K
I
T
-i
G
+i
G
GATE TRANSFER
CHARACTERISTIC
I
K
I
G
MARCH 2002 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
Voltage Stress Levels
APPLICATIONS INFORMATION
SLIC Protection
ISDN Protection
For voltage feed protection, the cathodes of an TISP6NTP2C thyristors are connected to the four conductors to be protected (see Figure 3).
Each gate is connected to the appropriate negative voltage feed. The anode of the TISP6NTP2C is connected to the system common.
Positive overvoltages are clipped to common by forward conduction of the TISP6NTP2C antiparallel diode. Negative overvoltages are initially
clipped close to the negative supply by emitter follower action of the TISP6NTP2C buffer transistor. If sufficient clipping current flows, the
TISP6NTP2C thyristor will regenerate and switch into a low voltage on-state condition. As the negative overvoltage subsides, the high holding
current of the TISP6NTP2C prevents d.c. latchup.
Figure 4 shows the protector electrodes. The package terminal designated gate, G, is the transistor base, B, electrode connection and so is
marked as B (G). The following junctions are subject to voltage stress: Transistor EB and CB, SCR AK (off state) and the antiparallel diode
(reverse blocking). This clause covers the necessary testing to ensure the junctions are good.
Testing transistor CB and EB: The maximum voltage stress level for the TISP6NTP2C is V
BATH
with the addition of the short term antiparallel
diode voltage overshoot, V
FRM
. The current flowing out of the G terminal is measured at V
BATH
plus V
FRM
. The SCR K terminal is shorted to the
common (0 V) for this test (see Figure 4). The measured current, I
GKS
, is the sum of the junction currents I
CB
and I
EB
.
Testing transistor CB, SCR AK off state and diode reverse blocking: The highest AK voltage occurs during the overshoot period of the
protector. To make sure that the SCR and diode blocking junctions do not break down during this period, a d.c. test for off-state current, I
D
,
can be applied at the overshoot voltage value. To avoid transistor CB current amplification by the transistor gain, the transistor base-emitter is
shorted during this test (see Figure 5).
Summary: Two tests are need to verify the protector junctions. Maximum current values for I
GKS
and I
D
are required at the specified applied
voltage conditions.
The generation of POTS lines at the customer premise normally uses a ringing SLIC. Although the lines are short, a central office ringing
voltage level is often required for fax machine operation. High voltage SLICs are now available that can produce adequate ringing voltage (see
table). The TISP6NTP2C has been designed to work with these SLICs which use battery voltages, V
BATH
, down to -150 V. Figure 2 shows a
typical example with one TISP6NTP2C protecting two SLICs.
The table below shows some details of HV SLICs using multiple negative supply rails.
Manufacturer
INFINEON
LEGERITYTM
Unit
SLIC Series
SLIC-P
ISLICTM
SLIC #
PEB 4266
79R241
79R101
79R100
Data Sheet Issue
14/02/2001
-/08/2000
-/07/2000
-/07/2000
Short Circuit Current
110
150
150
150
mA
V
BATH
max.
-155
-104
-104
-104
V
V
BATL
max.
-150
-104
V
BATH
V
BATH
V
AC Ringing for:
85
45
50
55
V rms
Crest Factor
1.4
1.4
1.4
1.25
V
BATH
-70
-90
-99
-99
V
V
BATR
-150
-36
-24
-24
V
R or T Overshoot < 250 ns
-15
15
- 20
12
-20
12
V
Line Feed Resistance
20 + 30
50
50
50
Assumes -20 V battery voltage during ringing.
Legerity, the Legerity logo and ISLIC are the trademarks of Legerity, Inc.
Other product names used in this publication are for identification purposes only and may be trademarks of their respective
companies .
MARCH 2002 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
APPLICATIONS INFORMATION
Figure 2. SLIC Protection
Figure 3. Protection of Four ISDN Power Feeds
Figure 4. Transistor CB and EB Verification
Figure 5. Off-State Current Verification
C
G
100 nF
SLIC 2
TISP6NTP2C
I
K
AI6XBNB
SLIC 1
SLIC
PROTECTOR
0 V
0 V
R
S1
V
BATH
R
S2
R
S3
R
S4
ISDN
POWER
SUPPLY
0
-ve
NEGATIVE
SUPPLY
TISP6NTP2C
+t
+t
+t
+t
+t
+t
+t
+t
0
-ve
0
-ve
0
-ve
R
R
R
R
AI6XDJA
CURRENT
SINK
CURRENT
SINK
CURRENT
SINK
CURRENT
SINK
Resistor "R" may be needed if sink has internal clamp diode
V
BATH
+ V
FRM
T
1/4
1/4
ISP
6NTP2C
AI6XCEB
0 V
K
B (G)
I
EB
I
CB
I
GKS
0 V
AI6XCFB
0 V
K
B (G)
I
CB
V
(BO)
TISP
6NTP2C
I
D(I)
I
D
A
I
D(I)
is the internal SCR value of I
D
I
R
MARCH 2002 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
MECHANICAL DATA
Device Symbolization Code
Devices will be coded as below.
Device
Symbolization
Code
TISP6NTP2C
6NTP2C
MARCH 2002 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
MECHANICAL DATA
TISP6NTP2C High Voltage Ringing SLIC Protector
D008 Plastic Small-Outline Package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will
withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high
humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
NOTES: A. Leads are within 0.25 (0.010) radius of true position at maximum material condition.
B. Body dimensions do not include mold flash or protrusion.
C. Mold flash or protrusion shall not exceed 0.15 (0.006).
D. Lead tips to be planar within
0.051 (0.002).
D008
8
7
6
5
4
3
2
1
8-pin Small Outline Microelectronic Standard
Package MS-012, JEDEC Publication 95
MDXXAAF
INDEX
4.80 - 5.00
(0.189 - 0.197)
5.80 - 6.20
(0.228 - 0.244)
3.81 - 4.00
(0.150 - 0.157)
1.35 - 1.75
(0.053 - 0.069)
0.102 - 0.203
(0.004 - 0.008)
0.28 - 0.79
(0.011 - 0.031)
0.51 - 1.12
(0.020 - 0.044)
4.60 - 5.21
(0.181 - 0.205)
0.36 - 0.51
(0.014 - 0.020)
0.25 - 0.50
(0.010 - 0.020)
0.190 - 0.229
(0.0075 - 0.0090)
Pin Spacing
1.27
(0.050)
(see Note A)
6 places
x 45 N0M
8 Places
7 NOM
4 Places
7 NOM
3 Places
4 4
DIMENSIONS ARE:
MILLIMETERS
(INCHES)
MARCH 2002 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
MECHANICAL DATA
TISP6NTP2C High Voltage Ringing SLIC Protector
D008 - Tape Dimensions
0.8
(0.03)
1.5
(.059)
3.90 - 4.10
(.154 - .161)
5.40 - 5.60
(.213 - .220)
1.95 - 2.05
(.077 - .081)
7.90 - 8.10
(.311 - .319)
6.30 - 6.50
(.248 - .256)
11.70 - 12.30
(.461 - .484)
D008 Package (8-pin Small Outline) Single-Sprocket Tape
Direction of Feed
MIN.
Carrier Tape
Embossment
Cover
Tape
NOTES: A. Taped devices are supplied on a reel of the following dimensions:-
Reel diameter:
Reel hub diameter:
Reel axial hole:
B. 2500 devices are on a reel.
MDXXATD
DIMENSIONS ARE:
MILLIMETERS
(INCHES)
330 +0.0/-4.0
(12.99 +0.0/-.157)
100 2.0
(3.937 .079)
13.0 0.2
(.512 .008)
0 MIN.
MIN.
0.40
(0.016)
2.0 - 2.2
(.079 - .087)
1.50 - 1.60
(.059 - .063)
"TISP" is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
"Bourns" is a registered trademark of Bourns, Inc. in the U.S. and other countries.
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