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Электронный компонент: AL100A

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Reference Only / Allayer Confidential
AL100A
Advance Information
8 PORT LOW COST 10/100 SWITCH
Product Description
The AL100A is an eight-port 10/100 Mbit/s dual-speed Ethernet switch. A low-cost and scalable
solution is achieved through the use of low-cost buffer memory and Allayer's proprietary RoX
architecture. The AL100A also supports VLAN and multiple port aggregation trunks.
Figure 1
System Block Diagram
Supports eight 10/100 Mbit/s Ethernet ports
with MII interface
Capable of trunking up to 800
Mbit/s link with link fail over
Full- and half-duplex mode operation
Supports 1K MAC addresses
Designed to utilize low-cost SGRAM
Scalable design for stackable switch imple-
mentation
RoX expansion link supports 6.4 Gbit/s
throughput
Gigabit Ethernet ready
Speed auto-negotiation through MDIO
Automatic source address learning
Secure mode traffic filtering
Broadcast storm control
Port monitoring support
IEEE 802.3x flow control for full duplex
operation
RMON and SNMP support with external
management (MIB) device
Optional backpressure flow control support
for half-duplex operation
Supports store-and-forward mode switching
VLAN support
0.35 micron, 3.3V CMOS technology
Packaged in 388-pin BGA
10/100 MAC
10/100 MAC
10/100 MAC
10/100 MAC
10/100 MAC
10/100 MAC
10/100 MAC
10/100 MAC
High Speed
Switch Fabric
Switch
Controller
Address
Control
Address
Table
Buffer
Manager
EEPROM
Interface
Expansion
Interface
Management
Information
AL100A Advance Information
2/2000
Reference Only / Allayer Confidential
2
AL100A Overview
The RoX interface is a 2.4 Gbit/s interface (4.8 Gbit/s full-duplex). The interface can support up to
four switch chips. Various combinations can be used for different configurations. The maximum
port configuration will be either 32-port 100 Mbps ports or 24-port 100 Mbps plus two Gigabit
Ethernet ports. The AL100A provides eight 10/100 Mbps Ethernet ports that supports both 10 and
100 Mbps data rates. The operation mode is auto-negotiated by the PHY. All ports are full duplex
capable.
The RoX interface also supports an external management device. The external management device
supports SNMP and RMON.
The AL100A supports port-based VLAN. The VLAN register set is used to configure the
destination ports for multicast and broadcast frames. The device also supports VLAN for
workgroup and segment switching applications.
The AL100A supports trunking applications. The chip provides two optional load balancing
schemes, explicit and dynamic. With trunking, it is possible to group up to four full-duplex links
together to form a single 800 Mbps link.
The AL100A utilizes cost effective SGRAM to provide 8-Mbps or 16-Mbps of buffer memory.
During transmission, the data is obtained from the buffer memory and routed to the destination
port. In the event of a collision during half-duplex operation, the MAC control will back off and
retransmit in accordance to the IEEE 802.3 specifications. Data received from the MAC interface is
stored in the external memory buffer.
The AL100A provides two flow control methods. For half-duplex operations, an optional jamming
based flow control (also known as backpressure) is available to prevent loss of data. With this
method of flow control, the switch will generate a jam signal when the receive-buffer is full. The
sending station will not transmit until the line is clear. In the full-duplex mode, AL100A utilizes
IEEE 802.3x as the flow control mechanism.
All ports support multiple MAC addresses. The switch chip supports up to 1K MAC addresses
internally. These MAC addresses are shared among all eight ports. Additional SRAM can be added
to provide 16K MAC addresses support.
The initialization and configuration of the switch is programmed by an external EEPROM.
For an unmanaged switch design, there is no need for a CPU. Field reconfigurations can be
achieved by using a parallel interface to reprogram the EEPROM. For managed switch applications,
the AL100A supports network management through the network management option. When the
management option is enabled, network statistics for each port are gathered and sent across the
RoX bus. The management information base chip on the bus will collect and store the data for the
network management agent. Access to the statistic counters is provided via the CPU interface of the
MIB device.
The AL100A operates only in the store and forward mode. The entire frame is checked for errors.
Frames with errors are automatically filtered and are not forwarded to the destination port.
The device also provides two levels of security for intrusion protection. Security can be
implemented on a per port basis.
Other features include port monitoring and broadcast storm throttling.