B C M 8 7 1 0 F E A T U R E S
ORX
OTX
ORX
OTX
10 Gbps MA
C
XSBI
10 Gbps MA
C
XSBI
BCM8710
BCM8710
BCM8711
BCM8711
Application Block Diagram
Compliant with the Optical Internetworking Forum
(OIF), Telcordia, ITU-T, and IEEE 802.3ae industry
standards.
Low power consumption eliminates external heat
sinks, fans for system airflow, and expensive high
current power supplies.
Reduces design cycle and time to market.
CMOS-based device uses the most effective silicon
economy of scale.
Target applications:
Transmission equipment
Optical modules
Hubs and repeaters
Network Interface Cards (NICs)
Test equipment
ADD/DROP multiplexers
Digital cross-connects
ATM switch backbones
Terabit routers
Edge routers
S U M M A R Y O F B E N E F I T S
10GE 16:1 MULTIPLEXER WITH CLOCK GENERATION
PRODUCT
Brief
B C M 8 7 1 0
IEEE 802.3ae 10.3125-Gbps Ethernet serializer, clock
multiplication unit (CMU), and multiplexer (MUX)
16:1 serializer with LVDS parallel clock and data
inputs
On-chip 16 x 10 FIFO eliminates system timing issues
10.3125-Gbps serial output data and clock
Lock detect
Core power supply: 1.8V
I/O power supplies: CML, LVDS and LVPECL at 1.8V,
CMOS at 1.8V or 3.3V
Power consumption: 580 mW typical @ 1.8V
Standard CMOS fabrication process
15
15 mm, 120-pin BGA package
The BCM8710 is a fully integrated 10GE transmitter operating
at 10.3125 Gbps with serializer and CMU. The low-jitter LVDS
interface and the onboard low-jitter phase-locked loop (PLL)
meets Optical Internetworking Forum (OIF), IEEE 802.3ae,
Telcordia, ANSI, and ITU-T jitter standards.
The BCM8710 reference clock input frequency is user-selectable
to the line rate divided by either 16 or 64. A 10-word FIFO
decouples the parallel input timing domain from the serial output
timing domain. The BCM8710 provides a CML serial output
clock to retime the data at the optical interface.
Major transmitter functions are:
16-bit, LVDS parallel input
Elastic buffering FIFO with overflow indicator
10.3125-GHz CMU
10.3125-Gbps CML transmit serial data output
Parallel-to-serial conversion
Selectable reference clock frequency
Lock detect
B C M 8 7 1 0 O V E R V I E W
RESET
OVF
TSDP
TSDN
TSCKP
TSCKN
RB_LD
CLK16OP
CLK16ON
LCKDET
CLK16IP
CLK16IN
DI0P
DI0N
DI15P
DI15N
REF155EN
REFCLKP
REFCLKN
IFSEL
VCP
VCN
CML
Serial Outputs
LVDS
Reference Clock
Outputs
LVPECL
Reference Clock
Input
LVDS
Parallel Inputs
FIFO
Control
Write
Pointer
Read
Pointer
10.3 GHz
CMU
DIVIDE-BY-16
Output
Retime
INPUT
REGISTER
16 x 10 FIFO
16:1 MUX
Block Diagram
Phone: 949-450-8700
FAX: 949-450-8710
Email: info@broadcom.com
Web: www.broadcom.com
Broadcom
, the pulse logo
and Connecting Everything
TM
are trademarks of
Broadcom Corporation and/or its subsidiaries in the United States and certain other countries.
All other trademarks are the property of their respective owners.
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
2002 by BROADCOM CORPORATION. All rights reserved.
8710-PB02-R-4.1.02
PDF 
ZIP