OPA502
1
OPA502
High Current, High Power
OPERATIONAL AMPLIFIER
FEATURES
q
HIGH OUTPUT CURRENT: 10A
q
WIDE POWER SUPPLY VOLTAGE:
10V to
45V
q
USER-SET CURRENT LIMIT
q
SLEW RATE: 10V/
s
q
FET INPUT: I
B
= 200pA max
q
CLASS A/B OUTPUT STAGE
q
QUIESCENT CURRENT: 25mA max
q
HERMETIC TO-3 PACKAGE --
ISOLATED CASE
APPLICATIONS
q
MOTOR DRIVER
q
SERVO AMPLIFIER
q
PROGRAMMABLE POWER SUPPLY
q
ACTUATOR DRIVER
q
AUDIO AMPLIFIER
q
TEST EQUIPMENT
DESCRIPTION
The OPA502 is a high output current operational
amplifier designed to drive a wide range of resistive
and reactive loads. Its complementary class A/B
output stage provides superior performance in
applications requiring freedom from crossover distor-
tion. Resistor-programmable current limits provide
protection for both the amplifier and the load during
abnormal operating conditions. An adjustable foldover
current limit can also be used to protect against
potentially damaging conditions.
The OPA502 employs a custom monolithic op amp/
driver circuit and rugged complementary output
transistors, providing excellent DC and dynamic
performance.
The industry-standard 8-pin TO-3 package is electri-
cally isolated from all circuitry. This allows the
OPA502 to be mounted directly to a heat sink without
cumbersome insulating hardware which degrade
thermal performance. The OPA502 is available in
40
C to +85
C temperature range.
5
4
Bias
Circuit
3
V+
6
V
Output
Drive
8
R
FO
7
Current
Sense
1
+Output
Drive
2
280
20k
20k
280
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111 Twx: 910-952-1111
Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
1992 Burr-Brown Corporation
PDS-1166B
Printed in U.S.A. March, 1998
2
OPA502
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
SPECIFICATIONS
T
CASE
= +25
C, V
S
=
40V, unless otherwise noted.
OPA502BM
PARAMETER
CONDITION
MIN
TYP
MAX
UNITS
OFFSET VOLTAGE
Input Offset Voltage
0.5
5
mV
vs Temperature
Specified Temp. Range
5
V/
C
vs Power Supply
V
S
=
10V to
45V
74
92
dB
INPUT BIAS CURRENT
(1)
Input Bias Current
V
CM
= 0V
12
200
pA
Input Offset Current
V
CM
= 0V
3
pA
NOISE
Input Voltage Noise
Noise Density,
f = 1kHz
25
nV/
Hz
Current Noise Density,
f = 1kHz
3
fA/
Hz
INPUT VOLTAGE RANGE
Common-Mode Input Range, Positive
Linear Operation
(V+) 5
(V+) 4
V
Negative
Linear Operation
(V) +5
(V) +4
V
Common-Mode Rejection
V
CM
=
35V
74
106
dB
INPUT IMPEDANCE
Differential
10
12
|| 5
|| pF
Common-Mode
10
12
|| 4
|| pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain
V
O
=
34V, R
L
= 6
92
103
dB
FREQUENCY RESPONSE
Gain-Bandwidth Product
G = +10, R
L
= 50
2.0
MHz
Slew Rate
68Vp-p, R
L
= 6
5
10
V/
s
Full-Power Bandwidth
See Typical Curves
Total Harmonic Distortion
G = +3, f = 20kHz
0.06
%
V
O
= 20V, R
L
= 8
Capacitive Load
See Figure 6
OUTPUT
Voltage Output, Positive
I
O
= 10A
(V+) 6
(V+)3.5
V
Negative
I
O
= 10A
(V) +6
(V) +3.6
V
Positive
I
O
= 1A
(V+) 2.5
V
Negative
I
O
= 1A
(V) +3.1
V
Current Output
See SOA Curves
Short Circuit Current
Resistor Programmed
POWER SUPPLY
Specified Operating Voltage
40
V
Operating Voltage Range
10
45
V
Quiescent Current
I
O
= 0
20
25
mA
TEMPERATURE RANGE
Specification
40
+85
C
Storage
55
+125
C
Thermal Resistance,
JC
DC
1.25
1.4
C/W
AC f
50Hz
0.8
0.9
C/W
JA
No Heat Sink
30
C/W
NOTE: (1) High-speed test at T
J
= 25
C.
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage, V+ to V ..................................................................... 90V
Output Current .................................................................. See SOA Curve
Input Voltage .............................................................. (V) 1V to (V+)+1V
Case Temperature, Operating ......................................................... 150
C
Junction Temperature ...................................................................... 200
C
NOTE: (1) Stresses above these ratings may cause permanent damage.
PACKAGE
DRAWING
TEMPERATURE
PRODUCT
PACKAGE
NUMBER
(1)
RANGE
OPA502BM
8-Pin TO-3
030
40
C to +85
C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
OPA502
3
Top View
TO-3
Current
Sense
V
+In
In
V+
+Output
Drive
R
FO
Output
Drive
V
O
1
2
3
8
5
6
4
7
R
CL
R
CL
+
PIN CONFIGURATION
CURRENT LIMIT vs LIMIT RESISTOR
R
CL
(
)
I
CL
(A)
10
1
0.10
0.10
0.01
1
10
I
CL
+I
CL
CURRENT LIMIT vs TEMPERATURE
Case Temperature (C)
I
CL
(A)
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
50
50
125
25
0
25
75
100
I
CL
(A)
0.24
0.22
0.20
0.18
0.16
0.14
0.12
0.10
R
CL
= 5.0
R
CL
= 0.5
NOTE: These are average values.
I
CL
is typically 8% higher.
+I
CL
is typically 8% lower.
SUPPLY CURRENT vs TEMPERATURE
Case Temperature (C)
Supply Current (mA)
30
20
10
50
50
125
25
0
25
75
100
V
S
= 10 to 45V
OPEN-LOOP GAIN AND PHASE vs FREQUENCY
Frequency (Hz)
Voltage Gain (dB)
120
100
80
60
40
20
0
10
100k
10M
100
1k
10k
1M
R
L
= 4
R
L
= 50
Phase (degrees)
0
45
90
135
180
TYPICAL PERFORMANCE CURVES
T
CASE
= +25
C, V
S
=
40V, unless otherwise noted.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
4
OPA502
TYPICAL PERFORMANCE CURVES
(CONT)
T
CASE
= +25
C, V
S
=
40V, unless otherwise noted.
INPUT BIAS AND OFFSET CURRENTS
vs TEMPERATURE
Case Temperature (C)
Input Bias and Offset Current (pA)
10nA
1nA
100
10
1
50
50
125
25
0
25
75
100
I
OS
I
B
INPUT BIAS CURRENT vs
INPUT COMMON-MODE VOLTAGE
Common-Mode Voltage (V)
Normalized (I
B
)
2.2
1.8
1.4
1.0
0.6
0.2
40
10
40
30
20
10
20
30
0
VOLTAGE NOISE DENSITY vs FREQUENCY
Frequency (Hz)
Voltage Noise (nV/ Hz)
10k
1k
100
10
10
1
10k
100k
100
1k
GAIN BANDWIDTH PRODUCT vs TEMPERATURE
Case Temperature (C)
GBWP (MHz)
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
50
50
125
25
0
25
75
100
R
L
= 50
R
L
= 10k
G = +10
R
L
= 4
POWER SUPPLY REJECTION vs FREQUENCY
Frequency (Hz)
120
100
80
60
40
20
10
1
100k
1M
100
1k
PSRR (dB)
10k
COMMON-MODE REJECTION vs FREQUENCY
Frequency (Hz)
120
100
80
60
40
20
10
1
100k
1M
100
1k
CMRR (dB)
10k
OPA502
5
TYPICAL PERFORMANCE CURVES
(CONT)
T
CASE
= +25
C, V
S
=
40V, unless otherwise noted.
SLEW RATE vs TEMPERATURE
Case Temperature (C)
Slew Rate (V/s)
14
12
10
8
6
4
50
50
125
25
0
25
75
100
SR
+SR
G = +10
V
O
= 34V
PK
R
L
= 6
FULL POWER RESPONSE
Frequency (Hz)
Output Voltage (V
PK
)
35
30
25
20
15
10
5
0
10k
100k
1M
G = +10
R
L
= 8
THD < 2%
TOTAL HARMONIC DISTORTION AND NOISE
vs FREQUENCY
Frequency (Hz)
THD + N (%)
1.000
0.100
0.010
0.001
20
100
20k
1k
10k
P
O
= 100mW
G = +3
R
L
= 8
Measurement
BW = 80kHz
P
O
= 50W
P
O
= 5W
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
I
OUT
(A)
|V
S
| |V
OUT
| (V)
5
4
3
2
1
0
0
6
10
2
3
4
7
9
1
5
8
(+V
S
) V
O
|V
S
| |V
O
|
OUTPUT VOLTAGE SWING vs TEMPERATURE
Case Temperature (C)
|V
S
| |V
O
| (V)
5
4
3
2
1
0
50
50
125
25
0
25
75
100
I
O
= +10A
I
O
= 10A
I
O
= +1A
I
O
= 1A
6
OPA502
TYPICAL PERFORMANCE CURVES
(CONT)
T
CASE
= +25
C, V
S
=
40V, unless otherwise noted.
FIGURE 1. Basic Circuit Connections.
I
CL
Power
R
CL
at 25
C
Dissipation
1
(
)
(A)
of R
CL
(W)
10
0.11
0.12
5
0.19
0.18
2
0.44
0.39
1
0.78
0.61
0.68
1.22
1.0
0.5
1.65
1.4
0.3
2.73
2.2
0.2
4.0
3.2
0.15
5.4
4.4
0.1
8.1
6.6
NOTE 1: Power dissipation during continuous
current limit at T
CASE
= +25
C.
APPLICATIONS INFORMATION
Power supply terminals should be bypassed with low series
impedance capacitors such as ceramic or tantalum close to the
device pins. Power supply wiring should have low series
impedance and inductance. Figure 1 indicates the high current
connections in bold lines.
Current limit is set with two external resistors--one for
positive output current and one for negative output current
(see Figure 1). For conventional current limit, independent of
output voltage, pin 7 should be left open (see "Foldback
Current Limit"). Limiting occurs when the output current
causes sufficient voltage drop across R
CL
to turn on the
respective current limit transistor. The limit current decreases
at high temperature (see typical performance curve "Current
Limit vs Temperature).
Figure 1 also shows nominal current limit produced by stan-
dard resistor values. See also the typical performance curve
"Current Limit vs Limit Resistance". The output current must
flow through this resistor, so its power rating must be chosen
accordingly. The table in Figure 1 shows the power dissipa-
tion of the current limit resistor during continuous current
limit (room temperature). Connections from the current limit
resistors to the device pins can typically add 0.02
to 0.05
to the effective value of R
CL
. This significantly affects the
current limit value for high output currents.
The current limit resistors can be chosen from a variety of
types. Most common wire-wound types are satisfactory, al-
though some physically large types may have excessive
inductance which can cause problems. You should test your
circuits with the exact resistor type planned for production
use.
You can set different current limits for positive and negative
current. Resistors are chosen with the same table of values in
Figure 1.
SAFE OPERATING AREA
Stress on the output transistors is determined by the output
current and the voltage across the conducting output transis-
tor. The power dissipated by the output transistor is equal to
the product of the output current and the voltage across the
conducting transistor, V
CE
. The Safe Operating Area (SOA
curve, Figure 2) shows the permissible range of voltage and
current.
SMALL SIGNAL RESPONSE
G = +3, C
L
= 1000pF
LARGE SIGNAL RESPONSE
G = +3, R
L
= 4
OPA502
2F
0.1F
2F
0.1F
+40V
40V
V
IN
R
2
R
CL
R
CL
+
R
1
5
4
3
1
6
8
Load
V
O
G = 1 +
R
2
R
1
2
NOTE: Bold lines indicate
high current paths.
OPA502
7
The safe output current decreases as V
CE
increases. Output
short-circuits are a very demanding case for SOA. A short-
circuit to ground forces the full power supply voltage (V+ or
V) across the conducting transistor. With V
S
=
40V the
current limit must be set for 3A (25
C) to be safe for continu-
ous short-circuit to ground. For further insight on SOA,
consult AB-039.
FIGURE 2. Safe Operating Area (SOA).
FOLDOVER CURRENT LIMIT
By connecting a resistor from pin 7 to ground, you can make
the limit current vary with output voltage. The foldover limit
FIGURE 3. Unbalanced Power Supplies.
OPA502
5V
at 50mA
V
IN
9k
2
22
1k
R
L
V
O
55V
at 0.5A
0 to 5V
0 to 50V
0.5A
UNBALANCED POWER SUPPLIES
Some applications do not require equal positive and negative
output voltage swing. The power supply voltages of the
OPA502 do not need to be equal. Figure 3 shows a circuit
designed for a positive output voltage and current. The 5V
power supply voltage assures that the inputs of the OPA502
are operated within their linear common-mode range. The V+
power supply could range from 15V to 85V. The total voltage
(V to V+) can range from 20V to 90V.
OUTPUT PROTECTION
The output stage of the OPA502 is protected by internal diode
clamps to the power supply terminals. These internal diodes
are similar to common silicon rectifier types and may not be
fast enough for adequate protection. For loads that can deliver
large reverse kickback current (greater than 5A) to the output,
external fast-recovery clamp diodes are recommended
(Figure 4). For these diodes (internal or external) to provide
the intended protection, the power supplies must provide a
low impedance to a reverse current.
FIGURE 4. Diode Protection of Output.
circuit can be set to allow high output current when V
CE
is low
(high output voltage). Output current limits at a lower value
under the more stressful condition when V
CE
is high, (output
voltage is low).
The behavior of this voltage-dependant current limit is de-
scribed by the following equation.
where: V
O
is the output voltage measured with respect to
ground.
R
FO
is the resistor connected from pin 7 to ground (in
k ohms).
R
CL
is the current limit resistor (in ohms).
The foldover limit circuitry can be set to allow large voltage
and current to resistive loads, yet limit output current to a safe
value with an output short circuit.
Reactive or EMF-generating loads can produce unexpected
behavior with the foldover circuit driven into limiting. With a
reactive load, peak output current occurs at low or zero output
voltage. Compared to a resistive load, a reactive load with the
same total impedance will be more likely to activate the
foldover limit circuitry.
I
LIMIT
=
0.81 +
R
CL
0.28 V
O
R
FO
+ 20
+ 0.03
OPA502
V
Inductive or
EMF-Generating
Load
V+
MR821
MR821
Fast Recovery Diode
5A, 100V
SAFE OPERATING AREA
10
|V
S
V
OUT
| (V)
I
O
(A)
10
5.0
2.0
1.0
0.5
0.2
0.1
5
2
1
20
50
100
T
C
= +25C
T
C
= +85C
t = 0.5ms
t = 1ms
t = 5ms
Ther mal Limitation
(T
J
= 200C)
Second Breakdown
Limited
8
OPA502
FIGURE 5. Compensating Input Capacitance.
OPA502
R
2
C
2
=
C
IN
R
1
R
2
R
1
C
IN
C
IN
=
Input capacitance, package and wiring
20pF
MOUNTING AND HEAT SINKING
Most applications require a heat sink to assure that the maxi-
mum junction temperature is not exceeded. The heat sink
required depends on the power dissipated and on ambient
conditions. Consult Application Bulletin AB-038 for infor-
mation on determining heat sink requirements.
The case of the OPA502 is isolated from all circuitry and can
be fastened directly to a heat sink. This eliminates cumber-
some insulating hardware that degrades thermal performance.
Consult Application Bulletin AB-037 for proper mounting
techniques and procedures for TO-3 power products.
SOCKET
A mating socket, 0804MC is available for the OPA502 and
can be purchased from Burr-Brown. Although not required,
this socket makes interchanging parts easy, especially during
design and testing.
COMPENSATION AND STABILITY
Capacitance at the inverting input causes a high frequency
pole in the feedback path. This reduces phase margin, causing
pulse response ringing, and in severe cases, oscillations. A
low value feedback capacitor can reduce or eliminate this
effect by maintaining a constant feedback factor at high
frequency (see Figure 5).
Depending on the load conditions, precautions may be re-
quired when using the OPA502 in low gains. Gains less than
+3V/V or 2V/V may cause oscillations, particularly with
capacitive loads. Figure 6 shows several circuits for low gain
and capacitive loads.
Large value feedback capacitors used to limit the closed-loop
bandwidth or form an integrator may also produce instability
because the closed-loop gain approaches unity at high fre-
quency.
OPA502
9
FIGURE 6. Compensation Circuits.
OPA502
20k
10k
10k
470pF
V
IN
G = 2
C
L
0.01F
OPA502
20k
10k
V
IN
G = 2
C
L
0.1F
10
4H
OPA502
20k
V
IN
G = +1
10k
470pF
IN4148
Prevents
phase-inversion
in G = 1 circuits
C
L
2200pF
10
OPA502
FIGURE 7. Low Distortion Composite Amplifier.
FIGURE 8. Bridge Drive Circuit.
FIGURE 9. Digitally Programmable Power Supply.
3nF
OPA502
1k
0.2
0.2
10k
10k
OPA502
0.2
0.2
20k
G = 1
20
Load
10k
G = +3
V
IN
10V
35V
+35V
35V
+35V
120Vp-p
(60V)
OPA602
10k
OPA502
40k
0-1mA
DAC7801
12-bit
M-DAC
REF102
+30V
10V
+5V
20pF
20k
4.7k
470pF
10k
0.1
0.1
V
O
20V
at 5A
30V
+30V
8-bit
data port
(8 + 4 bits)
4H
OPA27
47pF
1k
V
IN
100k
OPA502
10pF
4.7k
10
4
0.1
0.1
10k
20k
THD at 50W
0.02% at 20kHz
0.002% at 1kHz
V
S
= 15V
V
S
= 40V
G = +21
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