3/8/2001
1
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
PACNLT101
2001 California Micro Devices Corp. All rights reserved. EZtermTM is a trademark of California Micro Devices
Non-Linear High Speed Termination IC
Features
16 channel, dual rail clamping action in
a single package
Provides bus termination independent of line
impedance or loading conditions
Uses CAMD's patented EZtermTM technology
24-pin QSOP package saves board space and
eases layout in space critical areas.
One IC replaces and outperforms up to 32 discrete
components.
Enable pin included
Product Description
CAMD's non-linear termination IC is specifically de-
signed to minimize overshoot/undershoot disturbances
caused by impedance mismatch reflections and noise on
high-speed transmission lines.
Reflections on high-speed data lines lead to voltage
overshoot and undershoot disturbances, which may
result in data loss or improper system operation. Resis-
tive terminations, when used to terminate these high-
speed data lines, increase power consumption and
degrade output levels, resulting in reduced noise immu-
nity. Clamping-type termination is the best overall
solution for applications in which these may be consider-
ations.
This highly integrated non-linear termination IC provides
very effective termination performance for high-speed
data lines under variable loading conditions. The device
supports up to 16 terminated lines per package each
of which are clamped to both ground and power supply
rail. A typical application may use 4 devices to replace
(and outperform) 64 conventional Schottky diode pairs;
thus providing significant reductions in component and
assembly costs, improvements in manufacturing effi-
ciency and reliability, and savings in allocated board area
for space-critical designs.
C1601100
Application
High speed, low voltage buses
1
2
3
4
NLT#1
NLT#2
NLT#3
GND
24
23
22
21
V
DD
V
DD
NLT#16
GND
Top View
PACNLT101
24-Pin QSOP
5
NLT#4
20
NLT#15
6
NLT#5
19
NLT#14
7
NLT#6
18
NLT#13
8
NLT#7
17
NLT#12
9
GND
16
GND
10
NLT#8
15
NLT#11
11
NLT#9
14
Enable
12
NLT#10
13
V
DD
Pin Configuration
Standard Part Ordering Information
Package
Ordering Part Number
Pin
Style
Tape & Reel
Part Marking
24
QSOP
PACNLT101Q
PACNLT101Q
2001 California Micro Devices Corp. All rights reserved. EZtermTM is a trademark of California Micro Devices
3/8/2001
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
2
PACNLT101
Absolute Maximum Ratings
Parameter
Rating
Unit
Maximum DC Voltage on any pin
3.6
V
Minimum DC Voltage on any pin
0.5 V
Continuous current per channel
72
mA
Operating Temperature (Ambient)
40 to 85
C
Storage Temperature (Ambient)
65 to 150
C
Power Dissipation @ T = 25
C 0.9
W
Operating Characteristics - V
DD
= 3.3V, Enable = 3.3V, Temperature = 40
C to 85C
Operating Characteristics -- 3.3V
Parameter
Conditions
MIN
TYP
MAX
UNIT
Signal Voltage
above V
DD
@ I = 50mA
610
850
mV
below GND @ I = 50mA
510
750 mV
V
DD
current
all Channels floating
85
150
mA
Enable pin (pin 14) current
all Channels floating
10
15
mA
Input Capacitance*
Signal voltage = V
DD
3.4
pF
Signal voltage = V
DD/2
3.0
pF
ESD protection
MIL-STD-883, method 3015*
4
kV
Response Time
400
ps
Operating Characteristics - V
DD
= 2V, Enable = 2V, Temperature = 40
C to 85C
Operating Characteristics -- 2.0V
Parameter
Conditions
MIN
TYP
MAX
UNIT
Signal Voltage
above V
DD
@ I = 20mA
390
600
mV
below GND @ I = 20mA
300
500
mV
V
DD
current
all Channels floating
25
42
mA
Enable pin (pin 14) current
all Channels floating
3.5
5.5
mA
Input Capacitance*
Signal voltage = V
DD
3.5
pF
Signal voltage = V
DD/2
3.2
pF
ESD protection
MIL-STD-883, method 3015*
4
kV
Response Time
400
ps
*These parameters are guaranteed by design and characterization.
*These parameters are guaranteed by design and characterization.
Operating Characteristics - V
DD
= 2.5V, Enable = 2.5V, Temperature = 27
C
Operating Characteristics -- 2.5V
Parameter
Conditions
MIN
TYP
MAX
UNIT
Signal Voltage
above V
DD
@ I = 30mA
470
mV
below GND @ I = 30mA
375
mV
V
DD
current
all Channels floating
50
mA
Enable pin current
all Channels floating
6
mA
3/8/2001
3
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
PACNLT101
2001 California Micro Devices Corp. All rights reserved. EZtermTM is a trademark of California Micro Devices
Figure 1. DC I-V Curves for V
DD
= 2V and V
DD
= 3.3V
Application Information
Figure 2 shows one method of configuring the printed
circuit board such that all 16 terminated signals are
easily accessible. The decoupling capacitor should be a
high-frequency type, 0.1F or larger, and placed as close
to the IC as possible. This will minimize
the positive overshoot voltage and also reduce
EMI emissions. It should be noted that for optimum
performance the PACNLT101 termination should be
located as physically close to the receiving IC input as is
possible.
Figure 2. Printed Circuit Board with Accessible Configuration for 16 Terminated Signals
0
5
10
15
20
25
30
35
40
45
50
0
100
200
300
400
500
600
Voltage above V
DD
(mV)
Current (mA)
VDD = 3.3V
VDD = 2.0V
1
2
3
4
0.1F
GND
via
24
23
22
21
V
DD
5
20
6
19
7
18
8
17
9
16
10
15
11
14
GND
GND
GND
PACNLT101
16
Terminated
Signals
12
13
2001 California Micro Devices Corp. All rights reserved. EZtermTM is a trademark of California Micro Devices
3/8/2001
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
4
PACNLT101
Figure 5. With PACNLT101 Termination
Figure 4. 74AC244 Termination Only
Figure 3. Example Circuit: Single-Driver/Single Receiver
Driver
7SZ04
Receiver
74AC244
GND
Non-Linear
Clamp
Termination
V
CC
Transmission
Line
C1 Rise
1.14ns
: 2.50V
C1 Fall
1ns
C1 Max
3.30V
C1 Min
1.20V
1.24V
M 10ns
1V
5GS/s
Tek 136
Acqs
Ch1
@: 0V
C1 Rise
1.18ns
: 2.50V
C1 Fall
1ns
C1 Max
2.82V
C1 Min
500mV
1.24 V
M 10ns
1V
5GS/s
Tek 44
Acqs
Ch1
@: 0V
3/8/2001
5
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
PACNLT101
2001 California Micro Devices Corp. All rights reserved. EZtermTM is a trademark of California Micro Devices
Enable pin
In normal use the Enable pin is connected to V
DD
.
If the Enable pin is set to 0V or disconnected (high
impedance), then the PACNLT101 will be disabled. The
supply current will drop to almost zero and the clamping
performance will be worsened.
The Enable pin can also be used to vary the supply
current and clamping voltage. As the current into the
Enable pin is increased the supply current will increase
and the clamping voltage will be reduced. The minimum
clamping voltage will occur when the Enable pin voltage
equals the supply voltage. (The Enable pin voltage
cannot exceed the supply voltage.)
Users who cannot tolerate the supply current quoted in
the Operating Characteristics can connect a resistor in
series with the Enable pin to reduce the supply current,
at the cost of increasing the clamping voltage. See
Figure 6.
The controller IC sets the powerdown pin to 0V to
powerdown the PACNLT101, and sets the powerdown
pin to V
DD
to power up the PACNLT101. The system
designer can vary the value of R1 to optimize the trade-
off between power consumption and clamping voltage.
See Figure 7, 8, 9, and 10.
Figure 7. I
DD
vs R1 @ V
DD
= 3.3V
Figure 6. Resistor In Series with the Enable Pin
Controller
Powerdown
PACNLT101
R1
Enable
0
10
20
30
40
50
60
70
80
90
100
0
100
220
470
1000
2200
Value of External Resistor R1 (
)
I DD
(mA)
500
550
600
650
700
750
800
0
100
220
470
1000
2200
Value of External Resistor R1 (
)
Clamping V
olta
g
e
abo
v
e V
DD
f
or 50mA (mV)
Figure 8. Clamping Voltage vs R1 @ V
DD
= 3.3V
Figure 9. I
DD
vs R1 @ V
DD
= 2V
Figure 10. Clamping Voltage vs R1 @ V
DD
= 2V
0
5
10
15
20
25
30
0
100
220
470
1000
2200 4700 10000 100000
Value of External Resistor R1 (
)
I DD
(mA)
300
350
400
450
550
500
600
650
0
100
220
470
1000
2200
4700 10000 100000
Value of External Resistor R1 (
)
Clamping V
o
lta
g
e
abo
v
e V
DD
f
o
r 20mA (mV)
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