Central
Semiconductor Corp.
TM
PROCESS
CP188
Small Signal Transistor
NPN - Low Noise Amplifier Transistor Chip
PRINCIPAL DEVICE TYPES
CMPT2484
CMPT5088
CMPT5089
CMPT6428
CMPT6429
2N2484
Process
EPITAXIAL PLANAR
Die Size
15 x 15 MILS
Die Thickness
9.0 MILS
Base Bonding Pad Area
4.0 x 4.0 MILS
Emitter Bonding Pad Area
5.5 x 5.5 MILS
Top Side Metalization
Al - 30,000
Back Side Metalization
Au - 18,000
PROCESS DETAILS
GEOMETRY
BACKSIDE COLLECTOR
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R2 (1 -August 2002)
GROSS DIE PER 4 INCH WAFER
53,730
Central
Semiconductor Corp.
TM
Central
Semiconductor Corp.
TM
PROCESS
CP188
Typical Electrical Characteristics
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R2 (1 -August 2002)
Central
Semiconductor Corp.
TM
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