Central
Semiconductor Corp.
TM
PROCESS
CP207
Small Signal Transistor
NPN - Saturated Switch Transistor Chip
PRINCIPAL DEVICE TYPES
2N2369A
CMPT2369
Process
EPITAXIAL PLANAR
Die Size
9.0 x 14 MILS
Die Thickness
8.0 MILS
Base Bonding Pad Area
3.1 x 2.9 MILS
Emitter Bonding Pad Area
3.1 x 2.9 MILS
Top Side Metalization
Al - 13,000
Back Side Metalization
Au - 6,000
PROCESS DETAILS
BACKSIDE COLLECTOR
GEOMETRY
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R2 (1-August 2002)
GROSS DIE PER 4 INCH WAFER
93,430
Central
Semiconductor Corp.
TM
Central
Semiconductor Corp.
TM
PROCESS
CP207
Typical Electrical Characteristics
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R2 (1-August 2002)
Central
Semiconductor Corp.
TM
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