Central
Semiconductor Corp.
TM
PROCESS
CP517
Power Transistor
PNP - Darlington Chip
PRINCIPAL DEVICE TYPES
2N6040
2N6041
2N6042
2N6299
Process
EPITAXIAL BASE
Die Size
111 X 111 MILS
Die Thickness
10 MILS
Base Bonding Pad Area
20 X 30 MILS
Emitter Bonding Pad Area
20 X 26 MILS
Top Side Metalization
Al - 30,000
Back Side Metalization
Au/Cr/Ni/Au - 6,000
PROCESS DETAILS
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
GEOMETRY
BACKSIDE COLLECTOR
R1 (1-August 2002)
GROSS DIE PER 5 INCH WAFER
910
Central
Semiconductor Corp.
TM
PROCESS
CP517
Typical Electrical Characteristics
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R1 (1-August 2002)
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