30
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
30V , 100A , R
DS(ON)
= 4.5m
@V
GS
=10V.
Super high dense cell design for extremely low R
DS(ON)
.
High power and current handling capability.
TO-220 & TO-263 package.
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
V
DS
V
Gate-Source Voltage
V
GS
20
V
-Pulsed
I
D
100
A
I
DM
300
A
Drain-Source Diode Forward Current
I
S
100
A
Maximum Power Dissipation
P
D
W
Operating and Storage Temperature Range
T
J
, T
STG
-55 to 175
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
R
JC
R
JA
1.4
62.5
/W
C
/W
C
R
DS(ON)
= 6.0m
@V
GS
=4.5V.
@Tc=25 C
Derate above 25 C
107
0.71
W/ C
Drain Current-Continuous
S
G
D
CEB SERIES
TO-263(DD-PAK)
CEP SERIES
TO-220
G
S
S
D
D
G
4-132
CEP81A3/CEB81A3
PRELIMINARY
4
ELECTRICAL CHARACTERISTICS (T
C
=25 C unless otherwise noted)
Parameter
Symbol
Condition
Min Typ Max Unit
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
BV
DSS
V
GS
= 0V, I
D
= 250
A
30
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 24V, V
GS
= 0V
1
A
Gate-Body Leakage
I
GSS
V
GS
= 20V, V
DS
= 0V
100
nA
ON CHARACTERISTICS
a
Gate Threshold Voltage
V
GS(th)
V
DS
= V
GS
, I
D
= 250
A
1
3
V
Drain-Source On-State Resistance
R
DS(ON)
V
GS
= 10V, I
D
= 50A
4.5
m
V
GS
= 4.5V, I
D
= 40A
6.0
m
On-State Drain Current
I
D(ON)
V
GS
= 10V, V
DS
= 10V
100
32
A
S
Forward Transconductance
FS
g
DYNAMIC CHARACTERISTICS
b
Input Capacitance
C
ISS
C
RSS
C
OSS
Output Capacitance
Reverse Transfer Capacitance
V
DS
=15V, V
GS
= 0V
f =1.0MH
Z
4800
P
F
P
F
P
F
170
SWITCHING CHARACTERISTICS
b
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
t
D(ON)
t
r
t
D(OFF)
t
f
Fall Time
10
25
ns
ns
ns
ns
100
150
100
140
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Q
g
Q
gs
Q
gd
nC
nC
nC
3.9
4.8
1480
50
70
8
35
V
DS
=15V, I
D
= 50A,
V
GS
=5V
150
V
GS
= 10V
R
GEN
=24
V
DD
= 15V,
I
D
=52A,
V
DS
= 10V, I
D
= 26A
110
CEP81A3/CEB81A3
4-133
4
Parameter
Symbol
Condition
Min Typ Max Unit
ELECTRICAL CHARACTERISTICS (T
C
=25 C unless otherwise noted)
DRAIN-SOURCE DIODE CHARACTERISTICS
Diode Forward Voltage
V
SD
V
GS
= 0V, Is =50A
1.3
V
a
Notes
b.Guaranteed by design, not subject to production testing.
a.Pulse Test:Pulse Width 300 s, Duty Cycle 2%.
4-134
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
Figure 3. Capacitance
V
DS
, Drain-to Source Voltage (V)
V
GS
, Gate-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
I
D
,
D
r
ain
Current(A)
C
,
Capacitance
(pF)
I
D
,
D
r
ain
Current
(A)
CEP81A3/CEB81A3
120
105
90
75
60
45
30
15
0
0
0.5
1.0
1.5
2.0
2.5
3.0
V
GS
=10,8,6,5,4V
V
GS
=3V
V
GS
=2V
R
DS(ON)
,
Nor
maliz
ed
Figure 4. On-Resistance Variation with
Temperature
T
J
, Junction Temperature( C)
On-Resistance(Ohms)
R
DS(ON)
,
Ciss
Coss
Crss
6000
5000
4000
3000
2000
1000
0
0
5
10
15
20
25
30
-55 C
48
60
36
24
12
0
1
1.5
2
2.5
3.5
3
4
25 C
T
J
=125 C
-100
-50
0
50
100
200
2.2
1.9
1.6
1.3
1.0
0.7
0.4
V
GS
=10V
I
D
=50A
150
4
with Temperature
with Temperature
Is,
Source-drain
c
urrent
(A)
Figure 10. Maximum Safe
Operating Area
V
DS
, Drain-Source Voltage (V)
Figure 8. Body Diode Forward Voltage
Variation with Source Current
V
SD
, Body Diode Forward Voltage (V)
I
D
,
D
rain
Current
(A)
4-135
CEP81A3/CEB81A3
Vth,
Normalized
Gate-Source
Threshold
Voltage
Tj, Junction Temperature ( C)
1.30
1.20
1.10
1.00
0.90
0.80
0.70
0.60
-50 -25
0
25
50
75
100 125 150
V
DS
=V
GS
I
D
=250 A
Figure 6. Breakdown Voltage Variation
with Temperature
BV
DSS
,
Normalized
Drain-Source
Breakdown
Voltage
Tj, Junction Temperature ( C)
-50
-25
0
25
50
75 100 125 150
1.15
1.10
1.05
1.00
0.95
0.90
0.85
I
D
=250 A
Figure 5. Gate Threshold Variation
g
FS
,
Transconductance
(S)
Figure 7. Transconductance Variation
with Drain Current
I
DS
, Drain-Source Current (A)
100
80
60
40
20
0
0
20
40
60
80
V
DS
=10V
V
GS
,
Gate
t
o
Source
Voltage
(V)
Figure 9. Gate Charge
Qg, Total Gate Charge (nC)
10
0
2
4
6
8
0
20
40
60
80
V
DS
=15V
I
D
=50A
50
10
0.1
1
0.4
0.6
0.8
1.0
1.2
1.4
10
10
-1
10
10
2
1
0
10
-1
10
1
10
2
10
0
T
C
=25 C
Single Pulse
Tj=175 C
RDS(
ON)
Lim
it
DC
100ms
10ms
1ms
100 s
4
f
4-136
Transient
Thermal
Impedance
Square Wave Pulse Duration (msec)
Figure 13. Normalized Thermal Transient Impedance Curve
r(t),Normalized
Effective
Figure 11. Switching Test Circuit
Figure 12. Switching Waveforms
t
V
V
t
t
d(on)
OUT
IN
on
r
10%
t
d(off)
90%
10%
10%
50%
50%
90%
t
off
t
90%
PULSE WIDTH
INVERTED
V
DD
R
D
V
V
R
S
V
G
GS
IN
GEN
OUT
L
CEP81A3/CEB81A3
P
DM
t
1
t
2
1. R
JC
(t)=r (t) * R
JC
2. R
JC
=See Datasheet
3. T
JM-
T
C
= P* R
JC
(t)
4. Duty Cycle, D=t1/t2
0.1
0.05
0.02
0.01
Single Pulse
10
10
10
4
3
2
10
1
10
0
10
-1
10
-2
10
-2
10
-1
10
0
0.2
D=0.5
4
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