1
Features
Error
Amplifier
V
IN
Gnd
V
OUT
+ -
Current Limit
Sense
V
OUT
Sense*
Bandgap
Reference
Current Source
(Circuit Bias)
Q
P
Q
N
R
R
1
R
2
*Note: Lead shorted to V
OUT
in 3 pin applications
s
5V 2% Output
s
Low 140A (typ)
Quiescent Current
s
150mA Output Current
Capability
s
Fault Protection
-15V Reverse Voltage
Output Current Limit
s
Low Reverse Current
(Output to Input)
Package Options
CS8321
Micropower 5V, 150mA Low Dropout
Linear Regulator
CS8321
Description
The CS8321 is a precision 5V
micropower voltage regulator with
very low quiescent current (140A
typ at 1mA load). The 5V output is
accurate within 2% and supplies
150mA of load current with a typi-
cal dropout voltage of only 300mV.
This combination of low quiescent
current and outstanding regulator
performance makes the CS8321
ideal for any battery operated
equipment.
The regulator is protected against
reverse battery and short circuit
conditions. The device can with-
stand 45V load dump transients
making it suitable for use in auto-
motive environments.
Block Diagram
3L D
2
PAK
1
1. V
IN
2. Gnd
3. V
OUT
Other Packages: 16L SO, 16L PDIP,
8L SO, 8L PDIP, (consult factory)
3L TO-220
1
1. V
IN
2. Gnd
3. V
OUT
Transient Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-15V, 45V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Internally Limited
ESD Susceptibility (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . .2kV
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to 150C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65C to 150C
Lead Temperature Soldering
Wave Solder (through hole styles only) . . . . . . . .10 sec. max, 260C peak
Reflow (SMD styles only) . . . . . . . .60 sec. max above 183C, 230C peak
Absolute Maximum Ratings
A Company
Rev. 11/25/96
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
2
Electrical Characteristics:
6V < V
IN <
26V, I
OUT
=1mA, -40C T
A
125C, -40C T
J
150C unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CS8321
PACKAGE LEAD #
LEAD SYMBOL
FUNCTION
Circuit Description and Application Notes
The CS8321 is a series pass voltage regulator. It consists of
an error amplifier, bandgap voltage reference, PNP pass
transistor with antisaturation control, and current limit.
As the voltage at the input, V
IN
, is increased, Q
N
is for-
ward biased via R. Q
N
provides base drive for Q
P
. As Q
P
becomes forward biased, the output voltage, V
OUT
, begins
to rise as Q
P
s output current charges the output capacitor.
Once V
OUT
rises to a certain level, the error amplifier
becomes biased and provides the appropriate amount of
base current to Q
P
. The error amplifier monitors the scaled
output voltage via an internal voltage divider, R1 and R2,
and compares it to the bandgap voltage reference. The
error amplifiers output is a current which is equal to the
error amplifiers differential input voltage times its
transconductance. Therefore, the error amplifier varies the
base drive current to Q
N
, which provides bias to Q
P
, based
on the difference between the reference voltage and the
scaled output voltage, V
OUT
.
Antisaturation Protection
An antisaturation control circuit has also been added to
prevent the pass transistor from going into deep satura-
tion, which would cause excessive power dissipation due
to large bias currents lost to the substrate via a parasitic
PNP transistor, as shown in Figure 1.
Figure 1. The parasitic PNP transistor which is part of the pass transis-
tor (Q
P
) structure.
V
OUT
Q
P
V
IN
Q
Parasitic
Substrate
Voltage Reference and Output Circuitry
Package Lead Description
s Output Stage
Output Voltage, V
OUT
9V < V
IN
< 16V,
4.90
5.00
5.10
V
100A I
OUT
150mA
Dropout Voltage (V
IN
-V
OUT
)
I
OUT
= 150mA, -40C T
A
85C
0.3
0.5
V
I
OUT
= 150mA, T
A
= 125C
0.6
V
Quiescent Current, (I
Q
)
I
OUT
= 1mA @ V
IN
= 13V
200
A
I
OUT
< 50mA @ V
IN
= 13V
4
6
mA
I
OUT
< 150mA @ V
IN
= 13V
15
25
mA
Load Regulation
V
IN
= 14V, 100A < I
OUT
< 150mA
5
50
mV
Line Regulation
6V < V < 26V, I
OUT
= 1mA
5
50
mV
Ripple Rejection
7 V
IN
17V, I
OUT
= 150mA,
60
75
dB
f = 120Hz
Current Limit
175
250
mA
Short Circuit Output Current
V
OUT
= 0V
60
200
mA
Reverse Current
V
OUT
= 5V, V
IN
= 0V
140
200
A
3L D
2
PAK
3L TO-220
1
1
V
IN
Input Voltage
2
2
Gnd
Ground. All Gnd leads must be connected to Ground.
3
3
V
OUT
5V, 2%, 150mA Output.
3
Current Limit
Limit
The output stage is protected against short circuit condi-
tions. As shown in Figure 2, the output current will fold
back when the faulted load is continually increased. This
technique has been incorporated to limit the total power
dissipation across the device during a short circuit condi-
tion, since the device does not contain overtemperature
shutdown.
Figure 2. Typical current limit and fold back waveform.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
Figure 3: Test and application circuit showing output compensation.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause instabil-
ity. The aluminum electrolytic capacitor is the least expen-
sive solution, but, if the circuit operates at low tempera-
tures (-25C to -40C), both the value and ESR of the
capacitor will vary considerably. The capacitor manufac-
turers data sheet usually provides this information.
The value for the output capacitor C
OUT
shown in Figure 3
should work for most applications, however it is not nec-
essarily the best solution.
To determine an acceptable value for C
OUT
for a particular
application, start with a tantalum capacitor of the recom-
mended value and work towards a less expensive alterna-
tive part.
Step 1:
Place the completed circuit with a tantalum capac-
itor of the recommended value in an environmental cham-
ber at the lowest specified operating temperature and
monitor the outputs with an oscilloscope. A decade box
connected in series with the capacitor will simulate the
higher ESR of an aluminum capacitor. Leave the decade
box outside the chamber, the small resistance added by
the longer leads is negligible.
Step 2:
With the input voltage at its maximum value,
increase the load current slowly from zero to full load
while observing the output for any oscillations. If no oscil-
lations are observed, the capacitor is large enough to
ensure a stable design under steady state conditions.
Step 3:
Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the regulator at low temperature.
Step 4
: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage condi-
tions.
Step 5:
If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capaci-
tor will usually cost less and occupy less board space. If
the output oscillates within the range of expected operat-
ing conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
Step 6:
Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7:
Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regula-
tor performance. Most good quality aluminum electrolytic
capacitors have a tolerance of 20% so the minimum value
found should be increased by at least 50% to allow for this
tolerance plus the variation which will occur at low tem-
peratures. The ESR of the capacitor should be less than 50%
of the maximum allowable ESR found in step 3 above.
CS8321
V
OUT
C
OUT**
10
mF
V
IN
C
IN
*
0.1
mF
* C
IN
required if regulator is located far from the power supply filter.
** C
OUT
required for stability. Capacitor must operate at minimum
temperature expected.
*** Pin internally shorted to V
OUT
in 3 pin applications.
V
OUT
Sense***
Stability Considerations
Output Voltage
0.34257
0.30831
0.27405
0.23980
0.20554
0.17128
0.13703
0.10277
0.06851
0.03426
0.00000
0.00
0.51
1.02
1.52
2.03
2.54
3.05
3.56
4.06
4.57
5.08
Load Current
* Curve will vary with temperature and process variation.
CS8321
Circuit Description and Application Notes: continued
CS8321
Circuit Description and Application Notes: continued
4
The maximum power dissipation for a single output regu-
lator (Figure 3) is:
P
D(max)
=
(
V
IN(max)
V
OUT(min)
)
I
OUT(max)
+V
IN(max)
I
Q
(1)
where:
V
IN(max)
is the maximum input voltage,
V
OUT(min)
is the minimum output voltage,
I
OUT(max)
is the maximum output current for the applica-
tion, and
I
Q
is the quiescent current the regulator consumes at
I
OUT(max)
.
Once the value of P
D(max)
is known, the maximum permis-
sible value of R
QJA
can be calculated:
R
QJA
=
(2)
The value of R
QJA
can then be compared with those in
the package section of the data sheet. Those packages
with R
QJA
's less than the calculated value in equation 2
will keep the die temperature below 150C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
Figure 4: Single output regulator with key performance parameters
labeled.
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed
to determine the value of R
QJA
:
R
QJA
= R
QJC
+ R
QCS
+ R
QSA
(3)
where:
R
QJC
= the junctiontocase thermal resistance,
R
QCS
= the casetoheatsink thermal resistance, and
R
QSA
= the heatsinktoambient thermal resistance.
R
QJC
appears in the package section of the data sheet. Like
R
QJA
, it too is a function of package type. R
QCS
and R
QSA
are functions of the package type, heatsink and the inter-
face between them. These values appear in heatsink data
sheets of heatsink manufacturers.
Heatsinks
V
IN
CS8321
V
OUT
I
OUT
I
IN
I
Q
150C - T
A
P
D
Calculating Power Dissipation
in a Single Output Linear Regulator
3L
3L
Thermal Data
TO-220
D
2
PAK
R
Q
JC
typ
3.5
1.0*
C/W
R
Q
JA
typ
50
10 - 50**
C/W
*Depending on die area
**Depending on thermal properties of substrate. R
QJA
= R
QJC
+ R
QCA
Package Specification
PACKAGE DIMENSIONS IN mm(INCHES)
PACKAGE THERMAL DATA
CS8321
5
3 Lead TO-220 (T) Straight
5.33 (.210)
4.83 (.190)
2.79 (.110)
2.29 (.090)
1.02 (.040)
0.63 (.025)
0.56 (.022)
0.38 (.014)
1.40 (.055)
1.14 (.045)
4.83 (.190)
4.06 (.160)
6.17 (.243) REF
1.14 (.045)
1.52 (.060)
1.14 (.045)
1.40 (.055)
2.87 (.113)
2.62 (.103)
6.55 (.258)
5.94 (.234)
14.22 (.560)
13.72 (.540)
2.92 (.115)
2.29 (.090)
9.78 (.385)
10.54 (.415)
3.71 (.146)
3.96 (.156)
14.99 (.590)
14.22 (.560)
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