ChipFind - документация

Электронный компонент: CRD4281-15

Скачать:  PDF   ZIP

Document Outline

Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
1
Copyright
Cirrus Logic, Inc. 2000
(All Rights Reserved)
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
CrystalClearTM AC '97 2 Channel Low Cost PCI Audio Reference Design
Features
l
2 Channel Low Cost High Performance PCI
Audio Accelerator add-in card
l
CS4281 PCI Audio Controller and CS4297A
Audio Codec `97
l
Complete suite of Analog I/O connections:
Line, Mic, CD, and Aux Inputs
Line and Headphone Outputs
l
S/PDIF (IEC-958) digital output
l
ZV Port Input
l
Joystick/MIDI Interface
l
2-layer low cost adapter board
l
Exceeds Microsoft's
PC 99 audio
performance specifications.
l
Complies with the AC `97 version 2.1
specification
Description
The CRD4281-15 is a low cost PCI add-in board refer-
ence design that showcases Cirrus Logic's
CS4281 audio controller and the CS4297A audio co-
dec. The card features two channel 20-bit DACs, two
channel 18-bit ADCs, an optional ZV port digital input,
and a S/PDIF digital output.
The CRD4281-15 reference design is available by or-
dering the CMK4281-15 manufacturing kit. Use this kit
to help you develop high quality PCI add-in cards and
PC motherboard audio designs. The CMK4281-15 in-
cludes a full set of schematic design files (OrCAD
7.2
format), PCB job files (PADS
ASCII), PCB artwork
files, and bill of materials. This design is production
ready. It can also be easily modified to meet your spe-
cific requirements.
ORDERING INFO
CMK4281-15 (Manufacturing Kit)
PC BEEP
AUX IN
INT MODEM
ZV PORT
CD IN
CDR4281-15
CS4297A
LINE IN
LINE OUT
MIC IN
HP OUT
MIDI /
JOYSTICK
SPDIF OUT
JUN `00
DS308RD15A1
CRD4281-15
CRD4281-15
2
DS308RD15A1
TABLE OF CONTENTS
1. GENERAL INFORMATION ...................................................................................4
2. SCHEMATIC DESCRIPTION ................................................................................4
2.1 Analog Inputs ..............................................................................................4
2.2 ZV Port Digital Input ....................................................................................5
2.3 Line Output .................................................................................................5
2.4 Headphone Output and Anti-Pop Circuitry .................................................5
2.5 CS4281 PCI Controller ...............................................................................5
2.6 CS4297A Audio Codec ..............................................................................5
2.7 Mic Pre-amp and Phantom Power ..............................................................5
2.8 MIDI and Joystick Connection ....................................................................5
2.9 S/PDIF Output ............................................................................................6
2.10 PCI Bus Connection .................................................................................6
2.11 Component Selection ...............................................................................6
2.12 EMI Components ......................................................................................6
3. GROUNDING AND LAYOUT ................................................................................7
3.1 Partitioned Voltage and Ground Planes .....................................................7
3.2 CS4297A Layout Notes ..............................................................................7
4. REFERENCES .......................................................................................................8
4.1 ADDENDUM ...............................................................................................8
5. BILL OF MATERIALS .........................................................................................27
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
Microsoft , Windows 95, Windows 98 and Windows Millennium and WHQL is registered trademark of Microsoft.
CrystalClear is a trademark of Cirrus Logic, Inc.
Intel is a registered trademark of Intel Corporation.
OrCAD is a registered trademark of OrCAD, Inc.
PADS is a registered trademark of, PADS Software, Inc.
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information
describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained
in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express
or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This
document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be
copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior
written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronic
files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) with-
out the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the
prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks
or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found
at http://www.cirrus.com.
CRD4281-15
DS308RD15A1
3
LIST OF FIGURES
Figure 1. Block Diagram .................................................................................................... 9
Figure 2. Audio In ............................................................................................................ 10
Figure 3. ZV Port Digital Input and PC Beep Input .......................................................... 11
Figure 4. Line Out ............................................................................................................ 12
Figure 5. Headphone Output and Output Mute Circuit .................................................... 13
Figure 6. CS4281 PCI Audio Controller ........................................................................... 14
Figure 7. CS4297A Codec ............................................................................................... 15
Figure 8. Microphone Input Circuit .................................................................................. 16
Figure 9. MIDI and Joystick Control ................................................................................ 17
Figure 10. S/PDIF Consumer Digital Output ................................................................... 18
Figure 11. PCI Bus .......................................................................................................... 19
Figure 12. Power ............................................................................................................. 20
Figure 13. Top Assembly Drawing .................................................................................. 21
Figure 14. Top Silkscreen ................................................................................................ 22
Figure 15. PCB Layout: Top Layer .................................................................................. 23
Figure 16. PCB Layout: Bottom Layer ............................................................................. 24
Figure 17. Drill Drawing and Manufacturing Instructions ................................................. 25
Figure 18. Bracket Drawing ............................................................................................. 26
CRD4281-15
4
DS308RD15A1
1. GENERAL INFORMATION
The CRD4281-15 is a PCI add-in card that features
the CS4281 PCI audio controller and the CS4297A
AC-97 audio codec. The CRD4281-15 is a low cost
board with a rich feature set and industry leading
audio performance. In order to maintain high audio
quality, careful consideration has been given to
component selection and PC layout.
The CS4297A is a mixed-signal serial audio codec
based on the Intel AC `97 2.1 specification. The
CS4297A features a 20-bit stereo DAC, an 18-bit
stereo ADC, a digital S/PDIF output, and a very
flexible analog audio mixer. The CS4297A has
four line-level stereo inputs, two mono line-level
inputs, two switchable microphone inputs, and a
stereo pseudo-differential CD input. The input sig-
nals can be routed to the ADC for recording, or
mixed together for recording and direct playback.
The CS4297A has 64 registers that are used to con-
trol its various features such as volume levels,
mutes and signal routing. The CS4297A maintains
high audio quality throughout its signal chain and
exceeds the Microsoft PC-99 audio performance
specification.
The CS4281 controller streams digital audio data
and MIDI over the PCI bus. It also performs hard-
ware-controlled signal processing and sample rate
conversion. The CS4281 features several peripher-
al interfaces including MIDI output, joystick and
game controller input, hardware volume control
and several General Purpose I/Os.
The CS4297A and the CS4281 communicate
through a 5-wire serial digital interface known as
the AC-Link. The AC-Link is used to transfer dig-
ital audio between the two devices. Its is also used
to send commands from the CS4281 to the
CS4297A's registers. For more information on the
AC-Link, see the AC'97 version 2.1 specification.
2. SCHEMATIC DESCRIPTION
The block diagram in Figure 1 illustrates the inter-
connections between the schematic pages. The fol-
lowing are descriptions of the other pages
contained in the schematics.
2.1
Analog Inputs
The inputs for AUX, CD, and LINE shown in
Figure 2 are attenuated 6dB by a voltage dividers.
This allows for input levels up to 2 Vrms. Each of
these inputs has 220 pF EMI suppression capaci-
tors. These may be removed if EMC testing deter-
mines they are not required.
The CS4297A analog inputs and outputs need to
be AC coupled because of internal bias voltages.
10 uF AC coupling capacitors are used on the Line,
CD, Aux, and Internal Modem inputs to minimize
low frequency roll-off. The CS4297A CD input is
pseudo-differential. The CD signal acts as one side
of the differential input and CD_COM as the other.
CD_COM is a common return path for both the left
and right channels. For good common mode rejec-
tion performance, the voltage divider resistors for
CD_COM have been set to half the value of those
for CD L and R inputs.
There are provisions for two types of analog audio
CD connectors. J1 is for the standard ATAPI con-
nector and J2 is for the legacy 2 mm Mitsumi con-
nector. You can install only one of the two
connectors because the footprints of J1 and J2 are
placed on top of each other.
The CRD4281-15 has circuitry to accommodate
the audio from a modem. The modem connection
uses the CS4297A's MONO_OUT and
PHONE_IN. The MONO_OUT circuit has a volt-
age divider that can be adjusted to accommodate
small output levels.
CRD4281-15
DS308RD15A1
5
2.2
ZV Port Digital Input
The ZV port in Figure 3, accepts PCM audio data
in I
2
S serial format and routes it to the CS4334
DAC. The analog output of this DAC is connected
to the VIDEO_IN audio inputs of the CS4297A.
2.3
Line Output
The LINE_OUT circuit in Figure 4 consists of a
Motorola MC1458 dual op-amp. This device is ca-
pable of driving high impedance line level signals,
such as powered speakers, and stereo headphones
with impedances greater than 32
. This circuit has
a gain of 6 dB. The output of the op-amp is con-
nected to an anti-pop circuit that is described in
Figure 5. This anti-pop circuit suppresses power-
on transient pops.
2.4
Headphone Output and Anti-Pop
Circuitry
The headphone output circuit in Figure 5 consists
of a Motorola MC1458 dual op-amp connected to
the ALT_LINE_OUT of the CS4297A. The
MC1458 circuit has a gain of 6 dB and is capable
of driving stereo headphones with impedances
greater than 32
.
The headphone output is connected to an anti-pop
circuit. During power up, transistors Q5-Q8 in the
anti-pop circuit suppress power-on transients by
temporarily muting the audio output.
2.5
CS4281 PCI Controller
The CS4281, in Figure 6, has 0.1
F decoupling
capacitors connected to each of its power pins. All
of these capacitors are located physically close to
the device. L3, C56, and C57 are used to filter the
power supply for the internal PLL circuit.
The AC-Link requires series termination resistors
to prevent reflections. The resistors are placed as
close as possible to device originating the signal.
The CS4281 generates SYNC and SDATA_OUT
and each has a 47 ohm series termination resistor,
R19 and R20.
All unused inputs and bi-directional pins on the
CS4281 are tied to their respective inactive levels
through a 10 k
resistor.
2.6
CS4297A Audio Codec
The audio codec is shown in Figure 7. All analog
inputs are sent to the codec from the circuitry in
Figure 2 (Audio In) and Figure 8 (Microphone In).
All of these signals are AC coupled. Unused analog
input should be tied to Vref (pin 28) or AC coupled
to ground through a capacitor to prevent noise. Mic
2 is the only unused input on the CRD4281-15 and
is tied directly to Vref.
The CS4297A generates two AC-Link signals,
BITCLK and SDATA_IN. Both outputs have a
47
series termination resistor to prevent reflec-
tions on the AC-Link.
2.7
Mic Pre-amp and Phantom Power
The microphone pre-amp in figure 8 uses a Motor-
ola MC33078D low noise dual op-amp. One of the
op-amps provides 18 dB gain stage for the micro-
phone. The other op-amp buffers the phantom pow-
er supply for the mic. The phantom power is
derived from the +5 V analog supply and buffered
by U10A to provide a maximum of +4.2 V with no
load and a minimum of +2.0 V under a 0.8 mA
load, as required by PC 99. The microphone circuit
also has 3 dB rolloffs at 60 Hz and 15 kHz as spec-
ified in PC-99.
2.8
MIDI and Joystick Connection
The MIDIOUT buffer driver circuit in Figure 9 is
used to provide +5 V TTL compatible output on the
DB-15 connector. This circuit can be removed, and
R37 populated to bypass the buffer circuit if a
+3.3 V compatible output is sufficient. L4, C72,
C77, C78, C79 are provided for EMI suppression
and can be removed if EMC testing shows they are
not required. In this case, replace L4 with a 0
re-
sistor. C73 - C76 and C80 - C83 are required for the
CRD4281-15
6
DS308RD15A1
joystick circuitry to be functional and must not be
removed.
2.9
S/PDIF Output
The S/PDIF (IEC-958) digital output, in Figure 10,
is compatible with digital inputs on consumer de-
vices such as consumer stereo receivers and
MiniDisk recorders. The CS4297A S/PDIF output
is coupled to J16 through an isolation transformer.
This design uses a low cost industry standard de-
vice, the PE65612 by Pulse Engineering.
The S/PDIF and DAC outputs are derived from the
same 48 KHz PCM signal. This means that what-
ever digitally effects LINE_OUT, such as sample
rate conversion, also effects the S/PDIF output.
2.10
PCI Bus Connection
The PCI 2.1 specification requires that each unused
+3.3 V power pin should be connected with an av-
erage of 0.01
F capacitor. In Figure 11, seven
0.1
F capacitors in parallel provide the required
capacitance for the +3.3 V power pins.
Power Supplies
The CS4297A requires both a digital +3.3 V and an
analog +5 V supply. The digital power is supplied
from the PCI bus. A separate regulator is recom-
mended for the analog voltage supply to provide
good audio signal quality. In Figure 12, a Motorola
MC78M05 regulates the +12 V supply from the
PCI bus down to a clean +5 V analog supply. For
the best audio performance, the analog voltage reg-
ulator, should be located near the CS4297A. Op-
tionally, U3, a 78L05, can be used in applications
where LINE_OUT and ALT_LINE_OUT are only
going to drive high impedance loads (10 K
or
greater). The -12 V power pin is decoupled through
C29 and C30, and supplies power to the headphone
circuit.
The Micrel MIC2920A low dropout regulator is
provides the required +3.3 V to the CS4281 in the
absence of +3.3 V on the PCI bus. Two packaging
options are supported. U8 is a SOT-223 surface
mount package, and U9 is a TO-220 through hole
package. 0
resistors are provided as a build op-
tion if +3.3 V is guaranteed to be available on the
PCI bus.
2.11
Component Selection
Great attention was given to the particular compo-
nents used on the CRD4281-15 board with cost,
performance, and package selection as the most im-
portant factors. Listed are some of the guidelines
used in the selection of components:
No components smaller than 0805 package.
Only single package components; no resistor
packs.
8-pin devices are in surface mount packages.
Dual footprint for the 24.576 MHz. crystal.
Standard H49S, and small circular CA-301
through hole package.
Dual footprint for +5 V and +3.3 V regulators.
Surface mount and through hole packages are
supported.
2.12
EMI Components
A number of capacitors and inductors are included
to help the board meet EMI compliance tests, such
as FCC Part 15. Modifying this selection of compo-
nents without EMC testing could result in EMC
compliance failure.
CRD4281-15
DS308RD15A1
7
3. GROUNDING AND LAYOUT
The component layout and signal routing of the
CRD4281-15 provides a good model for laying out
your own PCI add-in card. PCI-bus based add-in
cards have explicit requirements on trace lengths
that are not imposed on motherboard designs.
These trace length limits for add-in cards are as fol-
lows:
Maximum trace length for 32-bit signals on 32-
bit and 64-bit cards is 1.5 inches.
Maximum trace lengths for signals on the 64-
bit extension are 2 inches.
Trace length for the PCI CLK signal is 2.5
inches 0.1 inch.
The PCI CLK signal must drive only one load.
Please refer to the PCI 2.1 Specification , Section
4.3.6, for information on routing PCI bus signals on
a motherboard.
3.1
Partitioned Voltage and Ground
Planes
The CRD4281-15 is partitioned into separate digi-
tal and analog sections to prevent digital noise from
affecting the performance of the analog circuits.
The analog section is completely isolated from the
digital section. The analog and digital sections each
have their own separate ground plane. All analog
components, power traces and signal traces lie over
the analog ground plane. Digital components, pow-
er traces and signal traces are not allowed to cross-
over into the analog section.
The CS4297A is placed at the transition point be-
tween the analog and digital ground planes. The
pins are arranged on the CS4297A so that the ana-
log and digital signals are separated from each oth-
er. The analog and digital ground planes must be
tied together for the codec to maintain proper volt-
age references. For best results, the two ground
planes are tied together with a single wide trace un-
der the codec near its digital ground pins.
Data converters are generally susceptible to noise
on the crystal pins. In order reduce noise from cou-
pling onto these pins, the area around the crystal
and its signal traces is filled with copper on the top
and bottom of the PCB and attached to digital
ground.
A separate chassis ground provides a reference
plane for all of the EMI suppression components.
The chassis ground plane is connected to the analog
ground plane at the external jacks.
3.2
CS4297A Layout Notes
Refer to the CS4297A Data Sheet for partitioning
and bypass capacitors placement. Pay close atten-
tion to bypass capacitors on REFFLT, AFLT1,
AFLT2 and the power supply capacitors.
CRD4281-15
8
DS308RD15A1
4. REFERENCES
1) Intel, Audio Codec `97 Component Specification, Revision 2.1, May 22, 1998.
http://developer.intel.com/pc-supp/platform/ac97/
2) PCI Special Interest Group, PCI Local Bus Specification, Revision 2.1, June 1, 1995.
http://www.pcisig.com/
3) Cirrus Logic, CS4281 PCI Audio Interface Data Sheet
http://www.cirrus.com/products/overviews/cs4281.html
4) Cirrus Logic, CS4297A SoundFusion Audio Codec `97 Data Sheet
http://www.cirrus.com/products/overviews/CS4297A.html
5) Steve Harris, Clif Sanchez, Personal Computer Audio Quality Measurements, Ver 1.0
http://www.cirrus.com/products/papers/meas/meas.html
6) Microsoft, PC Design Guidelines,
http://www.microsoft.com/hwdev/desguid/
7) M. Montrose. Printed Circuit Board Design Techniques for EMC Compliance, IEEE Press, New York:
1996.
4.1
ADDENDUM
Schematic drawings
Layout drawings
Bracket drawings
Bill of materials
CRD4281-15
DS308RD15A1
9
PCI_BUS
PAR
STOP#
TRDY#
FRAME#
INTA#
RST#
GNT#
IDSEL
CLK
REQ#
IRDY#
AD[31..0]
PERR#
DEVSEL#
C/BE[3..0]#
CS4281
INTA#
REQ#
RST#
CLK
GNT#
IRDY#
TRDY#
STOP#
ASDOUT
ASDIN
ARST#
MIDIIN
MIDIOUT
JBCX
JBCY
JACY
AD[31..0]
JACX
JAB1
JAB2
JBB1
JBB2
ABITCLK
ASYNC
FRAME#
DEVSEL#
PERR#
PAR
IDSEL
C/BE[3..0]#
AUDIO IN
AUX_R
AUX_L
ZV_R
ZV_L
LINE_INL
LINE_INR
CD_INR
CD_INL
CD_COM
MONO_OUT
PHONE_IN
PCBEEP
CS4297A
CD_INR
CD_COM
LINE_INR
LINE_INL
MIC1
CD_INL
AUX_R
AUX_L
ASYNC
LINE_OUTR
ASDOUT
ASDIN
ABITCLK
ZV_L
ZV_R
PHONE_IN
ARST#
MONO_OUT
LINE_OUTL
ALT_LINE_OUTL
ALT_LINE_OUTR
PCBEEP
SPDIF_TX
Power
MIC IN
MIC1
Off Board Digital
JAB2
MIDIOUT
MIDIIN
JBB1
JBCY
JBB2
JACX
JBCX
JAB1
JACY
SPDIF_TX
AUDIO OUT
LINE_OUTL
LINE_OUTR
ALT_LINE_OUTR
ALT_LINE_OUTL
C/BE[3..0]#
AD[31..0]
Figure 1. Block Diagram
C
RD4281-15
10
DS
308
RD15A
1
AGND
AGND
AGND
AGND
CGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
+
C12
10uF
ELEC
R45
6.8K
+
C7
10uF
ELEC
R46
6.8K
R48
6.8K
R57
3.4K
C14
220pF
NPO
+
C11
10uF
ELEC
C101
220pF
NPO
C6
220pF
NPO
R49
6.8K
C4
220pF
NPO
+
C2
10uF
ELEC
C10
220pF
NPO
R51
6.8K
+
C8
10uF
ELEC
C5
220pF
NPO
R55
3.4K
+
C3
10uF
ELEC
+
C99
10uF
ELEC
R36
47K
J3
4
3
5
2
1
R54
6.8K
R52
6.8K
+
C1
10uF
ELEC
+
C100
10uF
ELEC
J2
B4B-PH-K
1
2
3
4
R34
27K
R61
6.8K
Out
G
G
In
J11
4X1HDR-SN/PB
1
2
3
4
R
G
G
L
J4
4X1HDR-SN/PB
1
2
3
4
R35
47K
R62
6.8K
R50
6.8K
R47
6.8K
R
G
G
L
J1
4X1HDR-SN/PB
1
2
3
4
R53
6.8K
C102
220pF
NPO
C9
220pF
NPO
C13
220pF
NPO
PHONE_IN
LINE_INL
CD_COM
AUX_R
MONO_OUT
CD_INR
LINE_INR
AUX_L
CD_INL
INTERNAL MODEM
TO MODEM
Connect CGND to
AGND at the
jack
GND
R
DO NOT
POPULATE
J2
Line In
AUX IN
GND
CDROM IN
FROM MODEM
L
MITSUMI
Figure 2. Audio In
C
RD4281-15
DS3
08R
D15A1
11
AGND
AGND
AGND
+3.3VD
AGND
+5VA
DGND
ZSDATA
ZSCLK
ZLRCLK
C127
2200pF
COG
R88
560
U11
CS4334
1
2
3
4
5
6
7
8
SDATA
DEM/SCLK
LRCK
MCLK
AOUTR
AGND
VA+
AOUTL
R87
560
C124
1.0uF
C123
.1uF
C126
1.0uF
R86
100K
C125
2200pF
COG
R
G
G
L
J6
4X1HDR-SN/PB
1
2
3
4
R91
390
C129
680pF
X7R
R89
47K
R90
47K
C128
0.1uF
J15
1X2 HDR
1
2
ZV_R
ZV_L
PCBEEP
ZVPORT
Digital Input
(I S)
PC
BEEP
Do Not Populate
2
Figure 3. ZV Port Digital Input and PC Beep Input
C
RD4281-15
12
DS
308
RD15A
1
CGND
AGND
AGND
+12VA
+12VA
AGND
AGND
-12VA
-12VA
MUTE_LINE_R
MUTE_LINE_L
R5
220K
+
-
U1A
MC1458
3
2
1
8
4
+
-
U1B
MC1458
5
6
7
8
4
R8
56K
R10
56K
R9 27K
R11 27K
C26
220pF
NPO
C27
220pF
NPO
R6
220K
C28
22pF
NPO
C25
22pF
NPO
+
C36
10UF
1
2
J8
4
3
5
2
1
+
C34
10UF
1
2
LINE_OUTL
LINE_OUTR
Connect CGND
to AGND at
the jack
LINE OUT
Figure 4. Line Out
CRD4281-15
DS308RD15A1
13
AGND
AGND
+12VA
AGND
+12VA
+12VA
AGND
AGND
-12VA
-12VA
CGND
AGND
AGND
MUTE_LINE_R
MUTE_LINE_L
R101
2.2K
R98
2.2K
Q5
MMBT3904LT1
1
3
2
Q6
MMBT3904LT1
1
3
2
R99
10K
Q4
MMBT3906ALT1
1
3
2
D1
MMBD7000LT1
1
2
3
+
C136
10UF
1
2
R100
10K
+
C137
10UF
1
2
R102
2.2K
R103
2.2K
Q7
MMBT3904LT1
1
3
2
Q8
MMBT3904LT1
1
3
2
+
C131
10UF
1
2
+
C135
10UF
1
2
+
-
U12A
MC1458
3
2
1
8
4
+
-
U12B
MC1458
5
6
7
8
4
R92
56K
R94
56K
R93
27K
R97
27K
C132
22pF
NPO
C130
22pF
NPO
R95
220K
C133
220pF
NPO
C134
220pF
NPO
R96
220K
J14
4
3
5
2
1
ALT_LINE_OUTL
ALT_LINE_OUTR
ANTI-POP CIRCUIT
VIN(max) = 1 Vrms
ATTN. BY -10.75 dB
V = .29 Vrms
HEADPHONE OUT
Connect CGND
to AGND at
the jack
Figure 5. Headphone Output and Output Mute Circuit
C
RD4281-15
14
DS
308
RD15A
1
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
+3.3VD
DGND
DGND
DGND
DGND
DGND
DGND
+3.3VD
+3.3VD
+3.3VD
+5V_PCI
DGND
DGND
+3.3VD
+3.3VD
+3.3VD
+3.3VD
+3.3VD
+3.3VD
+3.3VD
+3.3VD
+3.3VD
+3.3VD
+3.3VD
DGND
+3.3VD
DGND
+3.3VD
+3.3VD
AD26
AD25
AD16
AD15
AD28
AD2
AD17
AD20
AD11
AD14
AD21
AD30
AD4
AD0
AD5
AD19
AD24
AD12
AD18
AD22
AD23
AD[31..0]
AD8
AD13
AD3
AD7
AD9
AD31
AD29
AD27
AD1
AD6
AD10
C/BE2
C/BE0
C/BE1
C/BE3
C/BE[3..0]#
VOLDN
VOLUP
VOLDN
VOLUP
C57
0.1uF
X7R
C56
1000pF
NPO
L3
120@100MHz
R65
100
R64
100
R20
47
R19
47
C104
100pF
COG
C105
100pF
COG
R63
10K
C58
0.1uF
X7R
U7
24LC00
6
5
8
1
2
7
4
3
SCL
SDA
Vcc
nc1
nc2 nc4
Vss
nc3
C61
0.1uF
X7R
R21
4.7K
C67
0.1uF
X7R
C70
0.1uF
X7R
C65
0.1uF
X7R
C116
0.1uF
X7R
C59
0.1uF
X7R
C60
0.1uF
X7R
C66
0.1uF
X7R
C62
0.1uF
X7R
C64
0.1uF
X7R
C69
0.1uF
X7R
C117
0.1uF
X7R
C118
0.1uF
X7R
R76
4.7K
R77
4.7K
U
G
D
G
J12
4X1HDR-SN/PB
1
2
3
4
MQFP
U6
CS4281
74
2
76
3
4
5
6
75
77
9
11
10
78
56
58
52
54
55
53
14
15
16
17
20
23
24
25
26
27
28
29
32
33
34
35
36
37
38
41
42
43
44
45
46
47
48
59
57
60
63
66
70
71
79
80
51
81
82
83
84
85
97
96
92
91
90
89
88
95
69
19
12
61
64
68
86
94
100
8
21
31
39
50
72
87
93
1
7
22
30
40
49
18
13
62
65
67
98
99
73
ABITCLK
AD23
ASDIN
AD22
AD21
AD20
AD19
ASDOUT
ASYNC
AD18
AD16
AD17
ARST
JAB1
JBB1
JACX
JBCX
JBCY
JACY
CBE2
FRAME
IRDY
TRDY
DEVSEL
STOP
PERR
IRQA
PAR
CBE1
AD15
AD14
AD13
AD12
AD11
AD10
AD09
AD08
CBEO
AD07
AD06
AD05
AD04
AD03
AD02
AD01
AD00
JBB2
JAB2
MIDIIN
MIDIOUT
ASDIN2/GPIO1
VOLUP
VOLDN
EECLK/GPOUT/PCREQ#
EEDAT/GPIO2/PCGNT#
TEST
INTA
RST
PCICLK
PCI_GNT
PCI_REQ
AD24
AD25
AD27
AD28
AD29
AD30
AD31
AD26
CRYVDD
IRQB
CVDD1
CVDD2
TESTSEL
3.3VAUX
PCIVDD0
GPIO3
PCIVDD2
PCIVDD3
PCIVDD4
PCIVDD5
PCIVDD6
PCIVDD7
CRYGND
PCIGND0
CLKRUN#
PCIGND2
PCIGND3
PCIGND4
PCIGND5
PCIGND6
PCIGND7
IRQC
CGND1
CGND2
CGND3
PME#
CBE3
IDSEL
VDD5REF
INTA#
REQ#
RST#
CLK
GNT#
IRDY#
TRDY#
STOP#
ASDIN
MIDIIN
MIDIOUT
JBCX
JBCY
JACY
AD[31..0]
JACX
JAB1
JAB2
JBB1
JBB2
FRAME#
DEVSEL#
PERR#
PAR
IDSEL
C/BE[3..0]#
ABITCLK
ARST#
ASYNC
ASDOUT
PIN 39
CS4281 PCIVDD PINS
PIN 50
PIN 31
PIN 86
PIN 8
PIN 21
CS4281 CVDD PINS
PIN 12
PIN 68
CS4281 3.3VAUX PIN
Hardware Volume
Control
PIN 8
PIN 21
PIN 31
PIN 39
PIN 61
PIN 67
Do not populate R76 &
R77 for Cs4281
PIN 100
Backwards compatible
connections for CS4614/B
Figure 6. CS4281 PCI Audio Controller
C
RD4281-15
DS3
08R
D15A1
15
DGND
AGND
DGND
AGND
+5VA
DGND
AGND
+3.3VD
AGND
SPDIF_TX
C49
0.1uF
X7R
C52
0.1uF
X7R
R17
47
C45
22pF
NPO
C46
22pF
NPO
Y2
24.576 MHz
Y1
24.576 MHz
C106
0.01uF
X7R
R66
0
C50
1.0uF
C51
1.0uF
C107
1000pF
NPO
C53
1000pF
NPO
C54
1000pF
NPO
R104
No Pop
R105
0
R106
0
C138
680pF
NPO
C139
680pF
NPO
R18
47
U5
CS4297A
36
37
38
39
44
41
42
43
40
34
33
32
31
1
2
3
4
5
6
7
8
10
9
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
48
47
46
45
35
LINE_OUT_R
MONO_OUT
AVdd2
ALT_LINE_OUT_L
nc7
ALT_LINE_OUT_R
AVss2
nc6
nc5
FLTO
FLTI
FLT3D
BCFG
DVdd1
XTL_IN
XTL_OUT
DVss1
SDATA_OUT
BIT_CLK
DVss2
SDATA_IN
SYNC
DVdd2
RESET#
PC_BEEP
PHONE
AUX_L
AUX_R
VIDEO_L
VIDEO_R
CD_L
CD_GND
CD_R
MIC1
MIC2
LINE_IN_L
LINE_IN_R
AVdd1
AVss1
REFFLT
Vrefout
AFLT1
AFLT2
S/PDIF_OUT
EAPD
ID1#
ID0#
LINE_OUT_L
C48
680pF
NPO
C103
680pF
NPO
C47
680pF
NPO
CD_INR
CD_COM
LINE_INR
LINE_INL
MIC1
CD_INL
AUX_R
AUX_L
ASYNC
ASDOUT
ASDIN
ZV_R
PHONE_IN
ARST#
ZV_L
PCBEEP
ALT_LINE_OUTL
ALT_LINE_OUTR
SPDIF_TX
LINE_OUTR
LINE_OUTL
ABITCLK
MONO_OUT
TIE UNUSED ANALOG
INPUTS TO VREF.
DUAL FOOTPRINT LAYOUT
FOR XTAL.
layout Y1 on top of
Y2 -- populate only
one XTAL
Do not populate C107,
C106 for CS4297.
Do not populate R66.
Figure 7. CS4297A Codec
C
RD4281-15
16
DS
308
RD15A
1
AGND
AGND
+5VA
AGND
CGND
AGND
AGND
AGND
+5VA
+5VA
AGND
AGND
+5VA
AGND
R73
2.7K
R72
47K
R75
47K
R74
6.8K
R69
68K
R71
100K
R70
47K
R68
47K
+
-
U10A
MC33078D
3
2
1
8
4
+
-
U10B
MC33078D
5
6
7
8
4
C110
1uF
X7R
C109 0.068 uF
X7R
C114
0.1uF
X7R
C111
220pF
NPO
C112
220pF
NPO
C115
220pF
NPO
+
C108
10UF
1
2
+
C113
10UF
1
2
R79
0
C119
0.1uF
X7R
R80
0
J5
4
3
5
2
1
MIC1
place close to
pins 8 and 4
Connect CGND
to the jack
1) Do not populate U10, R68, R69, R70,
R71, R72, R74, R75, C113, C114 and C115.
For Microphone Circuit without Op Amp
2) Populate R79, R80 and C119
3) Populate: 2.2K for R73
2.5K for R68
100 ohm for C109
(fits on the same pad)
0.1uF for C110
Do not populate R79
for Pre Amp Mic
Circuit
Do not populate R80
& C119 for Pre Amp
Mic Circuit
Figure 8. Microphone Input Circuit
C
RD4281-15
DS3
08R
D15A1
17
+5V_PCI
+3.3VD
DGND
DGND
DGND
+5V_PCI
CGND
CGND
+5V_PCI
R41
10K
R38
39K
Q2
MMBT3904LT1
1
3
2
R42
20K
Q1
MMBT2907ALT1
1
3
2
R37
100
R30
2.2K
C77
100pF
COG
R32
2.2K
R33
2.2K
R31
2.2K
R40
39K
F
H4
FIDUCIAL
F
H3
FIDUCIAL
H5
TOOLHOLE
F
H2
FIDUCIAL
C78
100pF
COG
C76
1000pF
NPO
C80
12000pF
X7R
C82
12000pF
X7R
C83
12000pF
X7R
C81
12000pF
X7R
R23
47K
R39
5.6K
R26
4.7K
C73
1000pF
NPO
C72
0.1uF
X7R
R24
4.7K
R25
4.7K
J10
DB15
8
15
7
14
6
13
5
12
4
11
3
10
2
9
1
17
16
L4
31@100MHz
C74
1000pF
NPO
C75
1000pF
NPO
C79
0.1uF
X7R
R27
4.7K
JAB2
MIDIOUT
MIDIIN
JBCY
JBB2
JACX
JBCX
JACY
JAB1
JBB1
optional MIDI out buffer -- populate as necessary
populate instead of MIDI
out buffer as necessary
Place Near
Inky
Populate R23 for
CS4280
Figure 9. MIDI and Joystick Control
C
RD4281-15
18
DS
308
RD15A
1
DGND
DGND
R85
374 1%
R107
90.9 1%
J16
ARJ-2018-1
1
2
T1
PE65612
4
1
3
2
SPDIF_TX
SPDIF (IEC-958)
Consumer Digital Output
Transformer Isolated
RCA
Jack
Figure 10. S/PDIF Consumer Digital Output
CRD4281-15
DS308RD15A1
19
DGND
+5V_PCI
+12VD
DGND
+5V_PCI
DGND
+3.3V_PCI
DGND
-12VD
DGND
+3.3V_PCI
+3.3V_PCI
+3.3V_PCI
+3.3VD
+3.3V_PCI
C/BE0
C/BE3
C/BE1
AD3
AD8
AD4
AD28
AD19
AD24
AD31
AD[31..0]
AD16
AD0
AD6
AD17
AD22
AD1
AD27
AD26
AD30
AD14
AD29
AD10
AD2
AD18
AD23
AD9
AD21
AD25
AD11
AD20
AD13
AD5
AD15
AD7
AD12
C/BE2
C/BE[3..0]#
Side B
P2
PCI BUS 5V B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
-12V
TCK
GND11
TDO
+5V(8)
+5V(9)
INTB#
INTD#
PRSNT1#
RSVD(4)
PRSNT2#
GND(12)
GND(13)
RSVD(5)
GND(14)
CLK
GND(15)
REQ#
+5V(10)
AD[31]
AD[29]
GND(16)
AD[27]
AD[25]
+3.3V(7)
C/BE[3]#
AD[23]
GND(17)
AD[21]
AD[19]
+3.3V(8)
AD[17]
C/BE[2]#
GND(18)
IRDY#
+3.3V(9)
DEVSEL#
GND(19)
LOCK#
PERR#
+3.3V(10)
SERR#
+3.3V(11)
C/BE[1]#
AD[14]
GND(20)
AD[12]
AD[10]
GND(21)
KEY3
KEY4
AD[8]
AD[7]
+3.3V(12)
AD[5]
AD[3]
GND(22)
AD[1]
+5V(11)
ACK64#
+5V(12)
+5V(13)
C85
0.1uF
X7R
C86
0.1uF
X7R
C87
0.1uF
X7R
C98
0.1uF
X7R
C94
0.1uF
X7R
C95
0.1uF
X7R
C96
0.1uF
X7R
C97
0.1uF
X7R
R43
No Pop
R44
No Pop
Side A
P1
PCI BUS 5V A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
TRST#
+12V
TMS
TDI
+5V(1)
INTA#
INTC#
+5V(2)
RSVD(1)
+5V(3)
RSVD(2)
GND(1)
GND(2)
RSVD(3)
RST#
+5V(4)
GNT#
GND(3)
PME#
AD[30]
+3.3V(1)
AD[28]
AD[26]
GND(4)
AD[24]
IDSEL
+3.3V(2)
AD[22]
AD[20]
GND(5)
AD[18]
AD[16]
+3.3V(3)
FRAME#
GND(6)
TRDY#
GND(7)
STOP#
+3.3V(4)
SDONE
SBO#
GND(8)
PAR
AD[15]
+3.3V(5)
AD[13]
AD[11]
GND(9)
AD[9]
KEY1
KEY2
C/BE[0]#
+3.3V(6)
AD[6]
AD[4]
GND(10)
AD[2]
AD[0]
+5V(5)
REQ64#
+5V(6)
+5V(7)
C93
0.1uF
X7R
+
C92
10UF
1
2
+
C84
10UF
1
2
PAR
STOP#
TRDY#
FRAME#
INTA#
RST#
GNT#
IDSEL
CLK
REQ#
IRDY#
AD[31..0]
DEVSEL#
C/BE[3..0]#
PERR#
PRSNT2#, PRSNT1# = 00
Power Requirement =
7.5W max
PCI BUS
PCI Bus +3.3V supply.
Place near PCI edge
connector
PCI Bus +5V_PCI
Side B near pin
1
Connect AGND to DGND with a 50 mil trace near the CS4297
Connect CGND to DGND with a 50 mil trace near the finger
edge of the board.
Unused PCI Bus +3.3V supply.
Place near PCI edge
connector
POPULATE 0 OHM
RESISTORS ONLY IF 3.3V
IS AVAILABLE ON PCI
BUS AND 3.3V REGULATOR
IS NOT REQUIRED
Figure 11. PCI Bus
CRD4281-15
20
DS308RD15A1
+3.3VD
DGND
+5V_PCI
DGND
+12VD
+12VA
+5VA
AGND
AGND
-12VD
-12VA
AGND
U8
MIC2920A,400ma,SOT223
1
3
2
4
IN
OUT
GND
NC
U9
MIC2920A,400ma,TO220
1
3
2
IN
OUT
GND
C90
0.1uF
X7R
C91
0.1uF
X7R
U3
MC78L05AC
3
2
1
IN
GND
OUT
C33
0.1uF
X7R
L2
31@100MHz
C30
0.1uF
X7R
L1
31@100MHz
+
C88
10UF
1
2
+
C89
10UF
1
2
+
C32
10UF
1
2
U2
MC78M05ACDT
3
2
1
OUT
GND
IN
+
C29
10uF ELEC
+
C31
10uF ELEC
Connect AGND to DGND with a 50 mil trace near the CS4297A
Connect CGND to DGND with a 50 mil trace near the finger
edge of the board.
SURFACE MOUNT
POPULATION
OPTION
PIN IN HOLE
POPULATION
OPTION
U8 OR U9 IS NOT REQUIRED IF
3.3V IS AVAILABLE ON THE
PCI BUS. IF REMOVED, STUFF
0 OHM RESISTORS AS SHOWN ON
PAGE 8. CONTINUE TO
POPULATE C88 - C91.
SURFACE MOUNT
POPULATION
OPTION
PIN IN HOLE
POPULATION
OPTION
5 VA Power
1) CS4297A = 35 mA
2) CS4334 = 15mA
Figure 12
. Po
w
e
r
CRD4281-15
DS308RD15A1
21
Figure 13. Top Assembly Drawing
CRD4281-15
22
DS308RD15A1
Figure 14. Top Silkscreen
CRD4281-15
DS308RD15A1
23
Figure 15. PCB Layout: Top Layer
CRD4281-15
24
DS308RD15A1
Figure 16. PCB Layout: Bottom Layer
CRD4281-15
DS308RD15A1
25
Figure 17. Drill Drawing and Manufacturing Instructions
C
RD4281-15
26
DS
308
RD15A
1
Figure 18. Bracket Drawing
CRD4281-15
27
DS308RD15A1
5.
BILL O
F
MATER
IALS
Ite
m
Qt
y
Descri
ption
Reference
Packa
g
e
Man
f
.
Part
Number
1
2
5
C
AP
,ELE
C,
10UF
,
T
H,CAS
E
A,20%,
1
6
V
C1,C2,
C3,C7,C8,
C1
1
,
C12,
C99,C100,
C2
9,
C31
C32,C34,
C36
,
C40,C84,
C
88,
C89,C92,
C10
8,
C1
13,
C131,C135,
C
136,
C137
P
T
H 5
M
M
P
A
N
AS
ONI
C
EC
E-A
16Z
10
2
1
6
C
AP
, 0805, C
0
G
,
220pF
,

5%, 50V
C4,C5,
C6,C9,C10,
C13
,
C14,
C26,C27,
C10
1,
C102,C1
1
1
,C1
12,C1
15,
C
133,C134
CSN
_0805
KE
ME
T
C0805C221
J5GAC
3
6
CAP
,
0805, C
0
G
,
22pF
,

5%, 50V
C25,C28,
C45
,
C46,C130,C132
CSN
_0805
KE
ME
T
C0805C220
J5GAC
4
3
9
C
AP
, 0805, X
7R, .1uF
, 10%, 5
0
V
C30,C33,
C41
,
C42,C43,
C
44,
C49,C52,
C57
,
C58,C59,
C
60,
C61,C62,
C64
,
C65,C66,
C
67,
C69,C70,
C72
,
C79,C85,
C
86,
C87,C90,
C91
,
C93,C94,
C
95,
C96,C97,
C98
,
C
1
14,C1
16,
C1
17,C1
18,C1
19,
C1
28
CSN
_0805
KE
ME
T
C0805C104
K5RA
C
5
2
CAP
,
1.
0UF
,
S
O,
1206,+80/
-
20%,
25V
,
Y
5V
C50,C51
CSN
_1206
MU
RA
T
A
GRM42
-
6Y5
V
105Z25BL
6
6
CAP
,
0805, C
0
G
,
680pF
,

10%, 50V
C47,C48,
C10
3,
C129,C138,C139
CSN
_0805
KE
ME
T
C0805C681
K5GAC
7
8
CAP
,
0805, C
0
G
,
1000pF
,

10%, 50V
C53,C54,
C56
,
C73,C74,
C
75,

C76,
C
107
CSN
_0805
KE
ME
T
C0805C102
K5GAC
8
4
CAP
,
0805,
COG
,

100pF
, 5%, 50V
C77,C78,
C10
4,
C105
CSN
_0805
KE
ME
T
C0805C101
J5GAC
9
4
CAP
,
0805, X
7R, 12000pF
,

10%, 50V
C80,C81,
C82
,
C83
CSN
_0805
KE
ME
T
C0805C123
K5RA
C
10
1
C
AP
, 0805, X
7R, 68000pF
,

10%, 50V
C109
CSN
_0805
KE
ME
T
C0805C683
K5RA
C
1
1
1
C
ERM

C
A
P
,
.
0
1uF
,
10%,
50V
,
X
7R
C106
CSN
_0805
KE
ME
T
C0805C103
K5RA
C
12
1
C
AP
, 1206, X
7R, 1uF
,

10%,

25V
C1
10
CSN
_1206
VE
NKE
L
C1206X
7R500-
105K
NE
13
4
HDR,
4X
1,
0.
025" PIN,
0.
1" CT
R
,
150u"
SN/PB
J
1,J4,J1
1
,J12
CON_M
LX_70553_4
MOLE
X
70553-000
3
14
4
1
/8"
PHO
N
O

J
A
CK
J3,
J
5,
J14,
J8
AJ
-356
A/
D
ELE
C
T
R
O
N
-
IC
S
AJ
-3056A
-5P
15
1
J
15
P
T
H-2
S
am
t
e
k
TS
W
-
102-07-G-S
16
1
C
ONN,
15D SHE
LL,
FEM
A
LE, R
T
ANGLE

P
C
MOUNT
J10
D
B1
5-HF
AM
P
747845-3
1
J
16
P
T
H
A
/D E
L
ECTRON-
IC
S
AR
J-2018-1
17
3
I
ND
,
F
B
EA
D,
1206,
31@
100MH
z
,
25%
L1,
L
2
,
L
4
I
N
D_F
B
1206
TDK
H
F50ACB
32161
1-T
18
1
I
ND
,
F
B
EA
D,
1812,
120@
100MH
z
,
25%
L3
I
N
D_F
B
1812
TDK
H
F30ACB
453215-T
19
1
D
I
O
DE
,
DUA
L,
SOT23
D
1
S
OT23
N
A
T
IONAL
MM
BD
7000L
T1
20
4
T
RAN, S
O
,
NPN, S
O
T
2
3
Q
5,
Q6,Q7,
Q
8
S
OT23
N
A
T
IONAL
MM
BT3904L
T1
21
1
T
RAN,
S
O
, PNP
,
SOT23
Q
4
S
OT23
N
A
T
IONAL
MM
BT3906L
T1
22
4
R
ES
,
220K
,
S
O,
0805,5%,1/
10,ME
T
A
L F
I
LM
R5,R6,
R95,R96
RES
_0805
PHILIPS
9C08052A
224J
23
4
R
ES
,

SO, 0805, 56
K,

5%, 1/10W
, M
E
T
A
L
FI
LM
R8,R10,
R92,R94
RES
_0805
PHILIPS
9C08052A
5602J
24
5
R
ES
,

SO, 0805, 27
K,

5%, 1/10W
, M
E
T
A
L
FI
LM
R9,R1
1,
R34
,
R93,R97
RES
_0805
PHILIPS
9C08052A
2702J
25
9
R
ES
,

SO, 0805, 47
K,

5%, 1/10W
, M
E
T
A
L
FI
LM
R23,R35,
R36
,
R68,
R70,R72,
R75
,
R89,R90
RES
_0805
PHILIPS
9C08052A
4702J
25
4
R
ES
,
SO,
0805,
47
,
5%,
1/
1
0
W
,
ME
T
A
L F
I
LM
R17,R18,
R19
,
R20
RES
_0805
PHILIPS
9C08052A
47R0J
26
5
R
ES
,
SO,
0805,
4.7K, 5%,
1/
10
W
,
ME
T
A
L F
I
LM
R21,R24,
R25
,
R26,R27
RES
_0805
PHILIPS
9C08052A
4701J
27
8
R
ES
,
SO,
0805,
2.2K, 5%,
1/
10
W
,
ME
T
A
L F
I
LM
R30,R31,
R32
,
R33
R9
8,
R101,R102,R103
RES
_0805
PHILIPS
9C08052A
2201J
28
3
R
ES
,
SO,
0805,
10
0,
5%,
1/10W
,
ME
T
A
L F
I
LM
R37,R64,
R65
RES
_0805
PHILIPS
9C08052A
1000J
29
3
R
ES
,

SO, 0805, 10
K,

5%, 1/10W
, M
E
T
A
L
FI
LM
R63,R99,
R10
0
R
ES
_0805
PHILIPS
9C08052A
1002J
CRD4281-15
DS308RD15A1
28
30
13
RES
,
SO,
0805,
6.8K, 1%,
1/
10
W
,
ME
T
A
L F
I
LM
R45,R46,
R47
,
R48,R49,
R
50,
R51,R52,
R53
,
R54, R61,R62,R74
RES
_0805
PHILIPS
9C08052A
6801F
31
2
R
ES
,
SO,
0805,
3.4K, 1%,
1/
10
W
,
ME
T
A
L F
I
LM
R55,R57
RES
_0805
PHILIPS
9C08052A
3401F
32
1
R
ES
,

SO, 0805, 68
K,

5%, 1/10W
, M
E
T
A
L
FI
LM
R69
RES
_0805
PHILIPS
9C08052A
6802J
33
1
R
ES
,

SO, 0805, 10
0K, 5%, 1/10W
, M
E
T
A
L FI
LM
R71
RES
_0805
PHILIPS
9C08052A
1003J
34
1
R
ES
,
SO,
0805,
2.7K, 5%,
1/
10
W
,
ME
T
A
L F
I
LM
R73
RES
_0805
PHILIPS
9C08052A
2701J
1
R
ES
,
SO,
0805,
37
4,
1%,
1/10W
,
ME
T
A
L F
I
LM
R85
RES
_0805
PHILIPS
9C08052A
374J
1
R
ES
,

SO, 0805, 90
.
9
, 1%, 1
/
10W
, M
E
T
A
L FI
LM
R107
RES
_0805
PHILIPS
9C08052A
90J
1
R
ES
,
SO,
0805,
39
0,
5%,
1/10W
,
ME
T
A
L F
I
LM
R91
RES
_0805
PHILIPS
9C08052A
3900J
35
2
R
ES
,
SO,
0805,
0, 5%,
1/
10
W
,
ME
T
A
L F
I
LM
R105,R106
RES
_0805
PHILIPS
9C08052A
0R00J
36
1
P
ulse T
r
ans
f
o
r
m
er
,
I
s
ol
ation,
1:
1
T
1
P
TH-4
Puls
e
E
ngi
ne
ering
PE
65612
37
2
Dual head
phone
amp
U1,U12
SO8
M
otorola
MC
1458
38
1
5
V POS
.
VOL
T
.
RE
G
.
,
500m
a
U
2
D
P
A
K
M
otorola
MC
78M05A
CDT
39
1
I
C, S
O
,

AC
'
97 2.0 S
E
RIAL
CODEC
w/ S
R
C
U
5
Q
F
P
48_7X
7
C
R
Y
S
T
AL
SE
MI-
COND.
CS
4297A-K
Q
40
1
100 P
I
N
M
Q
FP
P
C
I

Cont
r
o
l
ler
U6
MQFP10
0
C
R
Y
S
T
AL
SE
MI-
COND.
CS
4281-CM
41
1
I
C,
S
O
,
SOIC8,
SE
RI
A
L

E
E
P
R
OM,
16 x 8,
2.
5V
U7
SO8
M
ICROCHIP
24LC00/SN
42
1
3
.
3
V
P
O
S. V
O
L
T
.
R
EG
., 400m
a,
S
O
U8
SOT223
MICRE
L
M
IC2920A
3.3BS
43
1
I
C, S
O
,

SOIC8,

33078, DUA
L OP
A
M
P
U10
SO8
M
OT
OROLA
M
C
33078D
44
1
X
T
A
L
,

24.
576M
Hz, CA
-301, Fund
Mode, P
a
r
Res
Y2
XTL_CA
301
EP
SON
C
A
-
301_24.576M-C
Notes