TM
Virtual Components for the Converging World
Amphion continues to expand its family of application-specific cores
1
See http://www.amphion.com for a current list of products
CS6190
Motion JPEG Codec
The CS6190 Motion JPEG (M-JPEG) Codec is a highly integrated virtual component solution for leading-edge
image compression and decompression applications. Its high performance is capable of sustaining data rates of
over 115 mega-samples/sec
1
delivering full motion, full color video images up to 2 megapixels
2
. The CS6190
provides both encoding and decoding functions in a highly integrated, compact solution. It delivers the optimal
performance and low cost that only an application specific silicon core can provide, making it the ideal solution
for consumer video recording and office automation equipment. The CS6190 has been handcrafted by Amphion
to deliver high performance with low-power and minimal silicon area.
Figure 1: CS6190 Overview Diagram
Configuration & Control Interface
Host Processor (or) State Machine
Image
Source
Sample
Data
JPEG
Stream
Output
CS6190
Bit Rate
Control
Run Length
& Variable
Length Coder
JPEG
Stream
Generator
JPEG
Stream
Input
or
Image
Data
or
JPEG
Stream
Parser
Run Length
& Variable
Length
Decoder
Coefficient
Quantization/
Inverse
Quantization
DCT/IDCT
FEATURES
High Performance Sustained
115 Msamples/second Encode and Decode
-
Single sample per clock cycle processing
-
One symbol per clock cycle
-
Huffman decoding capability
Low Power
-
Zero Power Standby Mode
-
Fully synchronous operation
Fully Compliant with Baseline JPEG Standard
ISO/IEC 10918
-
Support for all interleaved and non-inter-
leaved scans
-
Support for 64K x 64K frame dimension
Autonomous Operation
-
Simple FIFO-like interface for JPEG decoding
stream input
-
No requirement for micro-processor control or
pre-processing
-
Decodes tables and parameter information
from JPEG bitstream
-
Decoded parameters, such as image size,
made available for controlling peripherals
such as raster to block converter
Ease of Integration
-
Tapeout-ReadyTM firm-IP targeted netlist
Half duplex: Encode or Decode
-
Ideal for non-simultaneous record-then-play-
back or store-then-retrieve
KEY METRICS
Logic:
99.5K gates (std cell)
Memory:
17.7K bits RAM (5 blocks)
Area:
<1.5mm
2
die area
3
APPLICATIONS
Multifunction Printers:
-
Highly integrated encoder/decoder functions
allow low-cost, high-resolution document pro-
cessing
Consumer Video:
-
Low cost, low power, highly integrated
designs bring consumer devices such as digi-
tal video recorders to the mainstream
Digital Copiers:
-
Ultra-high performance enables high-speed,
high-resolution copying
-
Rich feature set maximizes system
functionality
1
Performance is dependent on the PLD device. 26MHz operation is representative of APEX 20KE device
2
30 frame/sec, 24-bit color images with three components in 4:2:0 format
3
Calculation assumes logic density of 90K g.mm
2
; SRAM density 150K bit/mm
2
plus 20% area overhead for memory peripheral circuitry.
2
CS6190
Motion JPEG Codec
CS6190 FUNCTIONAL DESCRIPTION
The CS6190 core is a highly integrated JPEG codec suitable for a wide range of imaging applications. Designed for continuous
data flow one image sample per clock cycle -- without host microprocessor intervention, the CS6190 can address the most
demanding frame-based video compression applications. In addition, it is ideal for low power applications where, once
configured, it can be stopped and restarted instantaneously. The fully-synchronous, highly-autonomous design requires no
software overhead. A rich feature set includes a patent pending adaptive-feedback bit rate control (BRC) mechanism, multiple
real-time selectable coding tables, manual and automatic configuration modes and on-board configuration memory. The CS6190
is a powerful and flexible JPEG codec solution.
The CS6190 can operate in either an encode or a decode mode, as determined by the CodMode input.
ENCODE MODE
FUNCTIONAL BLOCK OVERVIEW
Image source data in any color space format is input to the
CS6190 in block data format. The CS6190 can process up to
255 color components in an unlimited number of scans per
image (each scan can contain between one and four color
components). The image samples are compressed according
to user-definable quantization and Huffman coding
parameters. Built-in bit rate control circuitry is selectively
employed for bandwidth constrained applications. The
CS6190 outputs an ISO/IEC 10918-1 compliant data stream.
Separate configuration, parameter extraction and test access
ports provide high visibility and flexible control for ease of
integration of the CS6190 into the complete system-level ASIC
design.
FREQUENCY TRANSFORM
When in the encode mode, the frequency transform/inverse
frequency transform (FT/IFT) unit accepts 64-byte (8x8) blocks
of image sample data (raster order within the block) and
converts these to 8x8 blocks of frequency coefficients using a
2D discrete cosine transform (DCT) architecture. This is
implemented as two, 1D DCT operations, with the
intermediate results being stored in the dual-port transpose
memory (TRMem) buffer. The architecture of the FT unit
allows for continuous one sample per cycle operation with a
latency between first sample in and first coefficient out of 72
clock cycles. The 11-bit coefficient data is streamed out from
the FT unit for direct input to the quantization unit.
COEFFICIENT QUANTIZATION
When in the encode mode, the coefficient quantization/
dequantization (QT/DQT) unit divides each of the 64 DCT
coefficients in an image sample block by the values specified
in one of the four quantization tables stored in QTMem (each
table contains 64 entries, one per coefficient). The purpose of
the quantization process is to reduce the amplitude of the
coefficients and to increase the number of zero value
coefficients, in preparation for the latter stages of the JPEG
encoding process. The 11-bit DCT data is loaded into QT
directly from the FT in column major order. The QT unit
quantizes one sample per clock cycle with a latency between
the first sample in and first sample out of three clock cycles.
ADAPTIVE BIT RATE CONTROL
The adaptive bit rate control (BRC) unit applies a patent
pending coefficient thresholding technique to ensure that the
compressed image size does not exceed a user defined
bandwidth budget. This particular feature of the CS6190 is
essential for applications where the JPEG stream output from
the CS6190 is to be transmitted over a bandwidth-constrained
data channel. The BRC tracks the byte-count growth during
the compression of an image via feedback from the Huffman
codec in the variable length encoder (VLE) block. The BRC
adapts dynamically as the total image is processed, applying
different rules to selectively remove (zero-out) coefficients in
order to converge the actual compressed image size and the
ideal size. Further details on the BRC mechanism are
provided in the CS6190 Databook. The CS6190 BRC features
are a significant advancement over the requirements set forth
in the JPEG standard, yet the resultant output stream is 100%
compliant with the standard and can be decoded by any
standard-compliant JPEG decoder.
Figure 2: Bit Rate Control Illustration
Adaptive Bit Rate Control
Coefficient Thresholding Mechanism
Example Plot of DCT
Coefficients for and 8x8 block
Zero Sequences produced
Sub-threshold region
(Blanking region)
DCT Coefficient Index (zigzag order)
01
16
32
63
max
Quantized
DCT
Coefficient
Value
3-region
variable
blanking
thresholds
Tc
Tb
Ta
0
3
TM
VARIABLE LENGTH CODER
The variable length encoding unit (VLE) consists of both the
run length encode unit (RLE) and the Huffman codec (HUFF).
Data output by the BRC is buffered in the ZigZag Memory
(ZZMem) then loaded into the run length codec (RLE) unit.
The RLE compresses the data stream by converting the data to
Run-Size pair data bytes. Huffman encoding techniques are
then applied to the stream of Run-Size pairs to replace them
with a corresponding code read from a look-up table stored in
the Huffman Table memory (HTMem). Huffman codes are
designed to be uniquely identifiable yet minimize the number
of bits required to store all the Run-Size codes for an image.
The CS6190 can store four user-defined Huffman tables, two
for DC coefficients and two for AC coefficients, the DC and
AC coefficients being Huffman encoded separately. The
compression produced by the VLE is data dependent, thus
latency can vary from one block to the next.
Figure 3: CS6190 JPEG Codec BLock Diagram
Parameter
Extraction
JPEG
Stream
Test
Access Port
Code Control
Auto Parser
Config Mem
Host Processor (or) State Machine
Configuration & Control Interface
CS6190
Image
Source
Sample
Data
Divider
DCT
TRMem
DCT
QTMem
Huffman
Coder
Run Length
Encoder
HTMem
ZZMem
ENCODE
MODE
DECODE
MODE
or
Image
Data
Frequency
Transform
(FT)
Adaptive Bit Rate
Control (BRC)
Variable Length
Encoder
(RLE) & (HUFF)
JPEG
Data Stream
Generator
(DSG)
iDCT
TRMem
iDCT
Coefficient
Quantization (QT)
Multiplier
QTMem
Coefficient
Dequantization (DT)
Huffman
Coder
Run Length
Encoder
ZZMem
Variable Length
Decoder
(RLD) & (HUFF)
HTMem
JPEG
Data Stream
Parser
(JSP)
Inverse
Frequency
Transform
(IFT)
JPEG
Stream
4
CS6190
Motion JPEG Codec
DATA STREAM GENERATOR
The data stream generator unit (DSG) accepts the Huffman
encoded data stream from the VLE and packs the variable
length words into double-byte words. The double-byte words
are output over the JPEG output bus (JpgOut) when requested
by the external system. Additionally, the DSG outputs JPEG
file header information according to the parameters set during
configuration and under control of the JPEG mask control
port (JpgMask). The latency of the DSG is variable and
depends on the data received from the VLE. When the last
data for a frame is received from the VLE, the double-byte
word is padded out and is immediately available for output.
CONFIGURATION & CONTROL INTERFACE
The configuration and control interface unit (CCI) includes an
AutoParser that interprets configuration data, a configuration
memory (ConfigMem) for storing the full configuration
stream for later use as part of the JPEG output stream, and a
code control state machine (CodCtrl) that manages the
operation of the CS6190.
DECODE MODE
PARSER
The parser checks the JPEG input stream, automatically
detecting and processing all the JPEG marker segments and
signalling any detected errors. If an error is found the parser
stops reading the JPEG stream and waits to be reset. After
identifying the segments it redirects the data to the
appropriate units in the codec to be stored or processed. In
addition, the JPEG file header information and marker
segments can be output on the masked JPEG output port
(DecJpg) in accordance with the value set on the JPEG mask
control port.
VARIABLE LENGTH DECODER
The variable length decoding unit (VLD) consists of both the
Huffman decoder (HUFF) and run length decoding unit
(RLD). Huffman decoding techniques are first applied to the
stream of parsed data to regenerate the Run-Size data pairs.
The decoder detects the uniquely identifiable Huffman codes
and converts them to corresponding Run-Size pairs read from
a look-up table stored in the Huffman Table memory
(HTMem). The CS6190 can store four user-defined Huffman
tables, two for DC coefficients and two for AC coefficients, the
DC and AC coefficients being Huffman decoded separately.
The Run-Size data pairs output from the Huffman decoder are
then buffered in the Run-Length Memory (RLMem) and
loaded into the run length decoder unit. The RLD
decompresses the data stream by converting the Run-Size
data pairs into 8x8 blocks of quantized DCT coefficient data.
The decompression produced by the VLD is data dependent
and thus latency can vary.
COEFFICIENT DEQUANTIZATION
When in the decode mode, the coefficient quantization/
dequantization unit (QT/DQT) multiplies each of the 64 DCT
coefficients in an image block by the values specified in one of
the four quantization tables. The purpose of the
dequantization process is to rescale the DCT coefficients and
restore their original magnitude. Up to four user
programmable quantization tables can be stored in the
quantization table memory (QTMem). The 11-bit DCT data is
loaded into DQT directly from the VLD. The DQT unit
quantizes one sample per clock cycle with a latency between
the first sample in and first sample out of three clock cycles.
The 11-bit dequantized DCT coefficients are then output from
the DQT unit for direct input to the inverse frequency
transform.
INVERSE FREQUENCY TRANSFORM
When in the decode mode, the frequency transform/inverse
frequency transform (FT/IFT) unit accepts 64-byte (8x8) blocks
of frequency coefficients and converts these to 8x8 blocks of
image sample data in-raster format using a 2D inverse discrete
cosine transform (IDCT) architecture. This is implemented as
two, 1-D IDCT operations, with the intermediate results being
stored in the dual-port transpose memory (TRMem) buffer.
The architecture of the IFT unit allows for continuous one-
sample per cycle operation with a latency between first
sample in and first coefficient out of 83 clock cycles. The 8-bit
decoded image sample data is streamed out from the IFT unit
via the output pixel interface of the core.
CONTROLLER
The controller unit consists of a code control state machine
(DecCtrl) that manages the operation of the CS6190. It is used
to build the control parameters for decoding from the input
JPEG stream and for detecting illegal and corrupted markers
within the stream.
5
TM
CS6190 SYMBOL & PIN DESCRIPTION
Figure 4: CS6190 Symbol
DecJpgAvail
DecSoiEoi[1:0]
TType
DecJpgNext
DecJpg[7:0]
TData[10:0]
TValid
TSOS
TSOB
TestEn
PType[3:0]
PValue[15:0]
CodFlags[7:0]
TblDef[7:0]
PValid
AutoStart
AutoAvail
SigSOS
InitProg
CLR
CodMode
JpgNext
CLK
RSTn
JpgLast
JpgEnd
JpgOut[7:0]
JpgAvail
JpgIn[7:0]
JpgInStrb
JpgInRdy
JpgMask[4:0]
PixOutLast
PixOutValid
PixOut[7:0]
PixOutProg
PixOutEnab
PixInRdy
PixInSob
PixInProg
PixInEos
PixIn[7:0]
PixOutSob
Table 1: Memory BLock Size Information
MEMORY
BLOCK
CONFIGURATION
(WORDS x BITS)
PORTS
Huffman Tables
(HTMem)
384 x 12
Single Port,
synchronous
Transpose Mem-
ory (TRMem)
64 x 15
Dual Port,
synchronous
ZigZag Memory
(ZZMem)
128 x 11
Dual Port,
synchronous
Quantization
Tables (QTMem)
512 x 8
Single Port,
synchronous
Configuration
Memory
(CFMem)
840 x 8
Single Port,
synchronous
Table 2: I/O Signal Description
SIGNAL
PORT
WIDTH
(BIts)
I/O
DESCRIPTION
DECODED JPEG HEADERS OUTPUT PORT
DecJpgNext
1
Input
Decoded JPEG Next
Informs core to place next 8-bit word of masked JPEG output data onto DecJpg. The data is held if DecJpgNext
is not asserted
DecJpg
8
Output Decoded JPEG
Masked output JPEG data
DecJpgAvail
1
Output Decoded JPEG Available
Indicates that valid data is available on DecJpg
DecSoiEoi
2
Output Decoded Start of Image and End of Image
Indicates the start and end of an image
TEST INTERFACE
TType
1
Input
Test Type
Test type selector
TSOS
1
Output Test Start of Scan
Marks the first value in the first 8x8-output block of test data
TSOB
1
Output Test Start of Block
Marks the first value in each 8x8-output block of test data
TData
11
Output Test Data
11-bit output test data port displays DCT coefficients or quantized coefficients
TValid
1
Output Test Data Valid
Indicates valid test data output
TestEn
1
Input
Test Enable
Causes memories to be bypassed for test purposes
STATUS & CONTROL
PType
4
Input
Parameter Type
Signal specifying parameters to be placed on port PValue
PValue
16
Output Parameter Value
Encoding and decoding parameter bus
PValid
1
Output Parameter Valid
Indicates valid coding parameters
AutoAvail
1
Output AutoModeTM Available
When operating in encoding mode, indicates that AutoMode may be used
AutoStart
1
Output Start Signal for AutoMode
Causes the CS6190 to enter AutoEncode state when in encoding mode
SigSOS
1
Output Start of Scan Signal
Indicates that an SOS segment has been input to the core (or, in the case of an Automode encode, has been
read from the configuration memory) and the core is about to start encoding or decoding a scan
CodFlags
8
O
Coding Flags
CS6190 internal status and error flag status register
6
CS6190
Motion JPEG Codec
InitProg
1
Output Initialization In Progress
Indicates that the CS6190 is currently initializing its initial memories
TblDef
8
Output Tables Defined
Indicates number of tables defined. Bits[7:4] indicate Huffman tables. Bits[3:0] indicate quantization tables, 1bit/
table
GLOBAL SIGNALS
CLK
1
Input
Clock
Clock-rising edge active
RSTn
1
Input
Reset
Asynchronous reset (power-on-reset)
CLR
1
Input
Clear
Synchronous reset
CodMode
1
Input
Coding Mode Control
Set to '0' for encoding, '1' for decoding
JPEG STREAM PORT
JpgIn
8
Input
JPEG Input
Configuration stream input port when encoding, JPEG data stream input port when decoding
JpgInStrb
1
Input
JPEG Input Strobe
JpgIn port data input strobe
JpgInRdy
1
Output JPEG Input Ready
Indicates that the CS6190 is ready to accept data on port JpgIn
JpgMask
5
Input
JPEG Mask
JpgOut stream configuration port when in encode mode, DecJpg stream configuration port when in decode mode
DATA SAMPLE INPUT PORT
PixIn
8
Input
Pixel data input
Sample pixel data input port
PixInSob
1
Input
Pixel Input Start of Block
Indicates the first value in each 8x8 block of valid pixel input data
PixInRdy
1
Output Pixel Input Ready
Indicates that the CS6190 is ready to accept data on port PixIn
PixInEos
1
Input
Pixel Input End of Scan
Input signal indicating the current MCU row is the last one of the scan
PixInProg
1
Output Pixel Input in progress
Indicates that pixel data is being processed, asserted when the first sample of the first 8x8 block is input into the
core and de-asserted when the last pixel of the last block of the scan is input
JPEG OUTPUT PORT
JpgNext
1
Input
JPEG Next
Informs core to place next 8-bit word of JPEG output data onto JpgOut. The data is held if JpgNext is not asserted
JpgOut
16
Output JPEG Output
output JPEG data
JpgAvail
1
Output JPEG Data Available
Indicates that valid data is available on JpgOut
JpgLast
1
Output JPEG Last
Indicates that the data on port JpgOut is the last one of an encoded JPEG data stream
JpgEnd
1
Output JPEG End
Indicates that the last data of the encoded JPEG data stream has been output on port JpgOut
PIXEL OUT PORT
PixOut
8
Output Pixel Output
Pixel output data
PixOutSob
1
Output Pixel Output Start of Block
Marks the first value in each 8x8-output block of pixel data
PixOutValid
1
Output Pixel Output Valid
Indicates valid pixel output data
PixOutLast
1
Output Pixel Output Last
Indicates the last block of decoded pixel data of a scan
PixOutEnab
1
Input
Pixel Output Enable
Informs core to output 8x8 blocks of pixel data onto PixOut
PixOutProg
1
Input
Pixel Output In Progress
Indicates that decoded pixel data is being output on port PixOut
Table 2: I/O Signal Description
SIGNAL
PORT
WIDTH
(BIts)
I/O
DESCRIPTION
7
TM
STATE DESCRIPTIONS
The major operating modes and states of the CS6190 are
shown in Figure 5.
Figure 5: CS6190 Operation
INITIALIZATION
Following the assertion of the reset signal (RSTn) the core
enters the initialization state for 384 clock cycles. During this
period the internal memories are initialized. After exiting the
Initialization state the core enters the Idle state.
IDLE STATE
The core enters the Idle state after exiting Initialization state or
after the assertion of CLR. It also enters Idle state after
processing an EOI marker while in the Marker Decode or
Configuring states and after exiting AutoEncode state.
The core remains in the Idle state until being presented with
the first byte of a JPEG stream on port JpgIn or until the
assertion of AutoStart, provided that AutoAvail is already
asserted by the core. If the core exits Idle state due to an input
on port JpgIn, it checks the state of CodMode and enters either
Marker Decode state if CodMode is asserted or Configuring
state if CodMode is deasserted. If the core exits Idle state due
to an AutoStart, it will enter AutoEncode state.
.
Table 3: Encode JpgMask Settings
BIT
JPEG MASK SEGMENTS
4
SOF+SOS+ECD+RSTm+DNL
3
COM+APP
2
DRI
1
DQT
0
DHT
KEY
1 SOI input with CodMode asserted
2 SOI input without CodMode asserted
3 AutoStart asserted with AutAvail asserted
4 EOI input
5 SOS input and bit 4 JpgMask asserted
6 SOS input
7 EOI input
Reset
Initialization
Idle
AutoEncode
Configuring
Variable Image
Encode
Marker Decode
Entropy Decode
1
2
3
4
5
6
7
ENCODE MODE
DECODE MODE
Table 4: Jpg Configuration Segments
SEGMENT
DESCRIPTION
STORED
COM
Comment
Y
APPn
Application segment, n=0...F
Y
DQT
Define quantization table(s)
Y
DHT
Define Huffman table(s)
Y
DRI
Define restart interval
Y
SOF0
Baseline frame definition
Y
SOS
Start of scan
Y
DNL
Define number of lines
N
Table 5: JPEG Markers Supported for Configuration
MARKER
JPEG MARKER
NAME
DESCRIPTION
SOI
Start of Image
Start of image marker 0xFFD8
indicates the start of a configu-
ration stream
COM
Comment
Reserved for text fields
APPn
Application
segment, n=0-F
Reserved for application use
DQT
Define quantization
table(s)
Marker for input of quantization
tables. Up to 4 may be defined
DHT
Define Huffman
table(s)
Marker for definition of the Huff-
man tables. Up to 4 tables may
be defined
DRI
Define restart inter-
val
Set to zero by default, this
allows
the image to be broken up into
independently decodable seg-
ments
SOF0
Baseline frame defi-
nition
Defines frame parameters that
apply to all scans within the
frame. Includes number of com-
ponents, sampling factors, and
which quantization table is to be
used by each component
EOI
End of image
End of image marker indicates
end of configuration data
SOS
Start of scan
Defines the parameters relating
to each scan in the frame,
including the number of compo-
nents and the Huffman tables to
be associated with each com-
ponent
DNL
Define number of
lines
Used to redefine number of
lines in image for use with
ScanEnd signal. Main applica-
tion is in handheld scanners
8
CS6190
Motion JPEG Codec
ENCODE MODE STATES
CONFIGURING STATE
The CS6190 is configured for encoding via the JPEG input port
(JpgIn) with the data required to encode an image, such as
Huffman tables, quantization tables, restart interval definition
and image dimensions. This data is sent in as part of a
configuration stream, where a stream begins with a start of
image (SOI) marker and ends with an end of image (EOI)
marker. As the data is input, selected sections can be inserted
into the output stream via the compressed data output
(JpgOut) port. The passing of segments is enabled by setting
bits on the JPEG mask input as detailed in Table 3.
In this configuring state the core performs two functions. As
the configuration stream is input, the core extracts
information from the input data and stores it in internal
registers and memories. It also stores certain segments, as
outlined in Table 4, in the configuration memory, in the same
format as they are input. This storage allows these segments
to be inserted into the output stream for future images
without the user having to input them again.
If CodMode is de-asserted, the core will enter the configuring
state from the Idle state after receiving the first byte of the
configuration data and the user may enter one or more
standard JPEG marker segments to reconfigure the core and/
or start encoding a new image. The core can also enter the
configuring state from the variable image encode state after
completing the encoding of a scan. If this is the case then
normally the user would input either EOI to end the session, a
DNL segment to re-define the image size, or an SOS to start
the encoding of a new scan.
The JpgInProg output [CodFlags(0)] is asserted when the core
starts to process input JpgIn and is de-asserted when the EOI
marker has been loaded into the core on the JpgIn input. If an
error is present in the configuration stream, then the core
configuration and subsequent data encoding is suspended.
Such an error is reported on the CodFlags output port. An
error is cleared by assertion of the RSTn or CLR signals.
The core exits the configuring state in one of two ways. If it
receives an SOS segment and Bit 4 of the JPEG Mask is set,
then the core will enter the Variable Image Encode state.
Alternatively, if it receives an EOI segment, then it will exit to
Idle state.
VARIABLE IMAGE ENCODE STATE
The CS6190 enters the Variable Image Encode state from the
configuring state after the input of an SOS segment if it has
been fully configured and Bit 4 of the JPEG mask is set. In the
Variable Image Encode state the core accepts sample data via
the PixIn port in 8x8-block format in row-major order and in
the correct proportions as defined within the frame header
(SOF0). The core counts the blocks as they are input and
asserts PixRdy to indicate that it is ready to accept a new block
of data. After the correct amount of data has been input for a
scan, the core will not accept any more pixel data until the
start of the next scan. Bit and byte stuffing is automatically
performed, along with the insertion of the appropriate restart
markers and the data is presented on port JpgOut.
AUTOENCODE STATE
The CS6190 enters the AutoEncode state from the Idle state if
AutoStart is asserted by the user when AutoAvail signal is
asserted. AutoAvail is asserted by the core in Idle state if the
core is fully configured. This means that there is sufficient
data stored in the configuration memory (ConfigMem) to
encode an image.
In the AutoEncode state the core reads sections of the stored
configuration data from the configuration memory and
outputs them on the compressed data output port in
accordance with what has been defined by the JPEG mask
(JpgMask). If JpgMask[4] is set to `1', then the core will read
the region containing the stored SOS segments and, when it
reads one of these, it will encode a scan of data before reading
any more configuration data. If the new configuration data is
an SOS segment then the core will encode another scan; if it is
an EOI then it will terminate the encoding session and return
to the Idle state. The entropy-coded data for each scan will be
placed in the output stream immediately after the SOS. When
encoding a scan the pixel input data should be provided in
8x8 block format, in row-major order and in the correct
proportions as defined within the frame header. In
AutoEncode state the core is capable of encoding a complete
image containing up to four scans without intervention from
the user. The CodInProg signal will be asserted during the
encoding of each scan and will be de-asserted between scans.
DECODE MODE STATES
MARKER DECODE STATE
The CS6190 enters the Marker Decode state when it receives
the first byte of the decode stream and remains there until it
decodes either an SOS or EOI marker. If it decodes an SOS
marker and has already received all the other information
needed to decode the scan, such as the Huffman tables, it
enters Entropy Decode state, otherwise it will assert an error
flag on the CodFlags output port and will stop accepting data.
If it receives an EOI marker it enters Idle state. The JpgInProg
output [CodFlags(0)] is asserted when the core starts to
process input JpgIn and is de-asserted when the EOI marker
has been loaded into the core on the JpgIn input.
If the CS6190 enters Marker Decode state from Idle state it
expects to receive an SOI as the first input and will discard all
input until an SOI is received. When recovering from an error
in the decode stream, this allows the core to discard the end of
9
TM
a corrupt stream and to locate the start of the new stream. This
synchronization feature could be useful if the decode stream
is arriving from a noisy channel in an M-JPEG system and
means that the system does not have to locate the start of the
stream for the core.
When in Marker Decode state the core automatically detects
the JPEG marker segments listed in Table 6.
After detecting a segment the core decodes and stores the
information in the segment and checks that the information is
valid. If the information contains an error, then the core will
assert an error flag on the CodFlags output port and will stop
accepting data. The error can be cleared by asserting RSTn or
CLR.
As the segments are being decoded from the decode stream,
they can also be output by the core on port DecJpg, with the
user selecting the ones that are actually output by setting bits
on the JPEG Mask port according to Table 7. This could be
used, for example, as a simple method for the user to gain
access to the information contained in the APP markers
without having to parse the data stream.
Figure 6: CS6190 Codec States
ENTROPY DECODE STATE
The core enters Entropy Decode state after decoding an SOS
from the decode stream. In Entropy Decode state it decodes
the pixel data from the entropy-coded segments,
automatically selecting the correct Huffman and quantization
tables to use for each component. If an error is detected in the
entropy coded data, the core will assert HfError (CodFlags[7])
and will attempt to recover by discarding entropy coded data
up to the next Restart Marker or the end of the image, whilst
still producing the expected amount of pixel data. The
HfError signal is cleared by RSTn or CLR and by the start of a
new decode stream. As a result the core does not need the
user to respond to the HfError signal. The CodInProg signal
will be asserted whilst decoding a scan.
JPEG DATA STREAM AND CONFIGURATION INPUT PORT
Loading of the compressed JPEG input image data is
performed using the JpgIn interface. The data stream is input
to CS6190 via the JpgIn[7:0] port. This stream must also be
accompanied by a data valid signal, JpgInStrb, which must be
asserted coincident with all valid samples. The data interface
operates synchronously, reading a compressed JPEG data
sample at the rising edge of every clock cycle when enabled to
do so. The JpgInRdy output from the core controls the flow of
data on the JpgIn bus and, if necessary, acts as a request to halt
the input of data for an arbitrary time interval. The functional
timing for the JPEG data stream input interface is shown in
Figure 7. Configuration of the CS6190 for encoding is also
performed via this port using a configuration datastream
which contains data for the Huffman tables, quantization
tables, restart interval definition and frame header.
Reset
Initialization
Idle
Marker Decode
Entropy Decode
Key
1 SOS Input
2 EOI Input
1
2
Table 6: Jpg Segments
SEGMENT
DESCRIPTION
COM
Comment
APPn
Application segment, n=0...F
DQT
Define quantization table(s)
DHT
Define Huffman table(s)
DRI
Define restart interval
SOF0
Baseline frame definition
SOS
Start of scan
DNL
Define number of lines
Table 7: Decode JPG Mask Setting
BIT
JPG SEGMENTS
4
SOF, SOS, DNL
3
COM, APP
2
DRI
1
DQT
0
DHT
10
CS6190
Motion JPEG Codec
Figure 7: JPEG Data Stream Input Interface Timing
PIXEL DATA OUTPUT PORT
The decompressed pixel data is output via the PixOut port in
response to the PixOutEnab input to the core. It is
accompanied by a PixOutValid signal which indicates valid
output data. The pixel data is also accompanied by a
PixOutSob signal which, when asserted, marks the first word
in each output 8x8 block of pixel data. The last block of
decoded pixel output data in a scan is accompanied by the
PixOutLast signal.
The PixOutEnab signal can be used to control the flow of the
output blocks on a block per block basis. If PixOutEnab is
asserted and the iDCT module has a block to process, then it
will start processing the block and will output it. If
PixOutEnab is de-asserted, then the core will finish processing
the current block and if the processing of the next block has
started, then it will also be output. Processing will then stop
until PixOutEnab is re-asserted.
Figure 8: JPEG Pixel Data Output Interface Timing
DECODED JPEG HEADERS OUTPUT PORT
Image marker data is output from CS6190 via the DecJpg[7:0]
port and is accompanied by a DecJpgAvail signal when valid
data is output on the DecJpg port. The contents of the output
stream from the DecJpg port are controlled by the JpgMask
input which is read when the first byte of the input JPEG
stream is input. If any one of the bits of JpgMask is asserted,
then the SOI and EOI markers are also passed to the DecJpg
port. The output receiving device reads the marker data from
the core by asserting the DecJpgNext signal.This indicates that
the next 8-bit word of marker data can be placed on the
DecJpg port at the rising edge of the clock. If data is not
removed from DecJpg by the reading device, then the core
will fill with data and will stop reading the decode stream.
The output from the DecSoiEoi port indicates the start and
end of the image.
Figure 9: Decoded JPEG Marker Output Interface Timing
FF
D8
Input data is held on the JpgIn Input as JpgInRdy is low
CLK (I)
JpgIn (I)
JpgInStrb (I)
JpgInRdy (O)
JpgInProg (O)
PixOutSob associated with the
first pixel of an 8x8 block
CLK (I)
PixOutEnab (I)
PixOut (O)
PixOutValid (O)
PixOutSob (O)
PixOutLast (O)
0
1
62
2
63
0
1
2
3
62
63
0
1
2
FF
FF
Marker data read as
DecJpgAvail is asserted
Marker data heldas
DecJpgNext is low
CLK (I)
DecJpg (O)
DecJpgAvail (O)
DecJpgNext (I)
DecSoiEoi[1:0] (O)
D8
D9
11
TM
PIXEL DATA INPUT
The PValue[15:0] output port enables the various parameters
extracted from the input JPEG data stream and currently used
by the core to be read. The data available on the PValue port is
for information only and does not contain control signals for
the codec core. The desired parameter is selected using the
input PType. These parameters are only available after the
SigSOS output has been asserted.
Figure 10: Pixel Data Input Timing
COMPRESSED DATA OUTPUT
Compressed image data is output from the CS6190 via the
JpgOut[15:0] port in a FIFO-style output interface. All valid
output consists of two bytes and so, if the output stream is not
an even number of bytes, then a 0xFF will automatically be
stuffed into the stream before the EOI marker to align the
data. The output receiving device reads compressed data from
the core by asserting the JpgNext signal. This indicates that
the current output word has been read in and the next 16-bit
word of output data can be placed on the JpgOut port at the
rising edge of the clock. The first word of the output is placed
on JpgOut regardless of JpgNext. If the receiving device
cannot remove data fast enough from the output port then the
JpgNext signal, which is a function of the external circuitry,
should not be asserted. In this case the output data will be
held. A JpgAvail signal accompanies valid data on the JpgOut
port. At the end of an image. JpgLast is asserted whilst the last
16-bit output word is available on JpgOut. When this last
word is output the JpgEnd signal is asserted and remains high
until the start of the next configuration input stream or the
assertion of AutoStart.
Figure 11: Compressed JPEG Output Stream Interface Timing
2
PixInSob associated with the
first pixel of an 8x8 block
Core ready to accept 8x8
block of pixel data
Continuous data input
CLK (I)
SigSOS (O)
CodInProg (O)
PixIn (I)
PixInSob (I)
PixInProg (O)
PixInRdy (O)
1
0
0
1
2
62
63
0
1
2
62
63
CLK (I)
FFD9
JpgOut (O)
JpgAvail (O)
JpgNext (I)
JpgInProg (O)
JpgLast (O)
Data Read as
JpgAvail is
Asserted
Data Held as
JpgNext is Low
JpgEnd (O)
Last Entropy Coded
Data Word in Image
12
CS6190
Motion JPEG Codec
PARAMETER BUS
The parameter bus (PValue[15:0]) is a 16-bit output port used
to display configuration and status information stored within
the CS6190 configuration memory. The 4-bit selector input
PType[3:0] determines which internal parameters are
displayed on the parameter bus per Table 8.
The data available on the PValue port does not contain control
signals used by the CS6190. Many of the values however can
be used to control other logic instantiated around the CS6190,
i.e. the FX and FY parameters (PType 0x0 and 0x1) could be
used to control a raster to block converter.
Table 8: Parameter Bus Definitions.
(Used to display configuration information about the image being encoded or decoded)
PType
(Decimal Value)
PValue Output
{bit position [15:0]}
DESCRIPTION
0
FY[15:0]:
FY
Number of lines in frame
1
FX[15:0]
FX
Number of lines in image
2
00_YMCU[13:0]
YMCU Number of MCUs in Y direction of current scan
3
00_XMCU[13:0]
XMCU Number of MCUs in X direction of current scan
4
Cs0[7:0]_Tq0[1:0]_V0[2:0]_H0[2:0]
Cs0
Identifier for the first scan component
Tq0
Quantization table identifier for the first scan component
V0
Vertical sampling factor for the first scan component. Values = 1-4
H0
Horizontal sampling factor for the first scan component. Values = 1-4
5
Cs1[7:0]_Tq1[1:0]_V1[2:0]_H1[2:0]
Cs1
Identifier for the second scan component
Tq1
Quantization table identifier for the second scan component
V1
Vertical sampling factor for the second scan component, undefined if NS
(number of scans) < 2
H1
Horizontal sampling factor for the second scan component, undefined if NS <
2
6
Cs2[7:0]_Tq2[1:0]_V2[2:0]_H2[2:0]
Cs2
Identifier for the third scan component
Tq2
Quantization table identifier for the third scan component
V2
Vertical sampling factor for the third scan component, undefined if NS < 3
H2
Horizontal sampling factor for the third component, undefined if NS < 3
7
Cs3[7:0]_Tq3[1:0]_V3[2:0]_H3[2:0]
Cs3
Identifier of the fourth component
Tq3
Quantization table identifier for the fourth scan component
V3
Vertical sampling factor for the fourth scan component, undefined if NS < 4
H3
Horizontal sampling factor for the fourth scan component, undefined if
NS < 4
8
CsH[15:0]
Number of rows in current scan
9
CsV[15:0]
Number of columns in current scan
10
DRI[15:0]
Restart Interval
11
000_HMAX[2:0]_VMAX[2:0]_
MCUBLK[3:0]_NS[2:0]
HMAX Maximal horizontal sampling factor in frame
VMAX Maximal vertical sampling factor in frame
MCUBLK Number of blocks per MCU of the current scan from 1-10
NS
Number of scan components in current scan, 1-4
12
VHM3[3:0]_VHM2[3:0]_
VHM1[3:0]_VHM0[3:0]
VHM0 Number of blocks of first component in MCU. Defined as V0*H0 where V0
and H0 are the vertical and horizontal sampling factors for the first scan
component if NS < 1. Otherwise = 1
VHM1 V0*H0 + V1*H1, undefined when NS < 2
VHM2 V0*H0 + V1*H1 + V2*H2, undefined when NS < 3
VHM3 V0*H0 + V1*H1 + V2*H2 + V3*H3, undefined when NS < 4
13
Reserved
14
Reserved
15
Reserved
13
TM
STATUS REGISTERS
The status register flags (CodFlags[7:0]) indicate the current
state of the CS6190 operation. When an error is detected
during the coding process, the compression process is
suspended and the CS6190 waits until a reset process is
invoked by signal RSTn or CLR. The individual bits are set to
zero at reset and active high to indicate an error condition as
defined in Table 9:
Table 9: Status Register Pin Definitions
BIT
NAME
DESCRIPTION
7
HfError
Set when an undefined Huffman table symbol is referenced during encoding or a
Huffman code could not be decoded from the stream
6
CtlError
Set when an invalid SOF parameter is detected. This includes detecting:
A sample precision which is not equal to 8-bit
The horizontal size of the image is set to zero
The number of components in a frame is set to zero
Any of the horizontal or vertical sampling factors set to be > 4
The quantization table ID > 3
Set when an invalid SOS parameter is detected. This includes detecting:
A reference to an undefined Huffman or quantization table
The number of components in a scan to be zero or more than 4
More than 10 blocks in an MCU
Incorrect SOS fixed parameter settings
(these should be as follows: Ss=0, Se=63, AhAl=0)
Set during encoding when CodFlags[7] is set (encode mode only)
Set when there is a mismatch between the DNL segment input to the core and the
number of lines in the input image which have already been coded
5
HtError
Set when an invalid DHT segment is detected. This includes detecting:
An all one Huffman code
An invalid Huffman table class (this should be '0' for DC tables and '1' for AC
tables)
An invalid Huffman table identifier (this should be in the range 0 to 3)
The L value limit has been exceeded (this should be 12 for a DC table, 162
for an AC table)
4
QtError
Set when an invalid DQT segment is detected. This includes detecting:
A zero quantization coefficient
An invalid quantization level precision (this should be set to zero for baseline
JPEG)
An invalid quantization table identifier (this should be in the range 0 to 3)
3
Error
Set when any of CodFlags[7:4] (encoding) or CodFlags[6:4] (decoding) are set. Set
when the parser detects an error in the JPEG input stream:
Encoding:
When any data other than the SOI marker is detected at the start of a stream
When any SOF marker is detected other than SOF0
When an invalid JPEG marker is detected. This includes the restart marker
which should not be included in the configuration stream
If incomplete Huffman or quantization definition is detected
Decoding:
When any SOF marker is detected other than SOF0
When an invalid JPEG marker is detected
If incomplete Huffman or quantization definition is detected
2
DctInProg
Set when CDCT starts processing first data of a scan. Cleared when CDCT has pro-
cessed the last data of scan
1
CodInProg
Asserted while the core is processing image data from a scan
0
JpgInProg
Asserted when the core receives the first byte of data on port JpgIn, or after the
assertion of AutoStart if AutoStart is set; de-asserted when coding has completed
14
CS6190
Motion JPEG Codec
DESIGN METHODOLOGY SUPPORT
Amphion cores support industry standard design flows. The
process for integrating the CS6190 into a design flow is shown
in the following diagram. Contact Amphion for information
on compatibility of the deliverables with specific EDA tools.
Figure 12: ASVC Design Data Formats Supplied by Amphion
ASVC Data Formats
Supplied by AMPHION
Typical ASIC or FPGA Design Flow
(Conceptual)
Bit Accurate
C Model
RTL Simulation
Models
Testbench
(VHDL & Verilog)
Netlists
(Verilog, VHDL, EDIF, .bd)
FPGA Programming
Files
System-Level "C" Code simulation
Hardware RTL Development
RTL Simulation
Logic Synthesis
Gate-level analysis
(timing & functional)
Physical Design
15
TM
TIMING CHARACTERISTICS
Most inputs and outputs to the CS6190 are registered and fully synchronous. Full pin descriptions and conditional timing
behavior for non-registered pins is given in the CS6190 Databook. Example timing characteristics for the CS6190 are given in
Table 10. Timing characteristics are technology dependent and will vary by instantiation as signal loading in the target system
determines final timing.
ALTERA AVAILABILITY AND IMPLEMENTATION INFORMATION
PROGRAMMABLE LOGIC CORES
For ASIC prototyping or for projects requiring the fast time to market of a programmable logic solution, Amphion delivers
programmable logic solutions offer the silicon-aware performance tuning found in all Amphion products, combined with the
rapid design times offered by today's leading programmable logic solutions.
* Performance represents core only under worst case commercial conditions. Does not include timing effect of external logic and I/O circuitry.
Table 10: CS6190 Timing Characteristics
SYMBOL
DESCRIPTION
CONDITION
VALUE
COMMENT
t
cyc
Clock period
Worst case
40.3 ns
Positive edge triggered
t
su
Input port set-up time
max
40.6 ns
Except CLR, JpgMask AutoStart, JpgIn, JpgNext,
PType, DecJpgNext, JpgInStrb, PixInSob, RSTn
t
h
Input port hold time
max
0.2 ns
Varies
t
co
Output port clock to output timing
max
2.0 ns
All registered outputs
t
skew
Clock skew
max
200 ps
Synthesis value, final skew is design dependent
Table 11: CS6190 Programmable Logic Cores
PRODUCT
ID#
SILICON
VENDOR
PROGRAMMABLE
LOGIC PRODUCT
PERFORMANCE*
(Msamples/sec)
DEVICE RESOURCES
USED (LOGIC)
DEVICE RESOURCES
USED (MEMORY)
AVAILABILITY
CS6190AA
Altera
Apex 20KE FPGA
24
14449 LEs
18 ESB
Now
CS6190AC
Altera
Stratix FPGA
43
10891LEs
6 ESBs
Now
CS6190
Motion JPEG Codec
TM
Virtual Components for the Converging World
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Amphion, the Amphion logo,"Virtual Components for the Converging World", are trademarks of Amphion Semiconductor Ltd. All others are the property of their
respective owners.
16
08/02 Publication #: DS6190 v1.3
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