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1:10 Clock Fanout Buffer
COMLINKTM SERIES
CY2CC810
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
Document #: 38-07056 Rev. *C
Revised December 14, 2002
Features
Low-voltage operation
V
DD
range from 2.5V to 3.3V
1:10 fanout
Over voltage tolerant input hot swappable
Drives either a 50-Ohm or 75-Ohm transmission line
Low-input capacitance
Low-output skew
Low-propagation delay
Typical (tpd < 4 ns)
High-speed operation > 500 MHz
Industrial versions available
Available packages include: SOIC, SSOP
Description
The Cypress series of network circuits are produced using
advanced 0.35-micron CMOS technology, achieving the
industries fastest logic and buffers.
The Cypress CY2CC810 fanout buffer features one input and
ten outputs. Designed for data communications clock
management applications, the large fanout from a single input
reduces loading on the input clock.
AVCMOS-type outputs dynamically adjust for variable
impedance matching and eliminate the need for series
damping resistors; they also reduce noise overall.
Pin Description
Pin Number
Pin Name
Description
1
IN
Input
LVCMOS
2, 6, 10, 13, 17
GND
Ground
Power
4, 8, 15, 20
V
DD
Power Supply
Power
3, 5, 7, 9, 11, 12, 14, 16, 18, 19
Q1... Q10
Output
AVCMOS
Block Diagram
Pin Configuration
OUTPUT
(AVCMOS)
IN
Q 1
Q 5
Q 7
Q 6
Q 4
Q 3
Q 2
Q 8
Q 9
Q 10
G N D
V D D
INPUT
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
CY
2CC810
20 pin SOIC/SSOP
VDD
Q10
Q9
GND
Q8
VDD
Q7
GND
Q6
Q5
IN
GND
Q1
VDD
Q2
GND
Q3
VDD
Q4
GND
COMLINKTM SERIES
CY2CC810
Document #: 38-07056 Rev. *C
Page 2 of 7
Maximum Ratings
[1][2]
Storage Temperature: ................................ 65
C to + 150
C
Ambient Temperature:................................... 40
C to +85
C
Supply Voltage to Ground Potential
V
CC
.................................................................. 0.5V to 4.6V
Input ................................................................. 0.5V to 5.8V
Supply Voltage to Ground Potential
(Outputs only) ........................................... 0.5V to V
DD
+ 1V
DC Output Voltage.................................... 0.5V to V
DD
+ 1V
Power Dissipation........................................................ 0.75W
Notes:
1.
Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
2.
Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
DC Electrical Characteristics
@ 3.3V (see Figure 5)
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
V
OH
Output High Voltage
V
DD
= Min., V
IN
= V
IH
or V
IL
I
OH
= 12 mA
2.3
3.3
V
V
OL
Output Low Voltage
V
DD
= Min., V
IN
= V
IH
or V
IL
I
OL
= 12 mA
0.2
0.5
V
V
IH
Input High Voltage
Guaranteed Logic High Level
2
5.8
V
V
IL
Input Low Voltage
Guaranteed Logic Low Level
0.8
V
I
IH
Input High Current
V
DD
= Max.
V
IN
= 2.7V
1
uA
I
IL
Input Low Current
V
DD
= Max.
V
IN
= 0.5V
1
uA
I
I
Input High Current
V
DD
= Max., V
IN
= V
DD
(Max.)
20
uA
V
IK
Clamp Diode Voltage
V
DD
= Min., I
IN
= 18 mA
0.7
1.2
V
I
OK
Continuous Clamp Current
V
DD
= Max., V
OUT
= GND
50
mA
O
OFF
Power-down Disable
V
DD
= GND, V
OUT
= < 4.5V
100
uA
V
H
Input Hysteresis
V
DD
= Min., V
IN
= V
IH
or V
IL
80
mV
DC Electrical Characteristics
@ 2.5V (see Figure 1)
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
V
OH
Output High Voltage
V
DD
= Min., V
IN
= V
IH
or V
IL
I
OH
= 7 mA
1.8
V
I
OH
= 12 mA
1.6
V
V
OL
Output Low Voltage
V
DD
= Min., V
IN
= V
IH
or V
IL
I
OL
= 12 mA
0.65
V
V
IH
Input High Voltage
Guaranteed Logic High Level
1.6
5.0
V
V
IL
Input Low Voltage
Guaranteed Logic Low Level
0.8
V
I
IH
Input High Current
V
DD
= Max.
V
IN
= 2.4V
1
uA
I
IL
Input Low Current
V
DD
= Max.
V
IN
= 0.5V
1
uA
I
I
Input High Current
V
DD
= Max., V
IN
= V
DD
(Max.)
20
uA
V
IK
Clamp Diode Voltage
V
DD
= Min., I
IN
= 18 mA
0.7
1.2
V
I
OK
Continuous Clamp Current
V
DD
= Max., V
OUT
= GND
50
mA
O
OFF
Power-down Disable
V
DD
= GND, V
OUT
= < 4.5V
100
uA
V
H
Input Hysteresis
80
mV
Capacitance
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
Cin
Input Capacitance
V
IN
= 0V
2.5
pF
Cout
Output Capacitance
V
OUT
= 0V
6.5
pF
COMLINKTM SERIES
CY2CC810
Document #: 38-07056 Rev. *C
Page 3 of 7
Power Supply Characteristics
(see Figure 5)
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
ICC
Delta I
CC
Quiescent Power
Supply Current
(I
DD
@ V
DD
= Max. and V
IN
= V
DD
) (I
DD
@ V
DD
= Max. and V
IN
= V
DD
0.6V)
50
uA
I
CCD
Dynamic Power Supply Current V
DD
= Max.
Input toggling 50% Duty Cycle, Outputs Open
0.63
mA/
MHz
I
C
Total Power Supply Current
V
DD
= Max.
Input toggling 50% Duty Cycle, Outputs Open
fL = 40 MHZ
25
mA
High-frequency Parametrics
Parameter
Description
Test Conditions
Min. Typ.
Max.
Unit
D
J
Jitter, Deterministic
50% duty cycle tW(5050)
The "point to point load circuit"
Output Jitter Input Jitter
See Figure 5
20
ps
F
max
Maximum frequency
V
DD
= 3.3V
50% duty cycle tW(5050)
Standard Load Circuit.
160
MHz
50% duty cycle tW(5050)
The "point to point load circuit"
See Figure 7
650
F
max
2.5V
Maximum frequency
V
DD
= 2.5 V
The "point to point load circuit"
V
IN
= 2.4V/0.0V V
OUT
= 1.7V/0.7V
See Figure 7
200
MHz
F
max(20)
Maximum frequency
V
DD
= 3.3 V
20% duty cycle tW(20-80)
The "point to point load circuit"
V
IN
= 3.0V/0.0V V
OUT
= 2.3V/0.4V
See Figure 7
250
MHz
Maximum frequency
V
DD
= 2.5 V
The "point to point load circuit"
V
IN
= 2.4V/0.0V V
OUT
= 1.7V/0.7V
See Figure 3
200
MHz
t
W
Minimum pulse
V
DD
= 3.3 V
The "point to point load circuit"
V
IN
= 3.0V/0.0V F = 100 MHz
V
OUT
= 2.0V/0.8V
See Figure 7
1
ns
Minimum pulse
V
DD
= 2.5 V
The "point to point load circuit"
V
IN
= 2.4V/0.0V F = 100 MHz
V
OUT
= 1.7V/0.7V
See Figure 3
1
AC Switching Characteristics
@ 3.3V V
DD
= 3.3V 5%, Temperature = 40
C to +85
C
Parameter
Description
Min.
Typ.
Max.
Unit
t
PLH
Propagation Delay Low to High
See Figure 4
1.5
2.7
3.5
nS
t
PHL
Propagation Delay High to Low
1.5
2.7
3.5
nS
t
R
Output Rise Time
0.8
V/nS
t
F
Output Fall Time
0.8
V/nS
t
SK(0)
Output Skew: Skew between outputs of the same package (in phase) See Figure 10
0.2
nS
t
SK(p)
Pulse Skew: Skew between opposite transitions of the same output
(t
PHL
t
PLH
).
See Figure 9
0.2
nS
t
SK(t)
Package Skew: Skew between outputs of different packages at the
same power supply voltage, temperature and package type.
See Figure 11
0.4
nS
COMLINKTM SERIES
CY2CC810
Document #: 38-07056 Rev. *C
Page 4 of 7
Parameter Measurement Information:
V
DD
@ 2.5V
Parameter Measurement Information:
V
DD
@ 3.3V
Notes:
3.
C
L
includes probe and jig capacitance.
4.
All input pulses are supplied by generators having the following characteristics: PRR < 100 MHz, Z
0
= 50W, t
R
< 2.5 nS, t
F
< 2.5 nS.
5.
The outputs are measured one at a time with one transition per measurement.
6.
T
PLH
and T
PHL
are the same as t
pd
.
AC Switching Characteristics
@ 2.5V V
DD
= 2.5V 5%, Temperature = 40
C to +85
C
Parameter
Description
Min.
Typ. Max. Unit
t
PLH
Propagation Delay Low to High
See Figure 4
1.5
2.0
3.5
nS
t
PHL
Propagation Delay High to Low
1.5
2.0
3.5
nS
t
R
Output Rise Time
0.8
V/nS
t
F
Output Fall Time
0.8
V/nS
t
SK(0)
Output Skew: Skew between outputs of the same package (in phase) See Figure 10
0.2
nS
t
SK(p)
Pulse Skew: Skew between opposite transitions of the same output
(t
PHL
t
PLH
).
See Figure 9
0.2
nS
t
SK(t)
Package Skew: Skew between outputs of different packages at the
same power supply voltage, temperature and package type.
See Figure 11
0.65
nS
From Output
Under Test
C
L
= 50 pF
500 ohm
Figure 1. Load Circuit
[3,4,5]
2.0 V
0 V
Input
t
w(20-80)
2.0 V
0 V
1.25 V
1.25 V
Input
t
w(50-50)
1.25 V
Figure 2. Voltage WaveformsPulse Duration
[6]
From Output
Under Test
C
L
= 3 pF
500 ohm
Figure 3. Point to Point Load Circuit
[3,4,5]
1.0 V
1.25 V
1.25 V
1.0 V
t
PLH
t
PHL
2.0 V
V
OH
V
OL
0 V
Input
Output
Figure 4. Voltage Waveforms
Propagation Delay Times
[4]
From Output
Under Test
C
L
= 50 pF
500 ohm
Figure 5. Load Circuit
[3,4,5]
2.7V
0 V
Input
t
w(20-80)
2.7V
0 V
1.5V
1.5V
Input
t
w(50-50)
1.5V
Figure 6. Voltage WaveformsPulse Duration
[6]
From Output
Under Test
C
L
= 3 pF
500 ohm
Figure 7. Point to Point Load Circuit
[3,4,5]
1.5V
1.5V
1.5V
1.5V
t
PLH
t
PHL
2.7V
V
OH
V
OL
0 V
Input
Output
Figure 8. Voltage Waveforms
Propagation Delay Times
[4]
COMLINKTM SERIES
CY2CC810
Document #: 38-07056 Rev. *C
Page 5 of 7
INPUT
OUTPUT
t
PLH
t
PHL
tsk
(P)
=
l
t
PHL
- t
PLH
l
3V
1.5V
0V
VOH
1.5V
VOL
Figure 9. Pulse Skewtsk
(p)
IN P U T
O U T P U T 1
t
P L H 1
t
P H L 1
ts k
(P )
=
l
t
P LH 2
- t
P L H 1
l
o r t
P H L 2
- t
P H L1
l
3 V
1 .5 V
0 V
V O H
1 .5 V
V O L
O U T P U T 2
V O H
1 .5 V
V O L
ts k
(O )
tsk
(O )
t
P L H 2
t
P L H 2
Figure 10. Output Skewtsk
(0)
INPUT
PACKAGE 1 OUTPUT
t
PLH1
t
PHL1
tsk
(t)
=
l
t
PLH2
- t
PLH1
l
or t
PHL2
- t
PHL1
l
3V
1.5V
0V
VOH
1.5V
VOL
PACKAGE 2 OUTPUT
VOH
1.5V
VOL
tsk
(t)
tsk
(t)
t
PLH 2
t
PLH 2
Figure 11. Package Skewtsk
(t)
Ordering Information
Part Number
Package Type
Product Flow
CY2CC810SI
20-pin SOIC
Industrial, 40
C to 85
C
CY2CC810SIT
20-pin SOICTape and Reel
Industrial, 40
C to 85
C
CY2CC810OI
20-pin SSOP
Industrial, 40
C to 85
C
CY2CC810OIT
20-pin SSOPTape and Reel
Industrial, 40
C to 85
C
CY2CC810SC
20-pin SOIC
Commercial, 0
C to 70
C
CY2CC810SCT
20-pin SOICTape and Reel
Commercial, 0
C to 70
C
CY2CC810OC
20-pin SSOP
Commercial, 0
C to 70
C
CY2CC810OCT
20-pin SSOPTape and Reel
Commercial, 0
C to 70
C
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