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8Kx8 Power-Switched and
Reprogrammable PROM
CY7C266
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
Document #: 38-04005 Rev. **
Revised March 4, 2002
66
Features
CMOS for optimum speed/power
Windowed for reprogrammability
High speed
-- 20 ns (commercial)
-- 25 ns (military)
Low power
-- 660 mW (commercial)
-- 770 mW (military)
Super low standby power
-- Less than 85 mW when deselected
EPROM technology 100% programmable
5V
10% V
CC
, commercial and military
TTL-compatible I/O
Direct replacement for 27C64 EPROMs
Functional Description
The CY7C266 is a high-performance 8192 word by 8 bit
CMOS PROM. When deselected, the CY7C266 automatically
powers down into a low-power standby mode. It is packaged
in a 600-mil-wide package. The reprogrammable packages
are equipped with an erasure window; when exposed to UV
light, these PROMs are erased and can then be repro-
grammed. The memory cells utilize proven EPROM float-
ing-gate technology and byte-wide intelligent programming al-
gorithms.
The CY7C266 is a plug-in replacement for EPROM devices.
The EPROM cell requires only 12.5V for the super voltage and
low-current requirements allow for gang programming. The
EPROM cells allow for each memory location to be tested
100%, as each location is written into, erased, and repeatedly
exercised prior to encapsulation. Each PROM is also tested for
AC performance to guarantee that after customer program-
ming, the product will meet DC and AC specification limits.
Reading is accomplished by placing an active LOW signal on
OE and CE. The contents of the memory location addressed by the
address lines (A
0
through A
12
) will become available on the output
lines (O
0
through O
7
).
Logic Block Diagram
Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
Top View
CerDIP
V
CC
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
GND
V
CC
V
CC
NC
A
8
A
9
A
11
OE
A
10
CE
O
7
O
6
O
4
O
5
O
3
A
0
A
1
A
7
A
2
A
3
A
4
A
5
A
6
A
8
A
9
A
10
A
11
A
12
POWER DOWN
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
CE
OE
PROGRAMMABLE
ARRAY
MULTIPLEXER
COLUMN
ADDRESS
12
O
0
31
4
5
6
7
8
9
10
3 2 1
30
13
14151617
26
25
24
23
22
21
11
A
7
V
CC
A
6
A
5
A
4
A
3
A
2
A
1
A
0
CE
A
9
A
11
NC
A
10
O
7
O
6
O
4
GND
Top View
LCC
A
8
OE
A
12
V
CC
O
3
O
2
O
1
181920
27
28
29
32
NC
NC
NC
O
5
NC
V
CC
15
7C266
7C266
ADDRESS
DECODER
ROW
ADDRESS
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CY7C266
Document #: 38-04005 Rev. **
Page 2 of 11
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. 65
C to +150
C
Ambient Temperature with
Power Applied............................................. 55
C to +125
C
Supply Voltage to Ground Potential
(Pin 28 to Pin 14) ........................................... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State ............................................... 0.5V to +7.0V
DC Input Voltage............................................ 3.0V to +7.0V
DC Program Voltage .....................................................13.0V
Static Discharge Voltage .......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current .................................................... > 200 mA
UV Exposure ................................................ 7258 Wsec/cm
2
Selection Guide
7C266-20
7C266-25
7C266-35
7C266-45
Maximum Access Time (ns)
20
25
35
45
Maximum Operating
Current (mA)
Commercial
120
120
100
100
Military
140
120
Maximum Standby
Current (mA)
Commercial
15
15
15
15
Military
15
15
Operating Range
Range
Ambient
Temperature
V
CC
Commercial
0
C to +70
C
5V
10%
Industrial
[1]
40
C to +85
C
5V
10%
Military
[2]
55
C to +125
C
5V
10%
Electrical Characteristics
Over the Operating Range
[3,4]
Parameter
Description
Test Conditions
7C266-20
7C266-25
Unit
Min.
Max.
Min.
Max.
V
OH
Output HIGH Voltage
V
CC
= Min.,
I
OH
=
-
2.0 mA
Com'l
2.4
2.4
V
Mil
2.4
V
OL
Output LOW Voltage
V
CC
= Min., I
OL
= 8.0 mA
Com'l
0.4
0.4
V
V
CC
= Min., I
OL
= 6.0 mA
Mil
0.4
V
IH
Input HIGH Voltage
2.0
2.0
V
V
IL
Input LOW Voltage
0.8
0.8
V
I
IX
Input Current
GND < V
IN
< V
CC
10
+10
10
+10
A
V
CD
Input Diode
Clamp Voltage
Note 5
I
OZ
Output Leakage Current
V
OL
< V
OUT
< V
OH
,
Output Disabled
40
+40
40
+40
A
I
OS
Output Short
Circuit Current
[5]
V
CC
= Max., V
OUT
= GND
20
90
20
90
mA
I
CC
Power Supply Current
V
CC
= Max., V
IN
= 2.0V,
I
OUT
= 0 mA
Com'l
120
120
mA
Mil
140
I
SB
Standby Supply Current
Chip Enable Inactive,
CE > V
IH
, I
OUT
= 0 mA
Com'l
15
15
mA
Mil
15
Notes:
1.
Contact a Cypress representative regarding industrial temperature range specification.
2.
T
A
is the "instant on" case temperature.
3.
See the last page of this specification for Group A subgroup testing information.
4.
See the "Introduction to CMOS PROMs" section of the Cypress Data Book for general information on testing.
5.
For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.
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CY7C266
Document #: 38-04005 Rev. **
Page 3 of 11
Electrical Characteristics
Over the Operating Range
[3,4]
(continued)
Parameter
Description
Test Conditions
7C266-35
7C266-45
Unit
Min.
Max.
Min.
Max.
V
OH
Output HIGH Voltage
V
CC
= Min., I
OH
=
-
4.0 mA
2.4
2.4
V
V
OL
Output LOW Voltage
V
CC
= Min., I
OL
= 16.0 mA
0.4
0.4
V
V
IH
Input HIGH Voltage
2.0
2.0
V
V
IL
Input LOW Voltage
0.8
0.8
V
I
IX
Input Current
GND < V
IN
< V
CC
10
+10
10
+10
A
V
CD
Input Diode Clamp
Voltage
Note 5
I
OZ
Output Leakage Current
V
OL
< V
OUT
< V
OH
,
Output Disabled
10
+10
10
+10
A
I
OS
Output Short
Circuit Current
[5]
V
CC
= Max., V
OUT
= GND
20
90
20
90
mA
I
CC
Power Supply Current
V
CC
= Max., V
IN
= 2.0V,
I
OUT
= 0 mA
Com'l
100
100
mA
Mil
120
I
SB
Standby Supply Current
Chip Enable Inactive,
CE > V
IH
, I
OUT
= 0 mA
Com'l
15
15
mA
Mil
15
Capacitance
[4]
Parameter
Description
Test Conditions
Max.
Unit
C
IN
Input Capacitance
T
A
= 25
C, f = 1 MHz,
V
CC
= 5.0V
10
pF
C
OUT
Output Capacitance
10
pF
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CY7C266
Document #: 38-04005 Rev. **
Page 4 of 11
Erasure Characteristics
Wavelengths of light less than 4000 angstroms begin to erase
the devices in the windowed package. For this reason, an
opaque label should be placed over the window if the EPROM
is exposed to sunlight or fluorescent lighting for extended pe-
riods of time.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV inten-
sity multiplied by exposure time) of 25 Wsec/cm2. For an ultra-
AC Test Loads and Waveforms
R2 333
(403
MIL)
3.0V
5V
OUTPUT
R1 500
(658
MIL)
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
< 5 ns
< 5 ns
5V
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
(a) Normal Load
(b) High Z Load
OUTPUT
R
TH
200
5V
OUTPUT
5V
OUTPUT
R1250
30pF
INCLUDING
JIG AND
SCOPE
5 pF
INCLUDING
JIG AND
SCOPE
(c) Normal Load
(d) High Z Load
OUTPUT
2.0V
R
TH
100
R1 250
R1 500
(658
MIL)
R2 333
(403
MIL)
R2167
R2167
250
MIL
Test Load for -20 through -25 speeds
Test Load for -35 through -45 speeds
Equivalent to:
TH VENIN EQUIVALENT
Equivalent to:
TH VENIN EQUIVALENT
Switching Characteristics
Over the Operating Range
[2,3,4]
Parameter
Description
7C266-20
7C266-25
7C266
-
35
7C266-45
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
t
AA
Address to Output Valid
20
25
35
45
ns
t
HZCE
Chip Enable Inactive to High Z
25
30
40
45
ns
t
HZOE
Output Enable Inactive to High Z
12
12
20
20
ns
t
AOE
Output Enable Active to Output Valid
12
12
20
20
ns
t
ACE
Chip Enable Active to Output Valid
25
30
40
45
ns
t
OHA
Data Hold from Address Change
3
3
3
3
ns
t
PU
Chip Enable Active to Power-Up
25
30
40
45
ns
t
PD
Chip Enable Inactive to Power-Down
25
30
40
45
ns
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CY7C266
Document #: 38-04005 Rev. **
Page 5 of 11
violet lamp with a 12 mW/cm
2
power rating, the exposure time would
be approximately 35 minutes. The CY7C266 needs to be within 1
inch of the lamp during erasure. Permanent damage may result if the
EPROM is exposed to high-intensity UV light for an extended period
of time.
7258 Wsec/cm2 is the recommended maximum dosage.
Programming Modes
Programming support is available from Cypress as well as
from a number of third party software vendors. For detailed
programming information, including a listing of software pack-
ages, please see the PROM Programming Information located
at the end of this section. Programming algorithms can be ob-
tained from any Cypress representative.
Table 1. Mode Selection
Mode
Pin Function
[6, 7]
Normal Operation
A
8
A
9
A
10
A
11
A
12
CE
OE
D
7
-
D
0
Program
VFY
PGM
LAT
NA
NA
CE
V
PP
D
7
-
D
0
Read
A
8
A
9
A
10
A
11
A
12
V
IL
V
IL
O
7
-
O
0
Standby
X
X
X
X
X
V
IH
X
Three
-
Stated
Output Disable
A
8
A
9
A
10
A
11
A
12
V
IL
V
IH
Three
-
Stated
Program
V
IHP
V
ILP
V
ILP
V
ILP
V
ILP
V
ILP
V
PP
D
7
-
D
0
Program Verify
V
ILP
V
IHP
V
ILP
V
ILP
V
ILP
V
ILP
V
PP
O
7
-
O
0
Program Inhibit
V
IHP
V
IHP
V
ILP
V
ILP
V
ILP
V
ILP
V
PP
Three
-
Stated
Blank Check
V
ILP
V
IHP
V
ILP
V
ILP
V
ILP
V
ILP
V
PP
O
7
-
O
0
Notes:
6.
X = "don't care" but must not exceed V
CC
+ 5%.
7.
Address A
8
-
A
12
must be latched through lines A
0
-
A
4
in Programming modes.
Figure 1. Programming Pinout
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
NC
NA
A
7
A
6
A
5
A
4
/A
12
A
3
/A
11
A
2
/A
10
A
1
/A
9
A
0
/A
8
D
0
D
1
D
2
V
SS
V
PP
NC
NC
VFY
PGM
NA
V
PP
CE
D
7
D
6
D
4
D
5
D
3
12
D
0
31
4
5
6
7
8
9
10
3 2 1
30
13
14151617
26
25
24
23
22
21
11
A
7
V
CC
A
6
A
5
A
4
/A
12
A
3
/A
11
A
2
/A
1
0
A
1
/A
9
A
0
/A
8
CE
PGM
NA
NC
LAT
D
7
D
6
D
4
VFY
V CC
D
3
D
2
D
1
181920
27
28
29
32
NC
NC
NC
D
5
NC
V
CC
15
NA
V
PP
V
SS
LAT
CerDIP
LCC/PLCC
Top View
Top View
7C266
7C266

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