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Электронный компонент: CY7C281A-25JC

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1K x 8 PROM
CY7C281A
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
Document #: 38-04003 Rev. *B
Revised December 27, 2002
1CY7C282A
Features
CMOS for optimum speed/power
High speed
-- 25 ns (Commercial)
Low power
-- 495 mW (Commercial)
EPROM technology 100% programmable
Slim 300-mil or standard 600-mil DIP or 28-pin LCC
5V
10% V
CC
, commercial and military
TTL-compatible I/O
Direct replacement for bipolar PROMs
Capable of withstanding >2001V static discharge
Functional Description
The CY7C281A is a high-performance 1024-word by 8-bit
CMOS PROMs. It is packaged in 300-mil and 600-mil-wide
packages respectively. The CY7C281A is also available in a
28-pin leadless chip carrier. The memory cells utilize proven
EPROM floating-gate technology and byte-wide intelligent
programming algorithms.
The CY7C281A is a plug-in replacements for bipolar devices
and offer the advantages of lower power, superior perfor-
mance, and programming yield. The EPROM cell requires
only 12.5V for the super voltage, and low current requirements
allow for gang programming. The EPROM cells allow each
memory location to be tested 100% because each location is
written into, erased, and repeatedly exercised prior to encap-
sulation. Each PROM is also tested for AC performance to
guarantee that after customer programming, the product will
meet DC and AC specification limits.
Reading is accomplished by placing an active LOW signal on
CS
1
and CS
2
, and active HIGH signals on CS
3
and CS
4
. The
contents of the memory location addressed by the address
lines (A
0
-
A
9
) will become available on the output lines
(O
0
-
O
7
).
Selection Guide
7C281A-25
7C281A-30
Unit
Maximum Access Time
25
30
ns
Maximum Operating
Current
Commercial
100
100
mA
LogicBlockDiagram
Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
24
23
22
21
13
14
A8
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
O7
O6
O4
O5
O3
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
O7
O6
O5
O4
O3
O2
O1
O0
CS1
15
COLUMN
DECODER
CS2
CS3
CS4
A9
CS1
CS2
CS3
CS4
28
4
5
6
7
8
9
10
3 2 1
27
1314151617
26
25
24
23
22
21
20
11
12
19
A
5
V CC
GND
A
6
A
7
O
3
O
1
O0
18
O
4
O
5
NC
A0
A4
A3
NC
A
8
A
9
NC
NC
O7
O6
A2
A1
O
2
CS1
CS2
CS3
CS4
DIP
LCC/PLCC
Top View
Top View
7C281A
7C281A
ROW
DECODER
PROGRAMMABLE
ARRAY
MULTIPLEXER
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CY7C281A
Document #: 38-04003 Rev. *B
Page 2 of 8
Maximum Ratings
[1]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
.....................................-
65
C to +150
C
Ambient Temperature with
Power Applied
..................................................-
55
C to +125
C
Supply Voltage to Ground Potential
(Pin 24 to Pin 12)
.................................................-
0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State
.....................................................-
0.5V to +7.0V
DC Input Voltage
.................................................-
3.0V to +7.0V
DC Program Voltage (Pins 18, 20) ............................... 13.0V
Static Discharge Voltage............................................ >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current..................................................... >200 mA
Operating Range
Range
Ambient
Temperature
V
CC
Commercial
0
C to +70
C
5V
10%
Electrical Characteristics
Over the Operating Range
[2,3]
7C281A-25
7C281A-30
Parameter
Description
Test Conditions
Min.
Max.
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= Min., I
OH
=
-
4.0 mA
2.4
2.4
V
V
OL
Output LOW Voltage
V
CC
= Min., I
OL
= 16.0 mA
0.4
0.4
V
V
IH
Input HIGH Level
Guaranteed Input Logical HIGH
Voltage for All Inputs
2.0
2.0
V
V
IL
Input LOW Level
Guaranteed Input Logical LOW
Voltage for All Inputs
0.8
0.8
V
I
IX
Input Current
GND < V
IN
< V
CC
-
10
+10
-
10
+10
A
I
OZ
Output Leakage Current GND < V
OUT
< V
CC
,
Output Disabled
-
10
+10
-
10
+10
A
I
OS
Output Short Circuit
Current
[4]
V
CC
= Max., V
OUT
= GND
-
20
-
90
-
20
-
90
mA
I
CC
Power Supply Current
V
CC
= Max.,
I
OUT
= 0 mA
Commercial
100
100
mA
V
PP
Program Voltage
12
13
12
13
V
V
IHP
Program HIGH Voltage
3.0
3.0
V
V
ILP
Program LOW Voltage
0.4
0.4
V
I
PP
Program Supply Current
50
50
mA
Capacitance
[3]
Parameter
Description
Test Conditions
Max.
Unit
C
IN
Input Capacitance
T
A
= 25
C, f = 1 MHz,
V
CC
= 5.0V
10
pF
C
OUT
Output Capacitance
10
pF
Notes:
1.
The voltage on any input or I/O pin cannot exceed the power pin during power-up.
2.
See the last page of this specification for Group A subgroup testing information.
3.
See "Introduction to CMOS PROMs" in this Data Book for general information on testing.
4.
For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.
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CY7C281A
Document #: 38-04003 Rev. *B
Page 3 of 8
Programming Information
Programming support is available from Cypress as well as
from a number of third party software vendors. For detailed
programming information, including a listing of software
packages, please see the PROM Programming Information
located at the end of this section. Programming algorithms can
be obtained from any Cypress representative.
AC Test Loads and Waveforms
[3]
3.0V
5V
OUTPUT
R1 250
R2
167
30pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
5 ns
5 ns
5V
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
(a) NormalLoad
(b) HighZ Load
OUTPUT
2.0V
Equivalent to:
TH VENIN EQUIVALENT
100
R1 250
R2
167
ALL INPUT PULSES
Switching Characteristics
Over the Operating Range
[1,3]
7C281A-25
7C281A-30
Parameter
Description
Min.
Max.
Min.
Max.
Unit
t
AA
Address to Output Valid
25
30
ns
t
HZCS
Chip Select Inactive to High Z
15
20
ns
t
ACS
Chip Select Active to Output Valid
15
20
ns
Switching Waveforms
t
AA
t
HZCS
t
ACS
A
0
-
A
9
ADDRESS
CS
3
, CS
4
CS
1
, CS
2
O
0
-
O
7
DATA
SELECTED
DESELECTED
SELECTED
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CY7C281A
Document #: 38-04003 Rev. *B
Page 4 of 8
Table 1. Mode Selection
Pin Function
[5]
Read or Output Disable
A
9
A
0
CS
4
CS
3
CS
2
CS
1
O
7
O
0
Mode
Other
A
9
A
0
PGM
VFY
V
PP
CS
1
D
7
D
0
Read
A
9
A
0
V
IH
V
IH
V
IL
V
IL
O
7
O
0
Output Disable
A
9
A
0
X
X
V
IH
X
High Z
Output Disable
A
9
A
0
X
V
IL
X
X
High Z
Output Disable
A
9
A
0
V
IL
X
X
X
High Z
Output Disable
A
9
A
0
X
X
X
V
IH
High Z
Program
A
9
A
0
V
ILP
V
IHP
V
PP
V
ILP
D
7
D
0
Program Verify
A
9
A
0
V
IHP
V
ILP
V
PP
V
ILP
O
7
O
0
Program Inhibit
A
9
A
0
V
IHP
V
IHP
V
PP
V
ILP
High Z
Intelligent Program
A
9
A
0
V
ILP
V
IHP
V
PP
V
ILP
D
7
D
0
Blank Check
A
9
A
0
V
IHP
V
ILP
V
PP
V
ILP
Zeros
Note:
5.
X = "don't care" but not to exceed V
CC
5%.
Figure 1. Programming Pinouts
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
24
23
22
21
13
14
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
0
D
1
D
2
GND
V
CC
D
7
D
6
D
4
D
5
D
3
15
A
9
CS
1
V
PP
VFY
PGM
28
4
5
6
7
8
9
10
3 2 1
27
1314151617
26
25
24
23
22
21
20
11
12
19
A
5
V CC
GND
A
6
A
7
D
3
D
1
D
0
18
D
4
D
5
NC
A
0
A
4
A
3
A
8
A
9
NC
NC
D
7
D
6
A
2
A
1
D
2
CS
1
V
PP
VFY
PGM
7C281A
NC
DIP
PLCC
Top View
Top View
7C281A
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CY7C281A
Document #: 38-04003 Rev. *B
Page 5 of 8
Typical DC and AC Characteristics
1.4
1.6
1.0
0.8
4.0
4.5
5.0
5.5
6.0
-
55
25
125
1.2
1.1
1.2
1.0
0.8
0.6
4.0
4.5
5.0
5.5
6.0
NORM
A
L
IZ
E
D
A
CCE
S
S
T
I
ME
SUPPLYVOLTAGE(V)
NORMALIZED SUPPLY CURRENT
vs. SUPPLY VOLTAGE
NORMALIZED SUPPLY CURRENT
vs. AMBIENT TEMPERATURE
AMBIENT TEMPERATURE(
C)
SUPPLYVOLTAGE(V)
NORMALIZED ACCESS TIME
vs. SUPPLY VOLTAGE
0.6
1.2
1.0
0.9
0.8
NORM
A
L
IZ
E
D
I
CC
NORM
A
L
IZ
E
D
I
CC
T
A
=25
C
0.4
T
A
=25
C
f = f
MAX
CC
1.6
1.4
1.2
1.0
0.8
-
55
125
NORM
A
L
IZ
E
D
A
CCE
S
S
T
I
ME
AMBIENT TEMPERATURE (
C)
NORMALIZED ACCESSTIME
vs.TEMPERATURE
0.6
60
50
40
30
20
10
0
1.0
2.0
3.0
OUT
P
UT
S
O
URCE

CU
RRE
NT
(mA
)
OUTPUT VOLTAGE (V)
30.0
25.0
20.0
15.0
10.0
5.0
0
200
400
600
800
D
E
L
T
A t
(
n
s
)
AA
CAPACITANCE (pF)
TYPICAL ACCESS TIME CHANGE
vs. OUTPUT LOADING
4.0
0.0
1000
V
CC
=4.5V
T
A
=25
C
25
0
OUTPUT SOURCE CURRENT
vs. VOLTAGE
AA
150
175
125
75
50
25
0.0
1.0
2.0
3.0
O
U
T
P
UT
S
I
NK
CURR
E
N
T
(
m
A
)
0
100
OUTPUT VOLTAGE (V)
OUTPUT SINK CURRENT
vs. OUTPUT VOLTAGE
V
CC
=5.0V
T
A
=25
C
4.0
1.00
1.02
0.98
0.94
0.92
0.90
0
25
50
75
100
0.88
0.96
I
CC
vs.CYCLE PERIOD
CYCLE PERIOD (ns)
NORMA
L
I
Z
E
D
I
CC
V
CC
=5.5V
T
A
=25
C