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Электронный компонент: DS1065-80

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011200
FEATURES
30 kHz to 100 MHz output frequencies
User-programmable on-chip dividers (from 1-
513)
User-programmable on-chip prescaler (1, 2,
4)
No external components
0.5% initial tolerance
3% variation over temperature and voltage
Single 5V supply
FREQUENCY OPTIONS
Part No.
Max O/P freq.
DS1065-100 100.000
MHz
DS1065-80 80.000
MHz
DS1065-66 66.667
MHz
DS1065-60 60.000
MHz
PIN ASSIGNMENT
PIN DESCRIPTION
TO-92
1 I/O
- Input/Output
2 V
CC
- Power Supply
3 GND
- Ground
DESCRIPTION
The DS1065 is a fixed frequency oscillator requiring no external components for operation. Numerous
operating frequencies are possible in the range of approximately 30 kHz to 100 MHz through the use of
an on-chip programmable prescaler and divider.
The DS1065 features a master oscillator followed by a prescaler and then a programmable divider. The
prescaler and programmable divider are user-programmable with the desired values being stored in
nonvolatile memory. This allows the user to buy an off the shelf component and program it on site prior
to board production. Design changes can be accommodated easily by simply programming different
values into the device (or reprogramming previously programmed devices). The DS1065 is shipped from
the factory configured for half the maximum operating frequency. Contact the factory for specially
programmed devices.
The DS1065 features a dual-purpose Input/Output pin. If the device is powered up in Program mode this
pin can be used to input serial data to the on-chip registers. After a write command this data is stored in
nonvolatile memory. When the chip is subsequently powered up in operating mode these values are
automatically restored to the on-chip registers and the Input/Output pin becomes the oscillator output.
The DS1065 is available in TO-92 (3 LEAD) package, allowing the generation of a clock signal easily,
economically and using minimal board area.
DS1065
EconOscillator/Divider
PRELIMINARY
www.dalsemi.com
1 2 3
BOTTOM
VIEW
Dallas
DS1065
1 2 3
DS1065
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BLOCK DIAGRAM
Figure 1
PART NO.
SUFFIX
INTOSC
FREQUENCY
-100
100.000 MHz
-80
80.000 MHz
-66
66.667 MHz
-60
60.000 MHz
DS1065
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PIN DESCRIPTIONS
Input/Output Pin (IN/OUT): This pin is the main oscillator output, with a frequency determined by
clock reference, M and N dividers. Except in programming mode this pin is always an output and will be
referred to as "OUT". In programming mode this pin will be referred to as "IN".
USER-PROGRAMMABLE REGISTERS
The following registers can be programmed by the user to determine device operating frequency and
mode of operation. Details of how these registers are programmed can be found in a later section; in this
section the function of the registers are described. The register settings are nonvolatile, the values being
stored automatically in EEPROM when the registers are programmed.
NOTE: The register bits cannot be used to make frequency changes on the fly. Changes can only be
made by powering the device up in "Programming" mode. For them to be become effective the device
must then be powered down and powered up again in "Operation" mode.
For programming purposes the register bits are divided into two 9-bit words; the "MUX" word
determines mode prescaler values and the "DIV" word sets the value of the programmable divider.
MUX WORD
Figure 2
(MSB)
(LSB)
0*
0*
0*
1*
1*
M
MSEL
DIV1
0*
*These bits must be set to the indicated values
DIV1
This bit allows the master clock to be routed directly to the output (DIV1=1). The N programmable
divider is bypassed so the programmed value of N is ignored. The frequency of the output (f
OUT
) will be
INTCLK or EXTCLK depending on which reference has been selected. If the Internal clock is selected
the M prescaler is also bypassed (the bit values of MSEL and M are ignored), so in this case f
OUT
=
INTOSC (which also equals MCLK and INTCLK). If DIV1=0 the prescaler and programmable divider
function normally.
MSEL
This bit determines whether or not the M prescaler is bypassed.
MSEL
=1 will bypass the prescaler.
MSEL
=0 will switch in the prescaler (unless overridden by DIV1=1), with a divide-by number
determined by the M bit.
M
This bit sets the divide-by number for the prescaler. M = 0 results in divide-by-4, M=1 results in divide-
by-2. The setting of this bit is irrelevant if either DIV1=1 or
MSEL
=1.
Table 2
DIV1
BIT
MSEL
BIT
M
BIT
OPERATION
0
0
0
INTERNAL OSCILLATOR DIVIDED BY 4*N
0
0
1
INTERNAL OSCILLATOR DIVIDED BY 2*N
0
1
X
INTERNAL OSCILLATOR DIVIDED BY N
DS1065
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1
X
X
INTERNAL OSCILLATOR DIVIDED BY 1
DIV WORD
Figure 3
(MSB)
(LSB)
N (9-BITS)
N
These 9 bits determine the value of the programmable divider. The range of divisor values is from 2 to
513, and is equal to the programmed value of N plus 2:
Table 3
BIT
VALUES
DIVISOR (N)
VALUE
000000000
000000001
.
.
.
.
.
111111111
2
3
.
.
.
.
.
513
POWER-ON RESET
When power is initially applied to the device supply pin, a power-on reset sequence is executed, similar
to that which occurs when the device is restored from a power-down condition. This sequence comprises
two stages, first a conventional POR to initialize all on-chip circuitry, followed by a stabilization period
to allow the oscillator to reach a stable frequency before enabling the output:
1. Initialize internal circuitry.
2. Enable internal oscillator.
3. Set M and N to maximum values.
4. Wait approximately 1024 cycles of INTOSC for the oscillator to stabilize.
5. Load M and N programmed values from EEPROM.
6. Enable OUT.
Figure 10
DS1065
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PROGRAMMING
Normally when power is applied to the supply voltage pin the device will enter its normal operating
mode, following the power-on reset sequence. However the device can be made to enter a programming
mode if a pullup resistor is connected between IN/OUT and the supply voltage pin prior to power-up.
The method used for programming is a variant of the 1-Wire
TM
protocol used on a number of Dallas
Semiconductor products.
HARDWARE
The hardware configuration is shown in the diagram. A bus master is used to read and write data to the
DS1065's internal registers. The bus master may have either an open-drain or TTL-type architecture.
Figure 11
Programming mode is entered by simply powering up the DS1065 with a pullup of approximately 5k
W.
This will pull the IN/OUT pin above V
IH
on power-up and initiate the programming mode, causing the
DS1065 to internally release the IN/OUT pin after t
STAB
and allow the pullup resistor to pull up the pin to
the supply rail and await the Master Tx Reset pulse (see diagram).
NOTE:
To ensure normal operation any external pullup applied to IN/OUT must be greater than 20 k
W in value.
This will cause the IN/OUT pin to remain below V
IH
on power-up, resulting in normal operation at the
end of t
STAB
.