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Электронный компонент: DS1217A

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DS1217A
Nonvolatile Read/Write Cartridge
DS1217A
030598 1/8
FEATURES
User-insertable
Capacity up to 32K x 8
Standard bytewide pinout facilitates connection to
JEDEC 28-pin DIP socket via ribbon cable
Data retention greater than 10 years
Automatic write protection circuitry safeguards
against data loss
Manual switch unconditionally protects data
Compact size and shape
Rugged and durable
Wide operating temperature range of 0
C to 70
C
PIN ASSIGNMENT
Ground
+5 Volts
Write Enable
Address 13
Address 8
Address 9
Address 11
Output Enable
Address 10
Cartridge Enable
Data I/O 7
Data I/O 6
Data I/O 5
Data I/O 4
Data I/O 3
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
No Connect
Address 14
Address 12
Address 7
Address 6
Address 5
Address 4
Address 3
Address 2
Address 1
Address 0
Data I/O 0
Data I/O 1
Data I/O 2
Ground
Name
Position
Name
3"
A1
B1
OFF ON
See Mech. Drawings Section
DESCRIPTION
The DS1217A is a nonvolatile RAM designed for porta-
ble applications requiring a rugged and durable pack-
age. The nonvolatile cartridge is available in densities
ranging from 2K x 8 to 32K x 8 in 8K byte increments. A
card edge connector is required for connection to a host
system. A standard 30-pin connector can be used for di-
rect mount to a printed circuit board. Alternatively, re-
mote mounting can be accomplished with a 28-conduc-
tor ribbon cable terminated with a 28-pin DIP plug. The
remote method can be used to retrofit existing systems
that have JEDEC 28-pin bytewide memory sites.
The DS1217A cartridge has a lifetime energy source to
retain data and circuitry needed to automatically protect
memory contents. Reading and writing the memory lo-
cations is the same as using conventional static RAM. If
the user wants to convert from read/write memory to
read-only memory, a manual switch is provided to un-
conditionally protect memory contents.
DS1217A
030598 2/8
READ MODE
The DS1217A executes a read cycle whenever WE
(write enable) is inactive (high) and CE (cartridge en-
able) is active (low). The unique address specified by
the 15 address inputs (A0-A14) defines which of the
32,768 bytes of data is to be accessed. Valid data will be
available to the eight data I/O pins within t
ACC
(access
time) after the last address input signal is stable, provid-
ing that CE and OE (output enable) access times are
also satisfied. If OE and CE times are not satisfied , then
data access must be measured from the latter occurring
signal (CE or OE); the limiting parameter is either t
CO
for
CE or t
OE
for OE rather than address access. Read
cycles can only occur when V
CC
is greater than 4.5
volts. When V
CC
is less than 4.5 volts, the memory is
inhibited and all accesses are ignored.
WRITE MODE
The DS1217A is in the write mode whenever both the
WE and CE signals are in the active (low) state after ad-
dress inputs are stable. The last falling edge to occur of
either CE or WE will determine the start of the write
cycle. The write cycle is terminated by the first rising
edge of either CE or WE. All address inputs must be
kept valid throughout the write cycle. WE must return to
the high state for a minimum recovery time (t
WR
) before
another cycle can be initiated. The OE control signal
should be kept inactive (high) during write cycles to
avoid bus contention. However, if the output bus has
been enabled (CE and OE active) then WE will disable
the outputs in t
ODW
from its falling edge. Write cycles
can only occur when V
CC
is greater than 4.5 volts.
When V
CC
is less than 4.5 volts, the memory is write
protected.
DATA RETENTION MODE
The Nonvolatile Cartridge provides full functional capa-
bility for V
CC
greater than 4.5 volts and guarantees write
protection for V
CC
less than 4.5 volts. Data is main-
tained in the absence of V
CC
without any additional sup-
port circuitry. The DS1217A constantly monitors V
CC
.
Should the supply voltage decay, the RAM is automati-
cally write protected below 4.5 volts. As V
CC
falls below
approximately 3.0 volts, the power switching circuit con-
nects a lithium energy source to RAM. To retain data
during power-up, when V
CC
rises above approximately
3.0 volts, the power switching circuit connects the exter-
nal V
CC
to the RAM and disconnects the lithium energy
source. Normal RAM operation can resume after V
CC
exceeds 4.5 volts.
The DS1217A checks battery status to warn of potential
data loss. Each time that V
CC
power is restored to the
cartridge, the battery voltage is checked with a precision
comparator. If the battery supply is less than 2.0 volts,
the second memory cycle is inhibited. Battery status
can, therefore, be determined by performing a read
cycle after power-up to any location in memory, record-
ing that memory location content. A subsequent write
cycle can then be executed to the same memory loca-
tion, altering data. If the next read cycle fails to verify the
written data, the contents of the memory are question-
able.
In many applications, data integrity is paramount. For
this reason, the cartridge provides battery redundancy.
The DS1217A features an internal isolation switch that
provides for the connection of two batteries. During bat-
tery backup time, the battery with the highest voltage is
selected for use. If one battery fails, the other will auto-
matically take over. The switch between batteries is
transparent to the user. A battery status warning will oc-
cur if both batteries are less than 2.0 volts.
REMOTE CONNECTION VIA A RIBBON
CABLE
Existing systems that contain 28-pin bytewide sockets
can be retrofitted using a 28-pin DIP plug. The DIP plug,
AMP Part Number 746616-2, can be inserted into the
28-pin site after the memory is removed. Connection to
the cartridge is accomplished via a 28-pin ribbon cable
connected to a 30-contact card edge connector, AMP
Part Number 499188-4. The 28-pin ribbon cable must
be right-justified such that positions A1 and B1 are left
disconnected. For applications where the cartridge is
installed or removed with power applied, both ground
contacts (A1 and B15) on the card edge connector
should be grounded to further enhance data integrity.
Access time push-out may occur as the distance be-
tween the cartridge and driving circuitry is increased.
DS1217A
030598 3/8
CARTRIDGE NUMBERING Table 1
PART NO.
DENSITY
UNUSED ADDRESS INPUTS
DS1217A/16K-25
2K x 8
*Address 11, 12, 13, 14
DS1217A/64K-25
8K x 8
*Address 13, 14
DS1217A/128K-25
16K x 8
*Address 14
DS1217A/192K-25
24K x 8
DS1217A/256K-25
32K x 8
*Unused address inputs must be held low (V
IL
).
DS1217A
030598 4/8
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Connection Relative to Ground
-0.3V to +7.0V
Operating Temperature
0
C to 70
C
Storage Temperature
-40
C to +70
C
* This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(0
C to 70
C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Power Supply Voltage
V
CC
4.5
5.0
5.5
V
Input High Voltage
V
IH
2.2
V
CC
V
Input Low Voltage
V
IL
0.0
+0.8
V
DC ELECTRICAL CHARACTERISTICS
(0
C to 70
C; V
CC
=5V
10%)
PARAMETER
SYMBOL
MIN
TYP
MAX.
UNITS
NOTES
Input Leakage Current
I
IL
-60
+60
A
I/O Leakage Current
CE
V
IH
V
CC
I
IO
-10
+10
A
Output Current @ 2.4V
I
OH
-1.0
-2.0
mA
Output Current @ 0.4V
I
OL
2.0
3.0
mA
Standby Current CE=2.2V
I
CCS1
5.0
10
mA
Operating Current
I
CCO1
35
75
mA
CAPACITANCE
(t
A
= 25
C)
PARAMETER
SYMBOL
MIN
TYP
MAX.
UNITS
NOTES
Input Capacitance
C
IN
75
pF
Input/Output Capacitance
C
I/O
75
pF
DS1217A
030598 5/8
AC ELECTRICAL CHARACTERISTICS
(0
C to 70
C; V
CC
=5V
10%)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Read Cycle Time
t
RC
250
ns
Access Time
t
ACC
250
ns
OE to Output Valid
t
OE
125
ns
CE to Output Valid
t
CO
250
ns
OE or CE to Output Active
t
COE
5
ns
5
Output High Z from
Deselection
t
OD
125
ns
5
Output Hold from
Address Change
t
OH
5
ns
Write Cycle Time
t
WC
250
ns
Write Pulse Width
t
WP
170
ns
3
Address Setup Time
t
AW
0
ns
Write Recovery Time
t
WR
20
ns
Output High Z from WE
t
ODW
100
ns
5
Output Active from WE
t
OEW
5
ns
5
Data Setup Time
t
DS
100
ns
4
Data Hold Time from WE
t
DH
20
ns
4
DS1217A
030598 6/8
ADDRESSES
CE
OE
D
OUT
t
RC
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
t
OH
V
IH
t
OD
t
OD
OUTPUT
DATA VALID
t
ACC
t
CO
t
OE
t
COE
t
COE
V
IH
V
IL
V
IH
V
IL
V
OL
V
OH
V
OL
V
OH
READ CYCLE (1)
ADDRESSES
CE
WE
D
OUT
D
IN
t
WC
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IL
V
IL
V
IL
V
IL
V
IH
V
IH
t
ODW
t
OEW
t
WP
t
WR
t
DH
t
DS
V
IH
V
IL
V
IH
V
IL
DATA IN
STABLE
HIGH
IMPEDANCE
WRITE CYCLE 1 (2), (6), (7)
t
AW
ADDRESSES
WRITE CYCLE 2 (2), (8)
CE
WE
D
OUT
D
IN
t
WC
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
t
AW
t
WP
V
IL
V
IL
V
IL
V
IL
V
IH
V
IH
V
IL
V
IH
t
WR
t
COE
t
ODW
DATA IN
STABLE
V
IH
V
IL
V
IH
V
IL
t
DS
t
DH
DS1217A
030598 7/8
POWER-DOWN/POWER-UP CONDITION
3.2V
CE
V
CC
t
F
t
PD
t
R
t
REC
t
DR
LEAKAGE CURRENT
I
L
SUPPLIED FROM
LITHIUM CELL
DATA RETENTION TIME
4.50V
POWER-DOWN/POWER-UP TIMING
(0
C to 70
C)
SYM
PARAMETER
MIN
MAX
UNITS
NOTES
t
PD
CE at V
IH
before Power-Down
0
s
10
t
F
V
CC
Slew from 4.5V to 0V (CE at V
IH
)
100
s
t
R
V
CC
Slew from 0V to 4.5V (CE at V
IH
)
0
s
t
REC
CE at V
IH
after Power-Up
2
125
ms
10
(t
A
= 25
C)
SYM
PARAMETER
MIN
MAX
UNITS
NOTES
t
DR
Expected Data Retention Time
10
years
9
WARNING:
Under no circumstances are negative undershoots, of any amplitude, allowed when the device is in battery backup
mode.
DS1217A
030598 8/8
NOTES:
1. WE is high for a read cycle.
2. OE = V
IH
or V
IL
. If OE = V
IH
during the write cycle, the output buffers remain in a high impedance state.
3. t
WP
is specified as the logical AND of CE and WE. t
WP
is measured from the latter of CE or WE going low to
the earlier of CE or WE going high.
4. t
DH
, t
DS
are measured from the earlier of CE or WE going high.
5. These parameters are sampled with a 5pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or later than the WE low transition in Write Cycle 1, the
output buffers remain in a high impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition in Write Cycle 1, the
output buffers remain in a high impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output
buffers remains in a high impedance state during this period.
9. Each DS1217A is marked with a 4-digit date code AABB. AA designates the year of manufacture; BB desig-
nates the week of manufacture. The expected t
DR
is defined as starting at the date of manufacture.
10. Removing and installing the cartridge with power applied may disturb data.
DC TEST CONDITIONS
Outputs Open
t Cycle = 250ns
All Voltages Are Referenced to Ground
AC TEST CONDITIONS
Output Load: 100pF + 1TTL Gate
Input Pulse Levels: 0 - 3.0V
Timing Measurement Reference Levels
Input: 1.5 V