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022101

FEATURES

Integrated NV SRAM, real time clock,
crystal, power-fail control circuit and lithium
energy source

Clock registers are accessed identical to the
static RAM. These registers are resident in the
eight top RAM locations.

Century byte register; ie., Y2K compliant

Totally nonvolatile with over 10 years of
operation in the absence of power

BCD coded century, year, month, date, day,
hours, minutes, and seconds with automatic
leap year compensation valid up to the year
2100

Battery voltage level indicator flag

Power-fail write protection allows for ±10%
V

power supply tolerance

Lithium energy source is electrically
disconnected to retain freshness until power is
applied for the first time

DIP Module only
-

Standard JEDEC bytewide 128k x 8 static
RAM pinout

PowerCap

Module Board only

Surface mountable package for direct
connection to PowerCap containing
battery and crystal

Replaceable battery (PowerCap)

Power-On Reset Output

Pin for pin compatible with other densities
of DS174XP Timekeeping RAM

PIN ASSIGNMENT

DS1746/DS1746P

Y2KC Nonvolatile Timekeeping RAM

www.dalsemi.com

A15

A16

RST

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

GND

A14

A13

A12

A11

A10

X1 GND V

BAT

34-Pin PowerCap Module Board

(Uses DS9034PCX PowerCap)

32-Pin Encapsulated Package

1
2
3
4
5
6
7
8
9
10
11
12

A14

A5
A4
A3
A2
A1
A0

DQ1

DQ0

A15
NC
WE
A13
A8
A9
A11
OE
A10
CE
DQ7

DQ5

DQ6

30
29
28
27
26
25
24
23
22
21

A16

A12

DQ2

GND

15
16

18
17

DQ4
DQ3

DS1746/DS1746P

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PIN DESCRIPTION

A0A16

Address Input

Chip Enable

Output Enable

Write Enable

Power Supply Input

GND

Ground

DQ0DQ7

Data Input/Output

No Connection

RST

Poweron Reset Output (Power

Cap Module board only)

X1, X2

Crystal Connection

BAT

Battery Connection

ORDERING INFORMATION

DS1746P

(5V)

blank 32-pin DIP Module
P

34-pin PowerCap Module board*

DS1746WP

(3.3V)

blank 32-pin DIP Module
P 34-pin PowerCap Module board*

*DS9034PCX (PowerCap) Required:

(must be ordered separately)

DESCRIPTION

The DS1746 is a full function, year 2000 compliant (Y2KC), real-time clock/calendar (RTC) and 128k x
8 non-volatile static RAM. User access to all registers within the DS1746 is accomplished with a
bytewide interface as shown in Figure 1. The Real Time Clock (RTC) information and control bits reside
in the eight uppermost RAM locations. The RTC registers contain century, year, month, date, day, hours,
minutes, and seconds data in 24-hour BCD format. Corrections for the date of each month and leap year
are made automatically. The RTC clock registers are double buffered to avoid access of incorrect data
that can occur during clock update cycles. The double buffered system also prevents time loss as the
timekeeping countdown continues unabated by access to time register data. The DS1746 also contains its
own power-fail circuitry which deselects the device when the V

supply is in an out of tolerance

condition. This feature prevents loss of data from unpredictable system operation brought on by low V

as errant access and update cycles are avoided.

DS1746/DS1746P

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DS1746 BLOCK DIAGRAM Figure 1

PACKAGES

The DS1746 is available in two packages (32-pin DIP and 34-pin PowerCap module). The 32-pin DIP
style module integrates the crystal, lithium energy source, and silicon all in one package. The 34-pin
PowerCap Module Board is designed with contacts for connection to a separate PowerCap (DS9034PCX)
that contains the crystal and battery. This design allows the PowerCap to be mounted on top of the
DS1746P after the completion of the surface mount process. Mounting the PowerCap after the surface
mount process prevents damage to the crystal and battery due to the high temperatures required for solder
reflow. The PowerCap is keyed to prevent reverse insertion. The PowerCap Module Board and PowerCap
are ordered separately and shipped in separate containers. The part number for the PowerCap is
DS9034PCX.

CLOCK OPERATIONS-READING THE CLOCK

While the double buffered register structure reduces the chance of reading incorrect data, internal updates
to the DS1746 clock registers should be halted before clock data is read to prevent reading of data in
transition. However, halting the internal clock register updating process does not affect clock accuracy.
Updating is halted when a one is written into the read bit, bit 6 of the century register, see Table 2. As
long as a one remains in that position, updating is halted. After a halt is issued, the registers reflect the
count, that is day, date, and time that was current at the moment the halt command was issued. However,
the internal clock registers of the double buffered system continue to update so that the clock accuracy is
not affected by the access of data. All of the DS1746 registers are updated simultaneously after the
internal clock register updating process has been re-enabled. Updating is within a second after the read bit
is written to zero. The READ bit must be a zero for a minimum of 500

s to ensure the external registers

will be updated.

DS1746/DS1746P

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DS1746 TRUTH TABLE

Table 1

MODE

POWER

DESELECT

HIGH-Z

STANDBY

WRITE

DATA IN

ACTIVE

READ

DATA OUT

ACTIVE

READ

HIGH-Z

ACTIVE

DESELECT

HIGH-Z

CMOS STANDBY

DESELECT

HIGH-Z

DATA RETENTION

MODE

SETTING THE CLOCK

As shown in Table 2, bit 7 of the century register is the write bit. Setting the write bit to a one, like the
read bit, halts updates to the DS1746 registers. The user can then load them with the correct day, date and
time data in 24 hour BCD format. Resetting the write bit to a zero then transfers those values to the actual
clock counters and allows normal operation to resume.

STOPPING AND STARTING THE CLOCK OSCILLATOR

The clock oscillator may be stopped at any time. To increase the shelf life, the oscillator can be turned off
to minimize current drain from the battery. The OSC bit is the MSB (bit 7) of the seconds registers, see
Table 2. Setting it to a one stops the oscillator.

FREQUENCY TEST BIT

As shown in Table 2, bit 6 of the day byte is the frequency test bit. When the frequency test bit is set to
logic "1" and the oscillator is running, the LSB of the seconds register will toggle at 512 Hz. When the
seconds register is being read, the DQ0 line will toggle at the 512 Hz frequency as long as conditions for
access remain valid (i.e., CE low, OE low, WE high, and address for seconds register remain valid and
stable).

CLOCK ACCURACY (DIP MODULE)

The DS1746 is guaranteed to keep time accuracy to within

1 minute per month at 25

C. The RTC is

calibrated at the factory by Dallas Semiconductor using nonvolatile tuning elements, and does not require
additional calibration. For this reason, methods of field clock calibration are not available and not
necessary. Clock accuracy is also effected by the electrical environment and caution should be taken to
place the RTC in the lowest level EMI section of the PCB layout. For additional information please see
application note 58.

CLOCK ACCURACY (POWERCAP MODULE)

The DS1746 and DS9034PCX are each individually tested for accuracy. Once mounted together, the
module will typically keep time accuracy to within

1.53 minutes per month (35 ppm) at 25°C. Clock

accuracy is also effected by the electrical environment and caution should be taken to place the RTC in
the lowest level EMI section of the PCB layout. For additional information please see application note
58.

DS1746/DS1746P

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DS1746 REGISTER MAP

Table 2

DATA

ADDRESS

FUNCTION/RANGE

1FFFF

10 YEAR

YEAR

00-99

1FFFE

X X X

10 MO

MONTH

01-12

1FFFD

X X

10 DATE

DATE

01-31

1FFFC

BF FT X X X

DAY

01-07

1FFFB

X X

10 HOUR

HOUR

00-23

1FFFA

10 MINUTES

MINUTES

00-59

1FFF9

OSC

10 SECONDS

SECONDS

00-59

1FFF8

W R

10 CENTURY

CENTURY

00-39

OSC = STOP BIT

R = READ BIT

FT = FREQUENCY TEST

W = WRITE BIT

X = SEE NOTE BELOW BF = BATTERY FLAG

NOTE:

All indicated "X" bits are not dedicated to any particular function and can be used as normal RAM bits.

RETRIEVING DATA FROM RAM OR CLOCK

The DS1746 is in the read mode whenever OE (output enable) is low, WE (write enable) is high, and CE
(chip enable) is low. The device architecture allows ripple-through access to any of the address locations
in the NV SRAM. Valid data will be available at the DQ pins within t

after the last address input is

stable, providing that the CE and OE access times and states are satisfied. If CE or OE access times
and states are not met, valid data will be available at the latter of chip enable access (t

CEA)

or at output

enable access time (t

OEA)

. The state of the data input/output pins (DQ) is controlled by CE and OE . If the

outputs are activated before t

, the data lines are driven to an intermediate state until t

. If the address

inputs are changed while CE and OE remain valid, output data will remain valid for output data hold
time (t

) but will then go indeterminate until the next address access.

WRITING DATA TO RAM OR CLOCK

The DS1746 is in the write mode whenever WE , and CE are in their active state. The start of a write is
referenced to the latter occurring transition of WE , or CE . The addresses must be held valid throughout
the cycle. CE or WE must return inactive for a minimum of t

prior to the initiation of another read or

write cycle. Data in must be valid t

prior to the end of write and remain valid for t

afterward. In a

typical application, the OE signal will be high during a write cycle. However, OE can be active
provided that care is taken with the data bus to avoid bus contention. If OE is low prior to

WE transitioning low the data bus can become active with read data defined by the address inputs. A low

transition on WE will then disable the output t

WEZ

after WE goes active.

DS1746/DS1746P

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DATA RETENTION MODE

The 5-volt device is fully accessible and data can be written or read only when V

is greater than V

However, when V

is below the power fail point, V

, (point at which write protection occurs) the

internal clock registers and SRAM are blocked from any access. At this time the power fail reset output
signal

)

RST

(

is driven active and will remain active until V

returns to nominal levels. When V

falls

below the battery switch point V

(battery supply level), device power is switched from the V

pin to

the backup battery. RTC operation and SRAM data are maintained from the battery until V

is returned

to nominal levels. The 3.3 volt device is fully accessible and data can be written or read only when V

greater than V

. When V

falls below the power fail point, V

, access to the device is inhibited. At this

time the power fail reset output signal ( RST ) is driven active and will remain active until V

returns to

nominal levels. If V

is less than V

, the device power is switched from V

to the backup supply

BAT

) when V

drops below V

If V

is greater than V

the device power is switched from V

the backup supply (V

BAT

)

when V

drops below V

RTC operation and SRAM data are maintained

from the battery until V

is returned to nominal levels. The RST signal is an open drain output and

requires a pull up. Except for the RST , all control, data, and address signals must be powered down
when V

is powered down.

BATTERY LONGEVITY

The DS1746 has a lithium power source that is designed to provide energy for clock activity, and clock
and RAM data retention when the V

supply is not present. The capability of this internal power supply

is sufficient to power the DS1746 continuously for the life of the equipment in which it is installed. For
specification purposes, the life expectancy is 10 years at 25

C with the internal clock oscillator running in

the absence of V

power. Each DS1746 is shipped from Dallas Semiconductor with its lithium energy

source disconnected, guaranteeing full energy capacity. When V

is first applied at a level greater than

, the lithium energy source is enabled for battery backup operation. Actual life expectancy of the

DS1746 will be much longer than 10 years since no lithium battery energy is consumed when V

present.

BATTERY MONITOR

The DS1746 constantly monitors the battery voltage of the internal battery. The Battery Flag bit (bit 7) of
the day register is used to indicate the voltage level range of the battery. This bit is not writable and
should always be a one when read. If a zero is ever present, an exhausted lithium energy source is
indicated and both the contents of the RTC and RAM are questionable.

DS1746/DS1746P

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ABSOLUTE MAXIMUM RATINGS*

Voltage on Any Pin Relative to Ground

0.3V to +6.0V

Storage Temperature

C to +85

Soldering Temperature

260°C for 10 seconds (DIP Package) (See Note 7)
See IPC/JEDEC Standard J-STD-020A for
Surface Mount Devices

* This is a stress rating only and functional operation of the device at these or any other condition above

those indicated in the operation sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect reliability.

OPERATING RANGE

Range

Temperature

Commercial

0°C to +70°C

3.3V

10% or 5V

10%

RECOMMENDED DC OPERATING CONDITIONS (Over the Operating Range)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

2.2

+0.3

Logic 1 Voltage All Inputs
V

= 5V

10%

= 3.3V

10%

2.0

+0.3

-0.3

0.8

Logic 0 Voltage All Inputs
V

= 5V

10%

= 3.3V

10%

-0.3

0.6

DC ELECTRICAL CHARACTERISTICS

(Over the Operating Range; V

= 5.0V

10%)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

Active Supply Current

Icc

2,3

TTL Standby Current
( CE = V

)

Icc

2,3

CMOS Standby Current
( CE

-0.2V)

Icc

2,3

Input Leakage Current (any input)

-1

Output Leakage Current
(any output)

-1

Output Logic 1 Voltage
(I

OUT

= -1.0 mA)

2.4

Output Logic 0 Voltage
(I

OUT

= +2.1 mA)

0.4

Write Protection Voltage

4.25

4.50

Battery Switch Over Voltage

BAT

1,4

DS1746/DS1746P

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DC ELECTRICAL CHARACTERISTICS

(Over the Operating Range; V

= 3.3V

10%)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

Active Supply Current

Icc

2,3

TTL Standby Current
( CE = V

)

Icc

2,3

CMOS Standby Current
( CE

-0.2V)

Icc

2,3

Input Leakage Current (any input)

-1

Output Leakage Current
(any output)

-1

Output Logic 1 Voltage
(I

OUT

= -1.0 mA)

2.4

Output Logic 0 Voltage
(I

OUT

= +2.1 mA)

0.4

Write Protection Voltage

2.80

2.97

Battery Switch Over Voltage

BAT

1,4

READ CYCLE, AC CHARACTERISTICS

(Over the Operating Range; V

= 5.0V

10%)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

Read Cycle Time

Address Access Time

CE to DQ Low-Z

CEL

CE Access Time

CEA

CE Data Off Time

CEZ

OE to DQ Low-Z

OEL

OE Access Time

OEA

OE Data Off Time

OEZ

Output Hold from Address

DS1746/DS1746P

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WRITE CYCLE, AC CHARACTERISTICS

(Over the Operating Range; V

= 5.0V

10%)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

Write Cycle Time

Address Setup Time

WE Pulse Width

WEW

CE Pulse Width

CEW

Data Setup Time

Data Hold Time

DH1

Data Hold Time

DH2

Address Hold Time

AH1

Address Hold Time

AH2

WE Data Off Time

WEZ

Write Recovery Time

WRITE CYCLE, AC CHARACTERISTICS

(Over the Operating Range; V

= 3.3V

10%)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

Write Cycle Time

120

Address Setup Time

120

WE Pulse Width

WEW

100

CE Pulse Width

CEW

110

CE and CE2 Pulse Width

CEW

110

Data Setup Time

Data Hold Time

DH1

Data Hold Time

DH2

Address Hold Time

AH1

Address Hold Time

AH2

WE Data Off Time

WEZ

Write Recovery Time

DS1746/DS1746P

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POWER

-
-
-
-

UP/DOWN AC CHARACTERISTICS

(Over the Operating Range; V

= 5.0V

10%)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

CE or WE at V

Before Power-down

Fall Time: V

(MAX) to

(MIN)

300

Fall Time: V

(MIN) to V

Rise Time: V

(MIN) to

(MAX)

Power-up Recover Time

REC

Expected Data Retention Time
(Oscillator ON)

years

5,6

POWERUP/POWERDOWN TIMING 5 VOLT DEVICE

DS1746/DS1746P

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POWERUP/DOWN CHARACTERISTICS

(Over the Operating Range; V

= 3.3V

10%)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

CE or WE at V

, Before

Power-down

Fall Time: V

(MAX) to

(MIN)

300

Rise Time: V

(MIN) to

(MAX)

to RST High

REC

Expected Data Retention Time
(Oscillator ON)

years

5,6

POWERUP/DOWN WAVEFORM TIMING 3.3 VOLT DEVICE

CAPACITANCE

t A = 25

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

Capacitance on all input pins

Capacitance on all output pins

DS1746/DS1746P

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AC TEST CONDITIONS

Output Load:

100 pF + 1TTL Gate

Input Pulse Levels:

0.0 to 3.0V

Timing Measurement Reference Levels:

Input: 1.5V
Output: 1.5V

Input Pulse Rise and Fall Times: 5 ns

NOTES

1. Voltages are referenced to ground.

2. Typical values are at 25

C and nominal supplies.

3. Outputs are open.

4. Battery switch over occurs at the lower of either the battery terminal voltage or V

5. Data retention time is at 25

6. Each DS1746 has a builtin switch that disconnects the lithium source until V

is first applied by the

user. The expected t

is defined for DIP modules and assembled PowerCap modules as a cumulative

time in the absence of V

starting from the time power is first applied by the user.

7. RealTime Clock Modules (DIP) can be successfully processed through conventional wavesoldering

techniques as long as temperatures as long as temperature exposure to the lithium energy source
contained within does not exceed +85

C. Post solder cleaning with water washing techniques is

acceptable, provided that ultra-sonic vibration is not used.

In addition, for the PowerCap:

Dallas Semiconductor recommends that PowerCap Module bases experience one pass through
solder reflow oriented with the label side up ("live bug").

Hand Soldering and touchup: Do not touch or apply the soldering iron to leads for more than
3 (three) seconds. To solder, apply flux to the pad, heat the lead frame pad and apply solder. To
remove the part, apply flux, heat the lead frame pad until the solder reflows and use a solder wick
to remove solder.

AH1

, t

DH1

are measured from WE going high.

9. t

AH2

, t

DH2

are measured from CE going high.

DS1746/DS1746P

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DS1746P

PKG

INCHES

DIM

MIN

NOM

MAX

0.920

0.925

0.930

0.980

0.985

0.990

0.080

0.052

0.055

0.058

0.048

0.050

0.052

0.015

0.020

0.025

0.027

0.030

NOTE:

Dallas Semiconductor recommends that PowerCap Module bases experience one pass through solder
reflow oriented with the label side up ("live bug").

Hand Soldering and touchup: Do not touch or apply the soldering iron to leads for more than 3 (three)
seconds. To solder, apply flux to the pad, heat the lead frame pad and apply solder. To remove the part,
apply flux, heat the lead frame pad until the solder reflows and use a solder wick to remove solder.

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