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Электронный компонент: ADS-943GM

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ADS-943
14-Bit, 3MHz, Low-Distortion
Sampling A/D Converters
edge-triggered, requiring only the rising edge of a start convert
pulse to initiate a conversion.
The device is offered with a bipolar input range of 2V. Models
are available for use in either commercial (0 to +70C) or
military (55 to +125C) operating temperature ranges. A
proprietary, auto-calibrating, error-correcting circuit allows the
device to achieve specified performance over the full military
temperature range.
Figure 1. ADS-943 Functional Block Diagram
INPUT/OUTPUT CONNECTIONS
PIN
FUNCTION
PIN
FUNCTION
1
BIT1 (MSB)
24
ANALOG GROUND
2
BIT 2
23
OFFSET ADJUST
3
BIT 3
22
+5V ANALOG SUPPLY
4
BIT 4
21
ANALOG INPUT
5
BIT 5
20
5V SUPPLY
6
BIT 6
19
ANALOG GROUND
7
BIT 7
18
START CONVERT
8
BIT 8
17
EOC
9
BIT 9
16
BIT 14 (LSB)
10
BIT 10
15
BIT 13
11
BIT 11
14
DIGITAL GROUND
12
BIT 12
13
+5V DIGITAL SUPPLY
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.)
Tel: (508) 339-3000 Fax: (508) 339-6356
For immediate assistance: (800) 233-2765
FEATURES
14-bit resolution
3MHz minimum sampling rate
Ideal for both frequency and time-domain applications
Excellent peak harmonics, 83dB
Excellent signal-to-noise ratio, 79dB
No missing codes over full military temperature range
5V supplies, 1.7 Watts
Small, 24-pin ceramic DDIP or SMT
Low cost
GENERAL DESCRIPTION
The low-cost ADS-943 is a 14-bit, 3MHz sampling A/D
converter optimized to meet the demanding dynamic-range
and sampling-rate requirements of contemporary digital
telecommunications applications. The ADS-943's outstanding
dynamic performance is evidenced by a peak harmonic
specification of 83dB and a signal-to-noise ratio (SNR) of
79dB. Additionally, the ADS-943 easily achieves the 2.2MHz
minimum sampling rate required by digital receivers in certain
ADSL, HDSL and ATM applications. The ADS-943 also
addresses size and power constraints normally associated with
these types of applications. This device requires just 5V
supplies, dissipates 1.7 Watts, and is packaged in a very small
24-pin DDIP.
Although optimized for frequency-domain applications, the
ADS-943's DNL and noise specifications are also outstanding,
thereby making it an equally impressive device for time-domain
applications (graphic and medical imaging, process control,
etc.). In fact, the ADS-943 guarantees no missing codes to the
14-bit level over the full military operating temperature range.
The functionally complete ADS-943 contains a fast-settling
sample-hold amplifier, a subranging (two-pass) A/D converter,
an internal reference, timing/control logic, and error-correction
circuitry. Digital input and output levels are TTL. The unit is
REF
DAC
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16 BIT 14 (LSB)
15 BIT 13
12 BIT 12
11 BIT 11
10 BIT 10
9 BIT 9
8 BIT 8
7 BIT 7
6 BIT 6
5 BIT 5
4 BIT 4
3 BIT 3
2 BIT 2
1 BIT 1 (MSB)
TIMING AND
CONTROL LOGIC
OFFSET ADJUST 23
ANALOG INPUT 21
START CONVERT 18
EOC 17
+5V ANALOG SUPPLY 22
+5V DIGITAL SUPPLY 13
DIGITAL GROUND 14
5V SUPPLY 20
ANALOG GROUND 19, 24
+
S/H
BUFFER
D
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A
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C
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L
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I
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FLASH
ADC
1
FLASH
ADC
2
POWER AND GROUNDING
AMP
ADS-943
2
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
LIMITS
UNITS
+5V Supply (Pins 13, 22)
0 to +6
Volts
5V Supply (Pin 20)
0 to 6
Volts
Digital Input (Pin 18)
0.3 to +V
DD
+0.3
Volts
Analog Input (Pin 21)
5 to +5
Volts
Lead Temperature (10 seconds)
+300
C
PHYSICAL/ENVIRONMENTAL
PARAMETERS
MIN.
TYP.
MAX.
UNITS
Operating Temp. Range, Case
ADS-943MC, GC
0
--
+70
C
ADS-943MM, GM, 883, G/883
55
--
+125
C
Thermal Impedance
jc
--
6
--
C/Watt
ca
--
23
--
C/Watt
Storage Temperature Range
65
--
+150
C
Package Type
24-pin,metal-sealed, ceramic DDIP or SMT
Weight
0.42 ounces (12 grams)
+25C
0 to +70C
55 to +125C
ANALOG INPUT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
Input Voltage Range
--
2
--
--
2
--
--
2
--
Volts
Input Resistance
--
280
--
--
280
--
--
280
--
Input Capacitance
--
6
15
--
6
15
--
6
15
pF
DIGITAL INPUT
Logic Levels
Logic "1"
+2.0
--
--
+2.0
--
--
+2.0
--
--
Volts
Logic "0"
--
--
+0.8
--
--
+0.8
--
--
+0.8
Volts
Logic Loading "1"
--
--
+20
--
--
+20
--
--
+20
A
Logic Loading "0"
--
--
20
--
--
20
--
--
20
A
Start Convert Positive Pulse Width
10
20
--
10
20
--
10
20
--
ns
STATIC PERFORMANCE
Resolution
--
14
--
--
14
--
--
14
--
Bits
Integral Nonlinearity (f
in
= 10kHz)
--
0.75
--
--
0.75
--
--
1
--
LSB
Differential Nonlinearity (f
in
= 10kHz)
0.95
0.5
+1.25
0.95
0.5
+1.25
0.95
0.75
+1.5
LSB
Full Scale Absolute Accuracy
--
0.15
0.4
--
0.15
0.4
--
0.4
0.6
%FSR
Bipolar Zero Error (Tech Note 2)
--
0.1
0.3
--
0.1
0.3
--
0.3
0.6
%FSR
Gain Error (Tech Note 2)
--
0.2
0.5
--
0.2
0.5
--
0.4
1.25
%
No Missing Codes (f
in
= 10kHz)
14
--
--
14
--
--
14
--
--
Bits
DYNAMIC PERFORMANCE
Peak Harmonics (0.5dB)
dc to 500kHz
--
83
77
--
83
77
--
81
75
dB
500kHz to 1MHz
--
83
77
--
83
77
--
81
75
dB
1MHz to 1.5MHz
--
83
77
--
83
77
--
81
75
dB
Total Harmonic Distortion (0.5dB)
dc to 500kHz
--
80
76
--
80
76
--
78
74
dB
500kHz to 1MHz
--
80
76
--
80
76
--
77
73
dB
1MHz to 1.5MHz
--
80
76
--
80
76
--
77
73
dB
Signal-to-Noise Ratio
(w/o distortion, 0.5dB)
dc to 500kHz
76
79
--
76
79
--
75
78
--
dB
500kHz to 1MHz
76
79
--
76
79
--
74
77
--
dB
1MHz to 1.5MHz
75
78
--
75
78
--
74
77
--
dB
Signal-to-Noise Ratio
(& distortion, 0.5dB)
dc to 500kHz
73
77
--
73
77
--
71
75
--
dB
500kHz to 1MHz
73
77
--
73
77
--
71
75
--
dB
1MHz to 1.5MHz
73
77
--
73
77
--
71
74
--
dB
Noise
--
125
--
--
125
--
--
125
--
Vrms
Two-Tone Intermodulation
Distortion (f
in
= 975kHz,
1.2MHz, f
s
= 3MHz, 0.5dB)
--
82
--
--
82
--
--
82
--
dB
Input Bandwidth (3dB)
Small Signal (20dB input)
--
30
--
--
30
--
--
30
--
MHz
Large Signal (0dB input)
--
10
--
--
10
--
--
10
--
MHz
Feedthrough Rejection (f
in
= 1.5MHz)
--
85
--
--
85
--
--
85
--
dB
Slew Rate
--
400
--
--
400
--
--
400
--
V/s
Aperture Delay Time
--
+5
--
--
+5
--
--
+5
--
ns
Aperture Uncertainty
--
2
--
--
2
--
--
2
--
ps rms
FUNCTIONAL SPECIFICATIONS
(T
A
= +25C, V
DD
= 5V, 3MHz sampling rate, and a minimum 3 minute warmup unless otherwise specified.)
ADS-943
3
+25C
0 to +70C
55 to +125C
DYNAMIC PERFORMANCE cont.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
S/H Acquisition Time
( to 0.003%FSR, 4V step)
--
208
215
--
208
215
--
208
215
ns
Overvoltage Recovery Time
--
100
333
--
100
333
--
100
333
ns
A/D Conversion Rate
3
--
--
3
--
--
3
--
--
MHz
DIGITAL OUTPUTS
Logic Levels
Logic "1"
+2.4
--
--
+2.4
--
--
+2.4
--
--
Volts
Logic "0"
--
--
+0.4
--
--
+0.4
--
--
+0.4
Volts
Logic Loading "1"
--
--
4
--
--
4
--
--
4
mA
Logic Loading "0"
--
--
+4
--
--
+4
--
--
+4
mA
Output Coding
Offset Binary
POWER REQUIREMENTS
Power Supply Ranges
+5V Supply
+4.75
+5.0
+5.25
+4.75
+5.0
+5.25
+4.9
+5.0
+5.25
Volts
5V Supply
4.75
5.0
5.25
4.75
5.0
5.25
4.9
5.0
5.25
Volts
Power Supply Currents
+5V Supply
--
+210
+230
--
+210
+230
--
+210
+230
mA
5V Supply
--
125
145
--
125
145
--
125
145
mA
Power Dissipation
--
1.7
1.9
--
1.7
1.9
--
1.7
1.9
Watts
Power Supply Rejection
--
--
0.05
--
--
0.05
--
--
0.05
%FSR/%V
6.02
(SNR + Distortion) 1.76 + 20 log
Full Scale Amplitude
Actual Input Amplitude
Effective bits is equal to:
This is the time required before the A/D output data is valid once the analog input
is back within the specified range. This time is only guaranteed if the input does
not exceed 2.2V (S/H Saturation Voltage).
The minimum supply voltages of +4.9V and 4.9V for V
DD
are required for
55C operation only. The minumum limits are +4.75V and 4.75V when
operating at +125C.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-943
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 19 and 24) directly to a
large analog ground plane beneath the package.
Bypass all power supplies to ground with 4.7F tantalum
capacitors in parallel with 0.1F ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-943 achieves its specified accuracies without the
need for external calibration. If required, the device's small
initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 2 and 3.
When using this circuitry, or any similar offset and gain-
calibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle. Data for the interrupted and subsequent
conversions will be invalid.
4. A passive bandpass filter is used at the input of the A/D for
all production testing.
Footnotes:
All power supplies should be on before applying a start convert pulse. All
supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.
Contact DATEL for other input voltage ranges.
A 3MHz clock with a 20nsec positive pulse width is used for all production testing.
When sampling at 3MHz, the start convert pulse must be between 10 and
110nsec wide or between 160 and 300nsec wide. The falling edge must not occur
between 110 and 160nsec. For lower sampling rates, wider start pulses may be
used.
Figure 2. Optional ADS-943 Gain Adjust Calibration Circuit
To Pin21
of ADS-943
5V
SIGNAL
INPUT
GAIN
ADJUST
1.98k
50
+5V
2k
ADS-943
4
CALIBRATION PROCEDURE
Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuits in Figures 2 and 3 are guaranteed to
compensate for the ADS-943's initial accuracy errors and may
not be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital outputs
exactly on the transition point between two adjacent digital
output codes. This can be accomplished by connecting LED's
to the digital outputs and adjusting until certain LED's "flicker"
equally between on and off. Other approaches employ digital
comparators or microcontrollers to detect when the outputs
change from one code to the next.
Offset adjusting for the ADS-943 is normally accomplished at
the point where the MSB is a 1 and all other output bits are 0's
and the LSB just changes from a 0 to a 1. This digital output
transition ideally occurs when the applied analog input is
+ LSB (+122V).
Gain adjusting is accomplished when all bits are 1's and the
LSB just changes from a 1 to a 0. This transition ideally occurs
when the analog input is at +full scale minus 1 LSB's
(+1.99963V).
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input
(pin 18) so the converter is continuously converting.
2. Apply +122V to the ANALOG INPUT (pin 21).
3. Adjust the offset potentiometer until the output bits are
10 0000 0000 0000 and the LSB flickers between 0 and 1.
Gain Adjust Procedure
1. Apply +1.99963V to the ANALOG INPUT (pin 21).
2. Adjust the gain potentiometer until all output bits are 1's and
the LSB flickers between 1 and 0.
3. To confirm proper operation of the device, vary the input
signal to obtain the output coding listed in Table 2.
Figure 3. Connection Diagram
0.1F
0.1F
4.7F
4.7F
22, 13
24
20
19
ADS-943
5V
20k
0.1F
4.7F
+5V
14
5V
+5V
21
23
18
1
2
3
4
5
6
7
8
9
10
11
12
15
16
17
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
ANALOG
INPUT
START
CONVERT
A single +5V supply should be used for both the +5V analog and +5V digital.
If separate supplies are used, the difference between the two cannot exceed 100mV.
+
+
+
ZERO/
OFFSET
ADJUST
INPUT VOLTAGE
ZERO ADJUST
GAIN ADJUST
RANGE
+1/2 LSB
+FS 1 LSB
2V
+122V
+1.99963V
Table 1. Gain and Zero Adjust
BIPOLAR
INPUT VOLTAGE
OFFSET BINARY
SCALE
(2V RANGE)
MSB
LSB
+FS 1 LSB
+1.99976
11 1111 1111 1111
+3/4FS
+1.50000
11 1000 0000 0000
+1/2FS
+1.00000
11 0000 0000 0000
0
0.00000
10 0000 0000 0000
1/2 FS
1.00000
01 0000 0000 0000
3/4 FS
1.50000
00 1000 0000 0000
FS +1 LSB
1.99976
00 0000 0000 0001
FS
2.00000
00 0000 0000 0000
Table 2. Output Coding for Bipolar Operation
ADS-943
5
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of 0 to
+70C and 55 to +125C. All room-temperature (T
A
= +25C)
production testing is performed without the use of heat sinks or
forced-air cooling. Thermal impedance figures for each device
are listed in their respective specification tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible to
help conduct heat away from the package.
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be soldered
to boards rather than "socketed", and of course, minimal air
flow over the surface can greatly help reduce the package
temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number. See
page 1-183 of the DATEL Data Acquisition Components
Catalog for more information on the HS Series. Request
DATEL Application Note AN-8, "Heat Sinks for DIP Data
Converters", or contact DATEL directly, for additional
information.
Figure 4. ADS-943 Timing Diagram
OUTPUT
DATA
Data N Valid
Scale is approximately 20ns per division. Sampling rate = 3MHz.
EOC
Data N-1 Valid
Data N+1 Valid
Invalid
Data
283ns typ.
35ns typ.
130ns
1.
The start convert positive pulse width must be between either 10 and 110nsec or
160 and 300nsec (when sampling at 3MHz) to ensure proper operation. For sampling
rates lower than 3MHz, the start pulse can be wider than 300nsec, however a minimum
pulse width low of 30nsec should be maintained. A 3MHz clock with a 20nsec positive
pulse width is used for all production testing.
2.
Note:
10ns max.
INTERNAL S/H
10ns typ.
Acquisition Time
125ns typ.
208ns typ.
215ns max.
Hold
Conversion Time
120ns min., 130ns typ.,
140ns max.
50ns typ.
30ns typ.
125ns typ.
START
CONVERT
N
N+1
333nsec
20ns typ.